[][src]Crate esp_idf_bindgen

Re-exports

pub use self::nvs_open_mode_t as nvs_open_mode;
pub use self::esp_interface_t as wifi_interface_t;
pub use self::esp_netif_flags as esp_netif_flags_t;
pub use self::esp_netif_ip_event_type as esp_netif_ip_event_type_t;
pub use self::wifi_event_sta_wps_fail_reason_t as system_event_sta_wps_fail_reason_t;
pub use self::esp_sleep_source_t as esp_sleep_wakeup_cause_t;

Structs

ETSEventTag
KernelFrame
UserFrame
XtExcFrame
XtSolFrame
XtosCoreState
_Bigint
_ETSTIMER_
__BindgenBitfieldUnit
__IncompleteArrayField
__locale_t
__sFILE
__sFILE_fake
__sbuf
__tm
__tzinfo_struct
__tzrule_struct
__va_list_tag
_atexit
_glue
_ip_addr
_mbstate_t
_misc_reent
_mprec
_on_exit_args
_rand48
_reent
_types_fd_set
addrinfo
bintime
cmsghdr
crypto_cipher
crypto_hash
div_t
eflock
esp_app_desc_t

@brief Description about application.

esp_chip_info_t

@brief The structure represents information about the chip

esp_event_loop_args_t

Configuration for creating event loops

esp_flash_os_functions_t

OS-level integration hooks for accessing flash chips inside a running OS

esp_flash_region_t

@brief Structure for describing a region of flash

esp_flash_t

@brief Structure to describe a SPI flash chip connected to the system.

esp_image_flash_mapping_t
esp_image_header_t

@brief Main header of binary image

esp_image_metadata_t
esp_image_segment_header_t

@brief Header of binary image segment

esp_ip4_addr
esp_ip6_addr
esp_netif_config

@brief Generic esp_netif configuration

esp_netif_dns_info_t

@brief DNS server info

esp_netif_driver_base_s
esp_netif_driver_ifconfig

@brief Specific IO driver configuration

esp_netif_inherent_config
esp_netif_ip6_info_t

@brief IPV6 IP address information

esp_netif_ip_info_t

Event structure for IP_EVENT_STA_GOT_IP, IP_EVENT_ETH_GOT_IP events

esp_netif_netstack_config
esp_netif_obj

@brief Type of esp_netif_object server

esp_now_peer_info

@brief ESPNOW peer information parameters.

esp_now_peer_num

@brief Number of ESPNOW peers which exist currently.

esp_ota_select_entry_t
esp_partition_info_t
esp_partition_iterator_opaque_
esp_partition_pos_t
esp_partition_t

@brief partition information structure

esp_timer
esp_timer_create_args_t

@brief Timer configuration passed to esp_timer_create

flock
gpio_config_t

@brief Configuration parameters of GPIO pad for gpio_config function

gpio_dev_s
gpio_dev_s__bindgen_ty_10__bindgen_ty_1
gpio_dev_s__bindgen_ty_11__bindgen_ty_1
gpio_dev_s__bindgen_ty_12__bindgen_ty_1
gpio_dev_s__bindgen_ty_13__bindgen_ty_1
gpio_dev_s__bindgen_ty_14__bindgen_ty_1
gpio_dev_s__bindgen_ty_15__bindgen_ty_1
gpio_dev_s__bindgen_ty_16__bindgen_ty_1
gpio_dev_s__bindgen_ty_17__bindgen_ty_1
gpio_dev_s__bindgen_ty_18__bindgen_ty_1
gpio_dev_s__bindgen_ty_19__bindgen_ty_1
gpio_dev_s__bindgen_ty_1__bindgen_ty_1
gpio_dev_s__bindgen_ty_20__bindgen_ty_1
gpio_dev_s__bindgen_ty_21__bindgen_ty_1
gpio_dev_s__bindgen_ty_22__bindgen_ty_1
gpio_dev_s__bindgen_ty_2__bindgen_ty_1
gpio_dev_s__bindgen_ty_3__bindgen_ty_1
gpio_dev_s__bindgen_ty_4__bindgen_ty_1
gpio_dev_s__bindgen_ty_5__bindgen_ty_1
gpio_dev_s__bindgen_ty_6__bindgen_ty_1
gpio_dev_s__bindgen_ty_7__bindgen_ty_1
gpio_dev_s__bindgen_ty_8__bindgen_ty_1
gpio_dev_s__bindgen_ty_9__bindgen_ty_1
hostent
i2c_config_t

@brief I2C initialization parameters

i2s_dev_s
i2s_signal_conn_t
i2s_config_t

@brief I2S configuration parameters for i2s_param_config function

i2s_event_t

@brief Event structure used in I2S event queue

i2s_pin_config_t

@brief I2S pin number for i2s_set_pin

i2s_hal_context_t

Context that should be maintained by both the driver and the HAL

i2c_config_t__bindgen_ty_1__bindgen_ty_1
i2c_config_t__bindgen_ty_1__bindgen_ty_2
i2s_dev_s__bindgen_ty_10__bindgen_ty_1
i2s_dev_s__bindgen_ty_11__bindgen_ty_1
i2s_dev_s__bindgen_ty_12__bindgen_ty_1
i2s_dev_s__bindgen_ty_13__bindgen_ty_1
i2s_dev_s__bindgen_ty_14__bindgen_ty_1
i2s_dev_s__bindgen_ty_15__bindgen_ty_1
i2s_dev_s__bindgen_ty_16__bindgen_ty_1
i2s_dev_s__bindgen_ty_17__bindgen_ty_1
i2s_dev_s__bindgen_ty_18__bindgen_ty_1
i2s_dev_s__bindgen_ty_19__bindgen_ty_1
i2s_dev_s__bindgen_ty_1__bindgen_ty_1
i2s_dev_s__bindgen_ty_20__bindgen_ty_1
i2s_dev_s__bindgen_ty_21__bindgen_ty_1
i2s_dev_s__bindgen_ty_22__bindgen_ty_1
i2s_dev_s__bindgen_ty_23__bindgen_ty_1
i2s_dev_s__bindgen_ty_24__bindgen_ty_1
i2s_dev_s__bindgen_ty_25__bindgen_ty_1
i2s_dev_s__bindgen_ty_26__bindgen_ty_1
i2s_dev_s__bindgen_ty_27__bindgen_ty_1
i2s_dev_s__bindgen_ty_28__bindgen_ty_1
i2s_dev_s__bindgen_ty_29__bindgen_ty_1
i2s_dev_s__bindgen_ty_2__bindgen_ty_1
i2s_dev_s__bindgen_ty_30__bindgen_ty_1
i2s_dev_s__bindgen_ty_31__bindgen_ty_1
i2s_dev_s__bindgen_ty_3__bindgen_ty_1
i2s_dev_s__bindgen_ty_4__bindgen_ty_1
i2s_dev_s__bindgen_ty_5__bindgen_ty_1
i2s_dev_s__bindgen_ty_6__bindgen_ty_1
i2s_dev_s__bindgen_ty_7__bindgen_ty_1
i2s_dev_s__bindgen_ty_8__bindgen_ty_1
i2s_dev_s__bindgen_ty_9__bindgen_ty_1
ifreq
imaxdiv_t
in6_addr
in_addr
in_pktinfo
intr_handle_data_t
iovec
ip4_addr

This is the aligned version of ip4_addr_t, used as local variable, on the stack, etc.

ip6_addr

This is the aligned version of ip6_addr_t, used as local variable, on the stack, etc.

ip_addr

@ingroup ipaddr A union struct for both IP version's addresses. ATTENTION: watch out for its size when adding IPv6 address scope!

ip_event_ap_staipassigned_t

Event structure for IP_EVENT_AP_STAIPASSIGNED event

ip_event_got_ip6_t

Event structure for IP_EVENT_GOT_IP6 event

ip_event_got_ip_t
ip_mreq
ipv6_mreq
itimerspec
itimerval
ldiv_t
linger
lldiv_t
max_align_t
memp_desc

Memory pool descriptor

mesh_crypto_funcs_t

@brief The crypto callback function structure used in mesh vendor IE encryption. The structure can be set as software crypto or the crypto optimized by ESP32 hardware.

msghdr
multi_heap_info
multi_heap_info_t

@brief Structure to access heap metadata via multi_heap_get_info

netif

Generic data structure used for all lwIP network interfaces. The following fields should be filled in by the initialization function for the device driver: hwaddr_len, hwaddr[], mtu, flags

netif_ext_callback_args_t_ipv4_changed_s

Args to LWIP_NSC_IPV4_ADDRESS_CHANGED|LWIP_NSC_IPV4_GATEWAY_CHANGED|LWIP_NSC_IPV4_NETMASK_CHANGED|LWIP_NSC_IPV4_SETTINGS_CHANGED callback

netif_ext_callback_args_t_ipv6_set_s

Args to LWIP_NSC_IPV6_SET callback

netif_ext_callback_args_t_ipv6_addr_state_changed_s

Args to LWIP_NSC_IPV6_ADDR_STATE_CHANGED callback

netif_ext_callback_args_t_link_changed_s

Args to LWIP_NSC_LINK_CHANGED callback

netif_ext_callback_args_t_status_changed_s

Args to LWIP_NSC_STATUS_CHANGED callback

nvs_entry_info_t

@brief information about entry obtained from nvs_entry_info function

nvs_opaque_iterator_t
nvs_sec_cfg_t

@brief Key for encryption and decryption

nvs_stats_t

@note Info about storage space NVS.

pbuf

Main packet buffer struct

pbuf_custom

A custom pbuf: like a pbuf, but following a function pointer to free it.

pbuf_rom

Helper struct for const-correctness only. The only meaning of this one is to provide a const payload pointer for PBUF_ROM type.

pollfd
portMUX_TYPE
pthread_attr_t
pthread_condattr_t
pthread_mutexattr_t
pthread_once_t
rtc_clk_config_s

Initialization parameters for rtc_clk_init

rtc_cntl_dev_s
rtc_cntl_dev_s__bindgen_ty_10__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_11__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_12__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_13__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_14__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_15__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_16__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_17__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_18__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_19__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_1__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_20__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_21__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_22__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_23__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_24__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_25__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_26__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_27__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_28__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_29__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_2__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_30__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_31__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_32__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_33__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_34__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_35__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_36__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_37__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_38__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_3__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_4__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_5__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_6__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_7__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_8__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_9__bindgen_ty_1
rtc_config_s

RTC power and clock control initialization settings

rtc_cpu_freq_config_s

@brief CPU clock configuration structure

rtc_io_desc_t

@brief Pin function information for a single RTCIO pad's.

rtc_io_dev_s
rtc_io_dev_s__bindgen_ty_10__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_11__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_12__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_13__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_14__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_15__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_16__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_17__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_18__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_19__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_1__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_20__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_21__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_22__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_23__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_2__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_3__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_4__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_5__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_6__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_7__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_8__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_9__bindgen_ty_1
rtc_retain_mem_t
rtc_sleep_config_s

@brief sleep configuration for rtc_sleep_init function

rtc_vddsdio_config_s

Structure describing vddsdio configuration

sched_param
sens_dev_s
sens_dev_s__bindgen_ty_10__bindgen_ty_1
sens_dev_s__bindgen_ty_11__bindgen_ty_1
sens_dev_s__bindgen_ty_12__bindgen_ty_1
sens_dev_s__bindgen_ty_13__bindgen_ty_1
sens_dev_s__bindgen_ty_14__bindgen_ty_1
sens_dev_s__bindgen_ty_15__bindgen_ty_1
sens_dev_s__bindgen_ty_16__bindgen_ty_1
sens_dev_s__bindgen_ty_17__bindgen_ty_1
sens_dev_s__bindgen_ty_18__bindgen_ty_1
sens_dev_s__bindgen_ty_19__bindgen_ty_1
sens_dev_s__bindgen_ty_1__bindgen_ty_1
sens_dev_s__bindgen_ty_20__bindgen_ty_1
sens_dev_s__bindgen_ty_21__bindgen_ty_1
sens_dev_s__bindgen_ty_22__bindgen_ty_1
sens_dev_s__bindgen_ty_23__bindgen_ty_1
sens_dev_s__bindgen_ty_24__bindgen_ty_1
sens_dev_s__bindgen_ty_2__bindgen_ty_1
sens_dev_s__bindgen_ty_3__bindgen_ty_1
sens_dev_s__bindgen_ty_4__bindgen_ty_1
sens_dev_s__bindgen_ty_5__bindgen_ty_1
sens_dev_s__bindgen_ty_6__bindgen_ty_1
sens_dev_s__bindgen_ty_7__bindgen_ty_1
sens_dev_s__bindgen_ty_8__bindgen_ty_1
sens_dev_s__bindgen_ty_9__bindgen_ty_1
sigaction
sigaltstack
sigevent
siginfo_t
smartconfig_event_got_ssid_pswd_t

Argument structure for SC_EVENT_GOT_SSID_PSWD event

smartconfig_start_config_t

Configure structure for esp_smartconfig_start

soc_memory_region_t
soc_memory_type_desc_t
soc_reserved_region_t
sockaddr
sockaddr_in
sockaddr_in6
sockaddr_storage
spi_flash_chip_t
spi_flash_guard_funcs_t

Structure holding SPI flash access critical sections management functions.

spi_flash_host_driver_t

Host driver configuration and context structure.

spi_flash_trans_t

Definition of a common transaction. Also holds the return value.

spinlock_t
stat
sys_mbox_s
system_event_t

Event, as a tagged enum

timespec
timeval
timezone
tm
uart_at_cmd_t

@brief UART AT cmd char configuration parameters Note that this function may different on different chip. Please refer to the TRM at confirguration.

uart_config_t

@brief UART configuration parameters for uart_param_config function

uart_event_t

@brief Event structure used in UART event queue

uart_intr_config_t

@brief UART interrupt configuration parameters for uart_intr_config function

uart_sw_flowctrl_t

@brief UART software flow control configuration parameters

udp_pcb
vendor_ie_data_t

@brief Vendor Information Element header

wifi_active_scan_time_t

@brief Range of active scan times per channel

wifi_ant_config_t

@brief WiFi antenna configuration

wifi_ant_gpio_config_t

@brief WiFi GPIOs configuration for antenna selection

wifi_ant_gpio_t

@brief WiFi GPIO configuration for antenna selection

wifi_ap_config_t

@brief Soft-AP configuration settings for the ESP32

wifi_ap_record_t

@brief Description of a WiFi AP

wifi_country_t

@brief Structure describing WiFi country-based regional restrictions.

wifi_csi_config_t

@brief Channel state information(CSI) configuration type

wifi_csi_info_t

@brief CSI data type

wifi_event_ap_probe_req_rx_t

Argument structure for WIFI_EVENT_AP_PROBEREQRECVED event

wifi_event_ap_staconnected_t

Argument structure for WIFI_EVENT_AP_STACONNECTED event

wifi_event_ap_stadisconnected_t

Argument structure for WIFI_EVENT_AP_STADISCONNECTED event

wifi_event_sta_authmode_change_t

Argument structure for WIFI_EVENT_STA_AUTHMODE_CHANGE event

wifi_event_sta_connected_t

Argument structure for WIFI_EVENT_STA_CONNECTED event

wifi_event_sta_disconnected_t

Argument structure for WIFI_EVENT_STA_DISCONNECTED event

wifi_event_sta_scan_done_t

Argument structure for WIFI_EVENT_SCAN_DONE event

wifi_event_sta_wps_er_pin_t

Argument structure for WIFI_EVENT_STA_WPS_ER_PIN event

wifi_init_config_t

@brief WiFi stack configuration parameters passed to esp_wifi_init call.

wifi_osi_funcs_t
wifi_pkt_rx_ctrl_t

@brief Received packet radio metadata header, this is the common header at the beginning of all promiscuous mode RX callback buffers

wifi_pmf_config_t

Configuration structure for Protected Management Frame

wifi_promiscuous_filter_t

@brief Mask for filtering different packet types in promiscuous mode.

wifi_promiscuous_pkt_t

@brief Payload passed to 'buf' parameter of promiscuous mode RX callback.

wifi_scan_config_t

@brief Parameters for an SSID scan.

wifi_scan_threshold_t

@brief Structure describing parameters for a WiFi fast scan

wifi_scan_time_t

@brief Aggregate of active & passive scan time per channel

wifi_sta_config_t

@brief STA configuration settings for the ESP32

wifi_sta_info_t

@brief Description of STA associated with AP

wifi_sta_list_t

@brief List of stations associated with the ESP32 Soft-AP

wpa_crypto_funcs_t

@brief The crypto callback function structure used when do station security connect. The structure can be set as software crypto or the crypto optimized by ESP32 hardware.

xLIST
xLIST_ITEM
xMEMORY_REGION

Defines the memory ranges allocated to the task when an MPU is used.

xMINI_LIST_ITEM
xMPU_SETTINGS
xSTATIC_EVENT_GROUP
xSTATIC_LIST
xSTATIC_LIST_ITEM
xSTATIC_MINI_LIST_ITEM
xSTATIC_QUEUE
xSTATIC_TCB
xSTATIC_TIMER
xTASK_PARAMETERS

Parameters required to create an MPU protected task.

xTASK_SNAPSHOT

Used with the uxTaskGetSnapshotAll() function to save memory snapshot of each task in the system. We need this struct because TCB_t is defined (hidden) in tasks.c.

xTASK_STATUS

Used with the uxTaskGetSystemState() function to return the state of each task in the system.

xTIME_OUT

@cond */ Used internally only.

xthal_MPU_entry

Enums

ETS_STATUS

@addtogroup ets_apis @{

GPIO_INT_TYPE
RingbufferType_t
STATUS
_bindgen_ty_1
adc1_channel_t

adc1_channel_t will be deprecated functions, combine into adc_channel_t

adc2_channel_t

adc2_channel_t will be deprecated functions, combine into adc_channel_t

adc_atten_t

@brief ADC attenuation parameter. Different parameters determine the range of the ADC. See adc1_config_channel_atten.

adc_bits_width_t

@brief ADC resolution setting option.

adc_channel_t

@brief ADC channels handle. See adc1_channel_t, adc2_channel_t.

adc_i2s_source_t

@brief ESP32 ADC DMA source selection.

adc_i2s_encode_t

@brief ADC digital controller encode option.

adc_unit_t

@brief ADC units selected handle.

eNotifyAction

Actions that can be performed when vTaskNotify() is called.

eSleepModeStatus

Possible return values for eTaskConfirmSleepModeStatus().

eTaskState

Task states returned by eTaskGetState.

err_enum_t

Definitions for error constants.

esp_chip_id_t

@brief ESP chip ID

esp_chip_model_t

@brief Chip models

esp_crypto_cipher_alg_t
esp_crypto_hash_alg_t
esp_flash_io_mode_t

@brief Mode used for reading from SPI flash

esp_flash_speed_t

@brief SPI flash clock speed values, always refer to them by the enum rather than the actual value (more speed may be appended into the list).

esp_image_flash_size_t

@brief Supported SPI flash sizes

esp_image_load_mode_t
esp_image_spi_freq_t

@brief SPI flash clock frequency

esp_image_spi_mode_t

@brief SPI flash mode, used in esp_image_header_t

esp_interface_t
esp_ip6_addr_type_t
esp_mac_type_t
esp_netif_dhcp_option_id_t

@brief Supported options for DHCP client or DHCP server

esp_netif_dhcp_option_mode_t

@brief Mode for DHCP client or DHCP server option functions

esp_netif_dhcp_status_t

@brief Status of DHCP client or DHCP server

esp_netif_dns_type_t

@brief Type of DNS server

esp_netif_flags
esp_netif_ip_event_type
esp_now_send_status_t

@brief Status of sending ESPNOW data .

esp_ota_img_states_t

OTA_DATA states for checking operability of the app.

esp_partition_subtype_t

@brief Partition subtype

esp_partition_type_t

@brief Partition type

esp_reset_reason_t

@brief Reset reasons

esp_sleep_ext1_wakeup_mode_t

@brief Logic function used for EXT1 wakeup mode.

esp_sleep_pd_domain_t

@brief Power domains which can be powered down in sleep mode

esp_sleep_pd_option_t

@brief Power down options

esp_sleep_source_t

@brief Sleep wakeup cause

esp_timer_dispatch_t

@brief Method for dispatching timer callback

gpio_drive_cap_t
gpio_int_type_t
gpio_mode_t
gpio_num_t

@endcond

gpio_port_t
gpio_pull_mode_t
gpio_pulldown_t
gpio_pullup_t
i2c_mode_t
i2c_rw_t
i2c_opmode_t
i2c_trans_mode_t
i2c_addr_mode_t
i2c_ack_type_t
i2c_sclk_t
i2s_port_t

@brief I2S port number, the max port number is (I2S_NUM_MAX -1).

i2s_bits_per_sample_t

@brief I2S bit width per sample.

i2s_channel_t

@brief I2S channel.

i2s_comm_format_t

@brief I2S communication standard format

i2s_channel_fmt_t

@brief I2S channel format type

i2s_mode_t

@brief I2S Mode, defaut is I2S_MODE_MASTER | I2S_MODE_TX

i2s_clock_src_t

@brief I2S source clock

i2s_event_type_t

@brief I2S event types

i2s_dac_mode_t

@brief I2S DAC mode for i2s_set_dac_mode.

i2s_pdm_dsr_t

@brief I2S PDM RX downsample mode

ip_event_t

IP event declarations

lwip_internal_netif_client_data_index

@}

lwip_ip_addr_type

@ingroup ipaddr IP address types for use in ip_addr_t.type member. @see tcp_new_ip_type(), udp_new_ip_type(), raw_new_ip_type().

lwip_ipv6_scope_type

Symbolic constants for the 'type' parameters in some of the macros. These exist for efficiency only, allowing the macros to avoid certain tests when the address is known not to be of a certain type. Dead code elimination will do the rest. IP6_MULTICAST is supported but currently not optimized. @see ip6_addr_has_scope, ip6_addr_assign_zone, ip6_addr_lacks_zone.

memp_t

Create the list of all memory pools managed by memp. MEMP_MAX represents a NULL pool at the end

netif_mac_filter_action

MAC Filter Actions, these are passed to a netif's igmp_mac_filter or mld_mac_filter callback function.

nvs_open_mode_t

@brief Mode of opening the non-volatile storage

nvs_type_t

@brief Types of variables

pbuf_layer

@ingroup pbuf Enumeration of pbuf layers

pbuf_type

@ingroup pbuf Enumeration of pbuf types

pdm_pcm_conv_t

@brief PDM PCM convter enable/disable.

periph_module_t
rtc_cal_sel_t

@brief Clock source to be calibrated using rtc_clk_cal function

rtc_cpu_freq_src_t

@brief CPU clock source

rtc_cpu_freq_t

@brief CPU frequency values

rtc_fast_freq_t

@brief RTC FAST_CLK frequency values

rtc_slow_freq_t

@brief RTC SLOW_CLK frequency values

rtc_xtal_freq_t

@brief Possible main XTAL frequency values.

smartconfig_event_t

Smartconfig event declarations

smartconfig_type_t
sntp_sync_mode_t

SNTP time update mode

sntp_sync_status_t

SNTP sync status

spi_flash_mmap_memory_t

@brief Enumeration which specifies memory space requested in an mmap call

spi_flash_wrap_mode_t
system_event_id_t

System event types enumeration

touch_cnt_slope_t

Touch sensor charge/discharge speed

touch_fsm_mode_t

Touch sensor FSM mode

touch_high_volt_t

Touch sensor high reference voltage

touch_low_volt_t

Touch sensor low reference voltage

touch_pad_t

Touch pad channel

touch_tie_opt_t

Touch sensor initial charge level

touch_trigger_mode_t

ESP32 Only

touch_trigger_src_t
touch_volt_atten_t

Touch sensor high reference voltage attenuation

uart_event_type_t

@brief UART event types used in the ring buffer

uart_hw_flowcontrol_t

@brief UART hardware flow control modes

uart_mode_t

@brief UART mode selection

uart_parity_t

@brief UART parity constants

uart_sclk_t

@brief UART source clock

uart_signal_inv_t

@brief UART signal bit map

uart_stop_bits_t

@brief UART stop bits number

uart_word_length_t

@brief UART word length constants

watchpoint_trigger_t
wifi_ant_mode_t

@brief WiFi antenna mode

wifi_ant_t

@brief WiFi antenna

wifi_auth_mode_t
wifi_bandwidth_t
wifi_cipher_type_t
wifi_country_policy_t
wifi_err_reason_t
wifi_event_sta_wps_fail_reason_t

Argument structure for WIFI_EVENT_STA_WPS_ER_FAILED event

wifi_event_t

WiFi event declarations

wifi_mode_t
wifi_phy_rate_t

@brief WiFi PHY rate encodings

wifi_promiscuous_pkt_type_t

@brief Promiscuous frame type

wifi_ps_type_t
wifi_scan_method_t
wifi_scan_type_t
wifi_second_chan_t
wifi_sort_method_t
wifi_storage_t
wifi_vendor_ie_id_t

@brief Vendor Information Element index

wifi_vendor_ie_type_t

@brief Vendor Information Element type

Constants

ACCHI
ACCLO
ADC_FSM_SAMPLE_CYCLE_DEFAULT
AF_INET
AF_INET6
AF_UNSPEC
AI_ADDRCONFIG
AI_ALL
AI_CANONNAME
AI_NUMERICHOST
AI_NUMERICSERV
AI_PASSIVE
AI_V4MAPPED
ALIGNPAD
ANT_SEL0_IDX
ANT_SEL1_IDX
ANT_SEL2_IDX
ANT_SEL3_IDX
ANT_SEL4_IDX
ANT_SEL5_IDX
ANT_SEL6_IDX
ANT_SEL7_IDX
APB_CLK_FREQ
APB_CLK_FREQ_ROM
API_MSG_DEBUG
APLL_I2S_MIN_RATE
APLL_MAX_FREQ
APLL_MIN_FREQ
APP_CPU_NUM
ARG_MAX
ARP_MAXAGE
ARP_QUEUEING
ARP_QUEUE_LEN
ARP_TABLE_SIZE
ATOMCTL
AT_EACCESS
AT_FDCWD
AT_REMOVEDIR
AT_SYMLINK_FOLLOW
AT_SYMLINK_NOFOLLOW
AUTOIP_DEBUG
BB_DIAG0_IDX
BB_DIAG1_IDX
BB_DIAG2_IDX
BB_DIAG3_IDX
BB_DIAG4_IDX
BB_DIAG5_IDX
BB_DIAG6_IDX
BB_DIAG7_IDX
BB_DIAG8_IDX
BB_DIAG9_IDX
BB_DIAG10_IDX
BB_DIAG11_IDX
BB_DIAG12_IDX
BB_DIAG13_IDX
BB_DIAG14_IDX
BB_DIAG15_IDX
BB_DIAG16_IDX
BB_DIAG17_IDX
BB_DIAG18_IDX
BB_DIAG19_IDX
BIG_ENDIAN
BIT0
BIT1
BIT2
BIT3
BIT4
BIT5
BIT6
BIT7
BIT8
BIT9
BIT10
BIT11
BIT12
BIT13
BIT14
BIT15
BIT16
BIT17
BIT18
BIT19
BIT20
BIT21
BIT22
BIT23
BIT24
BIT25
BIT26
BIT27
BIT28
BIT29
BIT30
BIT31
BLE_AUDIO0_IRQ_IDX
BLE_AUDIO1_IRQ_IDX
BLE_AUDIO2_IRQ_IDX
BLE_AUDIO_SYNC0_P_IDX
BLE_AUDIO_SYNC1_P_IDX
BLE_AUDIO_SYNC2_P_IDX
BR
BT_AUDIO0_IRQ_IDX
BT_AUDIO1_IRQ_IDX
BT_AUDIO2_IRQ_IDX
BT_TASK_EXTRA_STACK_SIZE
BUFSIZ
BYTE_ORDER
CALL0_ABI
CAN_BUS_OFF_ON_IDX
CAN_CLKOUT_IDX
CAN_RX_IDX
CAN_TX_IDX
CCOMPARE
CCOMPARE_0
CCOMPARE_1
CCOMPARE_2
CCOUNT
CHECKSUM_CHECK_ICMP
CHECKSUM_CHECK_ICMP6
CHECKSUM_CHECK_IP
CHECKSUM_CHECK_TCP
CHECKSUM_CHECK_UDP
CHECKSUM_GEN_ICMP
CHECKSUM_GEN_ICMP6
CHECKSUM_GEN_IP
CHECKSUM_GEN_TCP
CHECKSUM_GEN_UDP
CLK_OUT1
CLK_OUT1_V
CLK_OUT1_S
CLK_OUT1_M
CLK_OUT2
CLK_OUT2_V
CLK_OUT2_S
CLK_OUT2_M
CLK_OUT3
CLK_OUT3_V
CLK_OUT3_S
CLK_OUT3_M
CLK_TCK
CLOCKS_PER_SEC
CLOCK_ALLOWED
CLOCK_DISABLED
CLOCK_DISALLOWED
CLOCK_ENABLED
CONFIGID0
CONFIGID1
CONFIG_ADC2_DISABLE_DAC
CONFIG_ADC_CAL_EFUSE_TP_ENABLE
CONFIG_ADC_CAL_EFUSE_VREF_ENABLE
CONFIG_ADC_CAL_LUT_ENABLE
CONFIG_APP_COMPILE_TIME_DATE
CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V
CONFIG_BOOTLOADER_WDT_ENABLE
CONFIG_BOOTLOADER_WDT_TIME_MS
CONFIG_BROWNOUT_DET
CONFIG_BROWNOUT_DET_LVL
CONFIG_BROWNOUT_DET_LVL_SEL_0
CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF
CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF
CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF
CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE
CONFIG_BT_RESERVE_DRAM
CONFIG_CONSOLE_UART_BAUDRATE
CONFIG_CONSOLE_UART_DEFAULT
CONFIG_CONSOLE_UART_NUM
CONFIG_DMA_RX_BUF_NUM
CONFIG_DMA_TX_BUF_NUM
CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4
CONFIG_EFUSE_MAX_BLK_LEN
CONFIG_EMAC_CHECK_LINK_PERIOD_MS
CONFIG_EMAC_L2_TO_L3_RX_BUF_MODE
CONFIG_EMAC_TASK_PRIORITY
CONFIG_EMAC_TASK_STACK_SIZE
CONFIG_ESP32_APPTRACE_DEST_NONE
CONFIG_ESP32_APPTRACE_LOCK_ENABLE
CONFIG_ESP32_DEBUG_OCDAWARE
CONFIG_ESP32_DEBUG_STUBS_ENABLE
CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY
CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ
CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY
CONFIG_ESP32_DPORT_WORKAROUND
CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE
CONFIG_ESP32_PANIC_PRINT_REBOOT
CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
CONFIG_ESP32_PHY_MAX_TX_POWER
CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER
CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT
CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT
CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT
CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT
CONFIG_ESP32_REV_MIN
CONFIG_ESP32_RTC_CLK_CAL_CYCLES
CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED
CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED
CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
CONFIG_ESP32_WIFI_IRAM_OPT
CONFIG_ESP32_WIFI_MGMT_SBUF_NUM
CONFIG_ESP32_WIFI_NVS_ENABLED
CONFIG_ESP32_WIFI_RX_BA_WIN
CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN
CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM
CONFIG_ESP32_WIFI_TX_BA_WIN
CONFIG_ESP32_WIFI_TX_BUFFER_TYPE
CONFIG_ESP32_XTAL_FREQ
CONFIG_ESP8266_WIFI_RX_BUFFER_NUM
CONFIG_ESP8266_WIFI_LEFT_CONTINUOUS_RX_BUFFER_NUM
CONFIG_ESP8266_WIFI_RX_PKT_NUM
CONFIG_ESP8266_WIFI_TX_PKT_NUM
CONFIG_ESP8266_WIFI_NVS_ENABLED
CONFIG_ESP32_DEFAULT_CPU_FREQ_240
CONFIG_ESP32_REV_MIN_0
CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1
CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0
CONFIG_ESP32_XTAL_FREQ_40
CONFIG_ESPTOOLPY_AFTER
CONFIG_ESPTOOLPY_AFTER_RESET
CONFIG_ESPTOOLPY_BAUD
CONFIG_ESPTOOLPY_BAUD_115200B
CONFIG_ESPTOOLPY_BAUD_OTHER_VAL
CONFIG_ESPTOOLPY_BEFORE
CONFIG_ESPTOOLPY_BEFORE_RESET
CONFIG_ESPTOOLPY_COMPRESSED
CONFIG_ESPTOOLPY_FLASHFREQ
CONFIG_ESPTOOLPY_FLASHFREQ_40M
CONFIG_ESPTOOLPY_FLASHMODE
CONFIG_ESPTOOLPY_FLASHSIZE
CONFIG_ESPTOOLPY_FLASHSIZE_2MB
CONFIG_ESPTOOLPY_FLASHSIZE_DETECT
CONFIG_ESPTOOLPY_PORT
CONFIG_ESP_ERR_TO_NAME_LOOKUP
CONFIG_ESP_GRATUITOUS_ARP
CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS
CONFIG_FATFS_CODEPAGE
CONFIG_FATFS_CODEPAGE_437
CONFIG_FATFS_FS_LOCK
CONFIG_FATFS_LFN_NONE
CONFIG_FATFS_PER_FILE_CACHE
CONFIG_FATFS_TIMEOUT_MS
CONFIG_FEATURE_WPA3_SAE_BIT
CONFIG_FLASHMODE_DIO
CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS
CONFIG_FREERTOS_ASSERT_FAIL_ABORT
CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION
CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY
CONFIG_FREERTOS_CORETIMER_0
CONFIG_FREERTOS_HZ
CONFIG_FREERTOS_IDLE_TASK_STACKSIZE
CONFIG_FREERTOS_INTERRUPT_BACKTRACE
CONFIG_FREERTOS_ISR_STACKSIZE
CONFIG_FREERTOS_MAX_TASK_NAME_LEN
CONFIG_FREERTOS_NO_AFFINITY
CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE
CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER
CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS
CONFIG_GARP_TMR_INTERVAL
CONFIG_HEAP_POISONING_DISABLED
CONFIG_HTTPD_ERR_RESP_NO_DELAY
CONFIG_HTTPD_MAX_REQ_HDR_LEN
CONFIG_HTTPD_MAX_URI_LEN
CONFIG_HTTPD_PURGE_BUF_LEN
CONFIG_IDF_TARGET
CONFIG_IDF_TARGET_ESP32
CONFIG_INT_WDT
CONFIG_INT_WDT_CHECK_CPU1
CONFIG_INT_WDT_TIMEOUT_MS
CONFIG_IPC_TASK_STACK_SIZE
CONFIG_IP_LOST_TIMER_INTERVAL
CONFIG_LIBSODIUM_USE_MBEDTLS_SHA
CONFIG_LOG_BOOTLOADER_LEVEL
CONFIG_LOG_BOOTLOADER_LEVEL_INFO
CONFIG_LOG_COLORS
CONFIG_LOG_DEFAULT_LEVEL
CONFIG_LOG_DEFAULT_LEVEL_INFO
CONFIG_LWIP_DHCPS_LEASE_UNIT
CONFIG_LWIP_DHCPS_MAX_STATION_NUM
CONFIG_LWIP_DHCP_DOES_ARP_CHECK
CONFIG_LWIP_DHCP_MAX_NTP_SERVERS
CONFIG_LWIP_LOOPBACK_MAX_PBUFS
CONFIG_LWIP_MAX_ACTIVE_TCP
CONFIG_LWIP_MAX_LISTENING_TCP
CONFIG_LWIP_MAX_RAW_PCBS
CONFIG_LWIP_MAX_SOCKETS
CONFIG_LWIP_MAX_UDP_PCBS
CONFIG_LWIP_NETIF_LOOPBACK
CONFIG_LWIP_SO_REUSE
CONFIG_LWIP_SO_REUSE_RXTOALL
CONFIG_LWIP_TCP_OVERSIZE_MSS
CONFIG_MAIN_TASK_STACK_SIZE
CONFIG_MBEDTLS_AES_C
CONFIG_MBEDTLS_CCM_C
CONFIG_MBEDTLS_ECDH_C
CONFIG_MBEDTLS_ECDSA_C
CONFIG_MBEDTLS_ECP_C
CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED
CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED
CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED
CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED
CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED
CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED
CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED
CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED
CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED
CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED
CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED
CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED
CONFIG_MBEDTLS_ECP_NIST_OPTIM
CONFIG_MBEDTLS_GCM_C
CONFIG_MBEDTLS_HARDWARE_AES
CONFIG_MBEDTLS_HAVE_TIME
CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC
CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA
CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE
CONFIG_MBEDTLS_KEY_EXCHANGE_RSA
CONFIG_MBEDTLS_PEM_PARSE_C
CONFIG_MBEDTLS_PEM_WRITE_C
CONFIG_MBEDTLS_RC4_DISABLED
CONFIG_MBEDTLS_SSL_ALPN
CONFIG_MBEDTLS_SSL_MAX_CONTENT_LEN
CONFIG_MBEDTLS_SSL_PROTO_TLS1
CONFIG_MBEDTLS_SSL_PROTO_TLS1_1
CONFIG_MBEDTLS_SSL_PROTO_TLS1_2
CONFIG_MBEDTLS_SSL_RENEGOTIATION
CONFIG_MBEDTLS_SSL_SESSION_TICKETS
CONFIG_MBEDTLS_TLS_CLIENT
CONFIG_MBEDTLS_TLS_ENABLED
CONFIG_MBEDTLS_TLS_SERVER
CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT
CONFIG_MBEDTLS_X509_CRL_PARSE_C
CONFIG_MBEDTLS_X509_CSR_PARSE_C
CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE
CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT
CONFIG_MB_CONTROLLER_STACK_SIZE
CONFIG_MB_EVENT_QUEUE_TIMEOUT
CONFIG_MB_QUEUE_LENGTH
CONFIG_MB_SERIAL_BUF_SIZE
CONFIG_MB_SERIAL_TASK_PRIO
CONFIG_MB_SERIAL_TASK_STACK_SIZE
CONFIG_MB_TIMER_GROUP
CONFIG_MB_TIMER_INDEX
CONFIG_MB_TIMER_PORT_ENABLED
CONFIG_MDNS_MAX_SERVICES
CONFIG_MONITOR_BAUD
CONFIG_MONITOR_BAUD_115200B
CONFIG_MONITOR_BAUD_OTHER_VAL
CONFIG_MQTT_PROTOCOL_311
CONFIG_MQTT_TRANSPORT_SSL
CONFIG_MQTT_TRANSPORT_WEBSOCKET
CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE
CONFIG_NEWLIB_STDIN_LINE_ENDING_CR
CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF
CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS
CONFIG_OPENSSL_ASSERT_DO_NOTHING
CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED
CONFIG_OPTIMIZATION_LEVEL_DEBUG
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME
CONFIG_PARTITION_TABLE_FILENAME
CONFIG_PARTITION_TABLE_MD5
CONFIG_PARTITION_TABLE_OFFSET
CONFIG_PARTITION_TABLE_SINGLE_APP
CONFIG_PTHREAD_STACK_MIN
CONFIG_PYTHON
CONFIG_REDUCE_PHY_TX_POWER
CONFIG_SPIFFS_CACHE
CONFIG_SPIFFS_CACHE_WR
CONFIG_SPIFFS_GC_MAX_RUNS
CONFIG_SPIFFS_MAX_PARTITIONS
CONFIG_SPIFFS_META_LENGTH
CONFIG_SPIFFS_OBJ_NAME_LEN
CONFIG_SPIFFS_PAGE_CHECK
CONFIG_SPIFFS_PAGE_SIZE
CONFIG_SPIFFS_USE_MAGIC
CONFIG_SPIFFS_USE_MAGIC_LENGTH
CONFIG_SPIFFS_USE_MTIME
CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS
CONFIG_SPI_FLASH_ERASE_YIELD_TICKS
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH
CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS
CONFIG_SPI_FLASH_YIELD_DURING_ERASE
CONFIG_SPI_MASTER_ISR_IN_IRAM
CONFIG_SPI_SLAVE_ISR_IN_IRAM
CONFIG_STACK_CHECK_NONE
CONFIG_SUPPORT_TERMIOS
CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT
CONFIG_SYSTEM_EVENT_QUEUE_SIZE
CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE
CONFIG_TASK_WDT
CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0
CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1
CONFIG_TASK_WDT_TIMEOUT_S
CONFIG_TCPIP_LWIP
CONFIG_TCPIP_RECVMBOX_SIZE
CONFIG_TCPIP_TASK_AFFINITY
CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY
CONFIG_TCPIP_TASK_STACK_SIZE
CONFIG_TCP_MAXRTX
CONFIG_TCP_MSL
CONFIG_TCP_MSS
CONFIG_TCP_OVERSIZE_MSS
CONFIG_TCP_QUEUE_OOSEQ
CONFIG_TCP_RECVMBOX_SIZE
CONFIG_TCP_SND_BUF_DEFAULT
CONFIG_TCP_SYNMAXRTX
CONFIG_TCP_WND_DEFAULT
CONFIG_TIMER_QUEUE_LENGTH
CONFIG_TIMER_TASK_PRIORITY
CONFIG_TIMER_TASK_STACK_DEPTH
CONFIG_TIMER_TASK_STACK_SIZE
CONFIG_TOOLPREFIX
CONFIG_TRACEMEM_RESERVE_DRAM
CONFIG_UDP_RECVMBOX_SIZE
CONFIG_ULP_COPROC_RESERVE_MEM
CONFIG_UNITY_ENABLE_DOUBLE
CONFIG_UNITY_ENABLE_FLOAT
CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER
CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES
CONFIG_WL_SECTOR_SIZE
CONFIG_WL_SECTOR_SIZE_4096
CORE_ID_APP
CORE_ID_PRO
CORE_ID_REGVAL_APP
CORE_ID_REGVAL_PRO
CORE_ID_REGVAL_XOR_SWAP
CORE_STATE_SIGNATURE
CPENABLE
CPU_CLK_FREQ_ROM
DBREAKA
DBREAKA_0
DBREAKA_1
DBREAKC
DBREAKC_0
DBREAKC_1
DBREAKC_LOADBREAK_MASK
DBREAKC_LOADBREAK_SHIFT
DBREAKC_MASK_MASK
DBREAKC_MASK_SHIFT
DBREAKC_STOREBREAK_MASK
DBREAKC_STOREBREAK_SHIFT
DDR
DEBUGCAUSE
DEBUGCAUSE_BREAKN_MASK
DEBUGCAUSE_BREAKN_SHIFT
DEBUGCAUSE_BREAK_MASK
DEBUGCAUSE_BREAK_SHIFT
DEBUGCAUSE_DBREAK_MASK
DEBUGCAUSE_DBREAK_SHIFT
DEBUGCAUSE_DEBUGINT_MASK
DEBUGCAUSE_DEBUGINT_SHIFT
DEBUGCAUSE_IBREAK_MASK
DEBUGCAUSE_IBREAK_SHIFT
DEBUGCAUSE_ICOUNT_MASK
DEBUGCAUSE_ICOUNT_SHIFT
DEFAULT_ACCEPTMBOX_SIZE
DEFAULT_RAW_RECVMBOX_SIZE
DEFAULT_THREAD_NAME
DEFAULT_THREAD_PRIO
DEFFILEMODE
DEPC
DHCP6_DEBUG
DHCP_DOES_ARP_CHECK
DHCP_MAXRTX
DNS_DEBUG
DNS_DOES_NAME_CHECK
DNS_FALLBACK_SERVER_INDEX
DNS_LOCAL_HOSTLIST
DNS_LOCAL_HOSTLIST_IS_DYNAMIC
DNS_MAX_NAME_LENGTH
DNS_MAX_RETRIES
DNS_MAX_SERVERS
DNS_TABLE_SIZE
DR_REG_AES_BASE
DR_REG_APB_CTRL_BASE
DR_REG_BB_BASE
DR_REG_BT_BASE
DR_REG_CAN_BASE
DR_REG_DPORT_BASE
DR_REG_DPORT_END
DR_REG_EFUSE_BASE
DR_REG_EMAC_BASE
DR_REG_FE2_BASE
DR_REG_FE_BASE
DR_REG_FLASH_MMU_TABLE_APP
DR_REG_FLASH_MMU_TABLE_PRO
DR_REG_FRC_TIMER_BASE
DR_REG_GPIO_BASE
DR_REG_GPIO_SD_BASE
DR_REG_HINF_BASE
DR_REG_I2S_BASE
DR_REG_I2C_EXT_BASE
DR_REG_I2C1_EXT_BASE
DR_REG_I2S1_BASE
DR_REG_IO_MUX_BASE
DR_REG_LEDC_BASE
DR_REG_NRX_BASE
DR_REG_PCNT_BASE
DR_REG_PWM1_BASE
DR_REG_PWM2_BASE
DR_REG_PWM3_BASE
DR_REG_PWM_BASE
DR_REG_RMT_BASE
DR_REG_RSA_BASE
DR_REG_RTCCNTL_BASE
DR_REG_RTCIO_BASE
DR_REG_RTCMEM0_BASE
DR_REG_RTCMEM1_BASE
DR_REG_RTCMEM2_BASE
DR_REG_RTC_I2C_BASE
DR_REG_SDMMC_BASE
DR_REG_SENS_BASE
DR_REG_SHA_BASE
DR_REG_SLCHOST_BASE
DR_REG_SLC_BASE
DR_REG_SPI0_BASE
DR_REG_SPI1_BASE
DR_REG_SPI2_BASE
DR_REG_SPI3_BASE
DR_REG_SPI_ENCRYPT_BASE
DR_REG_SYSCON_BASE
DR_REG_TIMERGROUP0_BASE
DR_REG_TIMERGROUP1_BASE
DR_REG_UART1_BASE
DR_REG_UART2_BASE
DR_REG_UART_BASE
DR_REG_UHCI0_BASE
DR_REG_UHCI1_BASE
DSRSET
DST_AUST
DST_CAN
DST_EET
DST_MET
DST_NONE
DST_USA
DST_WET
E2BIG
EACCES
EADDRINUSE
EADDRNOTAVAIL
EAFNOSUPPORT
EAGAIN
EAI_FAIL
EAI_FAMILY
EAI_MEMORY
EAI_NONAME
EAI_SERVICE
EALREADY
EBADF
EBADMSG
EBUSY
ECANCELED
ECHILD
ECONNABORTED
ECONNREFUSED
ECONNRESET
EDEADLK
EDESTADDRREQ
EDOM
EDQUOT
EEXIST
EFAULT
EFBIG
EFTYPE
EFUSE_ABS_DONE_0_V
EFUSE_ABS_DONE_0_S
EFUSE_ABS_DONE_1_V
EFUSE_ABS_DONE_1_S
EFUSE_ADC1_TP_HIGH
EFUSE_ADC1_TP_HIGH_V
EFUSE_ADC1_TP_HIGH_S
EFUSE_ADC1_TP_LOW
EFUSE_ADC1_TP_LOW_V
EFUSE_ADC1_TP_LOW_S
EFUSE_ADC2_TP_HIGH
EFUSE_ADC2_TP_HIGH_V
EFUSE_ADC2_TP_HIGH_S
EFUSE_ADC2_TP_LOW
EFUSE_ADC2_TP_LOW_V
EFUSE_ADC2_TP_LOW_S
EFUSE_ADC_VREF
EFUSE_ADC_VREF_S
EFUSE_ADC_VREF_V
EFUSE_BLK3_PART_RESERVE_V
EFUSE_BLK3_PART_RESERVE_S
EFUSE_BLK0_RDATA0_REG
EFUSE_BLK0_RDATA1_REG
EFUSE_BLK0_RDATA2_REG
EFUSE_BLK0_RDATA3_REG
EFUSE_BLK0_RDATA4_REG
EFUSE_BLK0_RDATA5_REG
EFUSE_BLK0_RDATA6_REG
EFUSE_BLK0_WDATA0_REG
EFUSE_BLK0_WDATA1_REG
EFUSE_BLK0_WDATA2_REG
EFUSE_BLK0_WDATA3_REG
EFUSE_BLK0_WDATA4_REG
EFUSE_BLK0_WDATA5_REG
EFUSE_BLK0_WDATA6_REG
EFUSE_BLK1_DIN0
EFUSE_BLK1_DIN0_V
EFUSE_BLK1_DIN0_S
EFUSE_BLK1_DIN1
EFUSE_BLK1_DIN1_V
EFUSE_BLK1_DIN1_S
EFUSE_BLK1_DIN2
EFUSE_BLK1_DIN2_V
EFUSE_BLK1_DIN2_S
EFUSE_BLK1_DIN3
EFUSE_BLK1_DIN3_V
EFUSE_BLK1_DIN3_S
EFUSE_BLK1_DIN4
EFUSE_BLK1_DIN4_V
EFUSE_BLK1_DIN4_S
EFUSE_BLK1_DIN5
EFUSE_BLK1_DIN5_V
EFUSE_BLK1_DIN5_S
EFUSE_BLK1_DIN6
EFUSE_BLK1_DIN6_V
EFUSE_BLK1_DIN6_S
EFUSE_BLK1_DIN7
EFUSE_BLK1_DIN7_V
EFUSE_BLK1_DIN7_S
EFUSE_BLK1_DOUT0
EFUSE_BLK1_DOUT0_V
EFUSE_BLK1_DOUT0_S
EFUSE_BLK1_DOUT1
EFUSE_BLK1_DOUT1_V
EFUSE_BLK1_DOUT1_S
EFUSE_BLK1_DOUT2
EFUSE_BLK1_DOUT2_V
EFUSE_BLK1_DOUT2_S
EFUSE_BLK1_DOUT3
EFUSE_BLK1_DOUT3_V
EFUSE_BLK1_DOUT3_S
EFUSE_BLK1_DOUT4
EFUSE_BLK1_DOUT4_V
EFUSE_BLK1_DOUT4_S
EFUSE_BLK1_DOUT5
EFUSE_BLK1_DOUT5_V
EFUSE_BLK1_DOUT5_S
EFUSE_BLK1_DOUT6
EFUSE_BLK1_DOUT6_V
EFUSE_BLK1_DOUT6_S
EFUSE_BLK1_DOUT7
EFUSE_BLK1_DOUT7_V
EFUSE_BLK1_DOUT7_S
EFUSE_BLK1_RDATA0_REG
EFUSE_BLK1_RDATA1_REG
EFUSE_BLK1_RDATA2_REG
EFUSE_BLK1_RDATA3_REG
EFUSE_BLK1_RDATA4_REG
EFUSE_BLK1_RDATA5_REG
EFUSE_BLK1_RDATA6_REG
EFUSE_BLK1_RDATA7_REG
EFUSE_BLK1_WDATA0_REG
EFUSE_BLK1_WDATA1_REG
EFUSE_BLK1_WDATA2_REG
EFUSE_BLK1_WDATA3_REG
EFUSE_BLK1_WDATA4_REG
EFUSE_BLK1_WDATA5_REG
EFUSE_BLK1_WDATA6_REG
EFUSE_BLK1_WDATA7_REG
EFUSE_BLK2_DIN0
EFUSE_BLK2_DIN0_V
EFUSE_BLK2_DIN0_S
EFUSE_BLK2_DIN1
EFUSE_BLK2_DIN1_V
EFUSE_BLK2_DIN1_S
EFUSE_BLK2_DIN2
EFUSE_BLK2_DIN2_V
EFUSE_BLK2_DIN2_S
EFUSE_BLK2_DIN3
EFUSE_BLK2_DIN3_V
EFUSE_BLK2_DIN3_S
EFUSE_BLK2_DIN4
EFUSE_BLK2_DIN4_V
EFUSE_BLK2_DIN4_S
EFUSE_BLK2_DIN5
EFUSE_BLK2_DIN5_V
EFUSE_BLK2_DIN5_S
EFUSE_BLK2_DIN6
EFUSE_BLK2_DIN6_V
EFUSE_BLK2_DIN6_S
EFUSE_BLK2_DIN7
EFUSE_BLK2_DIN7_V
EFUSE_BLK2_DIN7_S
EFUSE_BLK2_DOUT0
EFUSE_BLK2_DOUT0_V
EFUSE_BLK2_DOUT0_S
EFUSE_BLK2_DOUT1
EFUSE_BLK2_DOUT1_V
EFUSE_BLK2_DOUT1_S
EFUSE_BLK2_DOUT2
EFUSE_BLK2_DOUT2_V
EFUSE_BLK2_DOUT2_S
EFUSE_BLK2_DOUT3
EFUSE_BLK2_DOUT3_V
EFUSE_BLK2_DOUT3_S
EFUSE_BLK2_DOUT4
EFUSE_BLK2_DOUT4_V
EFUSE_BLK2_DOUT4_S
EFUSE_BLK2_DOUT5
EFUSE_BLK2_DOUT5_V
EFUSE_BLK2_DOUT5_S
EFUSE_BLK2_DOUT6
EFUSE_BLK2_DOUT6_V
EFUSE_BLK2_DOUT6_S
EFUSE_BLK2_DOUT7
EFUSE_BLK2_DOUT7_V
EFUSE_BLK2_DOUT7_S
EFUSE_BLK2_RDATA0_REG
EFUSE_BLK2_RDATA1_REG
EFUSE_BLK2_RDATA2_REG
EFUSE_BLK2_RDATA3_REG
EFUSE_BLK2_RDATA4_REG
EFUSE_BLK2_RDATA5_REG
EFUSE_BLK2_RDATA6_REG
EFUSE_BLK2_RDATA7_REG
EFUSE_BLK2_WDATA0_REG
EFUSE_BLK2_WDATA1_REG
EFUSE_BLK2_WDATA2_REG
EFUSE_BLK2_WDATA3_REG
EFUSE_BLK2_WDATA4_REG
EFUSE_BLK2_WDATA5_REG
EFUSE_BLK2_WDATA6_REG
EFUSE_BLK2_WDATA7_REG
EFUSE_BLK3_DIN0
EFUSE_BLK3_DIN0_V
EFUSE_BLK3_DIN0_S
EFUSE_BLK3_DIN1
EFUSE_BLK3_DIN1_V
EFUSE_BLK3_DIN1_S
EFUSE_BLK3_DIN2
EFUSE_BLK3_DIN2_V
EFUSE_BLK3_DIN2_S
EFUSE_BLK3_DIN3
EFUSE_BLK3_DIN3_V
EFUSE_BLK3_DIN3_S
EFUSE_BLK3_DIN4
EFUSE_BLK3_DIN4_V
EFUSE_BLK3_DIN4_S
EFUSE_BLK3_DIN5
EFUSE_BLK3_DIN5_V
EFUSE_BLK3_DIN5_S
EFUSE_BLK3_DIN6
EFUSE_BLK3_DIN6_V
EFUSE_BLK3_DIN6_S
EFUSE_BLK3_DIN7
EFUSE_BLK3_DIN7_V
EFUSE_BLK3_DIN7_S
EFUSE_BLK3_DOUT0
EFUSE_BLK3_DOUT0_V
EFUSE_BLK3_DOUT0_S
EFUSE_BLK3_DOUT1
EFUSE_BLK3_DOUT1_V
EFUSE_BLK3_DOUT1_S
EFUSE_BLK3_DOUT2
EFUSE_BLK3_DOUT2_V
EFUSE_BLK3_DOUT2_S
EFUSE_BLK3_DOUT3
EFUSE_BLK3_DOUT3_V
EFUSE_BLK3_DOUT3_S
EFUSE_BLK3_DOUT4
EFUSE_BLK3_DOUT4_V
EFUSE_BLK3_DOUT4_S
EFUSE_BLK3_DOUT5
EFUSE_BLK3_DOUT5_V
EFUSE_BLK3_DOUT5_S
EFUSE_BLK3_DOUT6
EFUSE_BLK3_DOUT6_V
EFUSE_BLK3_DOUT6_S
EFUSE_BLK3_DOUT7
EFUSE_BLK3_DOUT7_V
EFUSE_BLK3_DOUT7_S
EFUSE_BLK3_RDATA0_REG
EFUSE_BLK3_RDATA1_REG
EFUSE_BLK3_RDATA2_REG
EFUSE_BLK3_RDATA3_REG
EFUSE_BLK3_RDATA4_REG
EFUSE_BLK3_RDATA5_REG
EFUSE_BLK3_RDATA6_REG
EFUSE_BLK3_RDATA7_REG
EFUSE_BLK3_WDATA0_REG
EFUSE_BLK3_WDATA1_REG
EFUSE_BLK3_WDATA2_REG
EFUSE_BLK3_WDATA3_REG
EFUSE_BLK3_WDATA4_REG
EFUSE_BLK3_WDATA5_REG
EFUSE_BLK3_WDATA6_REG
EFUSE_BLK3_WDATA7_REG
EFUSE_CAL_RESERVED
EFUSE_CAL_RESERVED_S
EFUSE_CAL_RESERVED_V
EFUSE_CHIP_CPU_FREQ_LOW_S
EFUSE_CHIP_CPU_FREQ_LOW_V
EFUSE_CHIP_CPU_FREQ_RATED_S
EFUSE_CHIP_CPU_FREQ_RATED_V
EFUSE_CHIP_VER_32PAD_V
EFUSE_CHIP_VER_32PAD_S
EFUSE_CHIP_VER_DIS_APP_CPU_S
EFUSE_CHIP_VER_DIS_APP_CPU_V
EFUSE_CHIP_VER_DIS_BT_S
EFUSE_CHIP_VER_DIS_BT_V
EFUSE_CHIP_VER_DIS_CACHE_S
EFUSE_CHIP_VER_DIS_CACHE_V
EFUSE_CHIP_VER_PKG
EFUSE_CHIP_VER_PKG_ESP32D0WDQ5
EFUSE_CHIP_VER_PKG_ESP32D0WDQ6
EFUSE_CHIP_VER_PKG_ESP32D2WDQ5
EFUSE_CHIP_VER_PKG_ESP32PICOD2
EFUSE_CHIP_VER_PKG_ESP32PICOD4
EFUSE_CHIP_VER_PKG_S
EFUSE_CHIP_VER_PKG_V
EFUSE_CHIP_VER_REV1_V
EFUSE_CHIP_VER_REV1_S
EFUSE_CK8M_FREQ
EFUSE_CK8M_FREQ_V
EFUSE_CK8M_FREQ_S
EFUSE_CLK_EN_S
EFUSE_CLK_EN_V
EFUSE_CLK_REG
EFUSE_CLK_SEL0
EFUSE_CLK_SEL0_V
EFUSE_CLK_SEL0_S
EFUSE_CLK_SEL1
EFUSE_CLK_SEL1_V
EFUSE_CLK_SEL1_S
EFUSE_CMD_REG
EFUSE_CODING_SCHEME
EFUSE_CODING_SCHEME_S
EFUSE_CODING_SCHEME_V
EFUSE_CODING_SCHEME_VAL_34
EFUSE_CODING_SCHEME_VAL_NONE
EFUSE_CODING_SCHEME_VAL_REPEAT
EFUSE_CONF_REG
EFUSE_CONSOLE_DEBUG_DISABLE_S
EFUSE_CONSOLE_DEBUG_DISABLE_V
EFUSE_DAC_CLK_DIV
EFUSE_DAC_CLK_DIV_S
EFUSE_DAC_CLK_DIV_V
EFUSE_DAC_CLK_PAD_SEL_S
EFUSE_DAC_CLK_PAD_SEL_V
EFUSE_DAC_CONF_REG
EFUSE_DATE
EFUSE_DATE_REG
EFUSE_DATE_S
EFUSE_DATE_V
EFUSE_DEBUG
EFUSE_DEBUG_S
EFUSE_DEBUG_V
EFUSE_DEC_STATUS_REG
EFUSE_DEC_WARNINGS
EFUSE_DEC_WARNINGS_S
EFUSE_DEC_WARNINGS_V
EFUSE_DIG_VOL_L6
EFUSE_DIG_VOL_L6_M
EFUSE_DIG_VOL_L6_V
EFUSE_DIG_VOL_L6_S
EFUSE_DISABLE_DL_CACHE_S
EFUSE_DISABLE_DL_CACHE_V
EFUSE_DISABLE_DL_DECRYPT_S
EFUSE_DISABLE_DL_DECRYPT_V
EFUSE_DISABLE_DL_ENCRYPT_S
EFUSE_DISABLE_DL_ENCRYPT_V
EFUSE_DISABLE_JTAG_S
EFUSE_DISABLE_JTAG_V
EFUSE_DISABLE_SDIO_HOST_S
EFUSE_DISABLE_SDIO_HOST_V
EFUSE_FLASH_CRYPT_CNT
EFUSE_FLASH_CRYPT_CNT_S
EFUSE_FLASH_CRYPT_CNT_V
EFUSE_FLASH_CRYPT_CONFIG
EFUSE_FLASH_CRYPT_CONFIG_S
EFUSE_FLASH_CRYPT_CONFIG_V
EFUSE_FORCE_NO_WR_RD_DIS_S
EFUSE_FORCE_NO_WR_RD_DIS_V
EFUSE_INST_CONFIG
EFUSE_INST_CONFIG_S
EFUSE_INST_CONFIG_V
EFUSE_INT_CLR_REG
EFUSE_INT_ENA_REG
EFUSE_INT_RAW_REG
EFUSE_INT_ST_REG
EFUSE_KEY_STATUS_S
EFUSE_KEY_STATUS_V
EFUSE_OP_CODE
EFUSE_OP_CODE_S
EFUSE_OP_CODE_V
EFUSE_PGM_CMD_S
EFUSE_PGM_CMD_V
EFUSE_PGM_DONE_INT_CLR_S
EFUSE_PGM_DONE_INT_CLR_V
EFUSE_PGM_DONE_INT_ENA_S
EFUSE_PGM_DONE_INT_ENA_V
EFUSE_PGM_DONE_INT_RAW_S
EFUSE_PGM_DONE_INT_RAW_V
EFUSE_PGM_DONE_INT_ST_S
EFUSE_PGM_DONE_INT_ST_V
EFUSE_RD_ABS_DONE_0_V
EFUSE_RD_ABS_DONE_0_S
EFUSE_RD_ABS_DONE_1_V
EFUSE_RD_ABS_DONE_1_S
EFUSE_RD_ADC1_TP_HIGH
EFUSE_RD_ADC1_TP_HIGH_V
EFUSE_RD_ADC1_TP_HIGH_S
EFUSE_RD_ADC1_TP_LOW
EFUSE_RD_ADC1_TP_LOW_V
EFUSE_RD_ADC1_TP_LOW_S
EFUSE_RD_ADC2_TP_HIGH
EFUSE_RD_ADC2_TP_HIGH_V
EFUSE_RD_ADC2_TP_HIGH_S
EFUSE_RD_ADC2_TP_LOW
EFUSE_RD_ADC2_TP_LOW_V
EFUSE_RD_ADC2_TP_LOW_S
EFUSE_RD_ADC_VREF
EFUSE_RD_ADC_VREF_S
EFUSE_RD_ADC_VREF_V
EFUSE_RD_BLK3_PART_RESERVE_V
EFUSE_RD_BLK3_PART_RESERVE_S
EFUSE_RD_CAL_RESERVED
EFUSE_RD_CAL_RESERVED_S
EFUSE_RD_CAL_RESERVED_V
EFUSE_RD_CHIP_CPU_FREQ_LOW_S
EFUSE_RD_CHIP_CPU_FREQ_LOW_V
EFUSE_RD_CHIP_CPU_FREQ_RATED_S
EFUSE_RD_CHIP_CPU_FREQ_RATED_V
EFUSE_RD_CHIP_VER_32PAD_V
EFUSE_RD_CHIP_VER_32PAD_S
EFUSE_RD_CHIP_VER_DIS_APP_CPU_S
EFUSE_RD_CHIP_VER_DIS_APP_CPU_V
EFUSE_RD_CHIP_VER_DIS_BT_S
EFUSE_RD_CHIP_VER_DIS_BT_V
EFUSE_RD_CHIP_VER_DIS_CACHE_S
EFUSE_RD_CHIP_VER_DIS_CACHE_V
EFUSE_RD_CHIP_VER_PKG
EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ5
EFUSE_RD_CHIP_VER_PKG_ESP32D0WDQ6
EFUSE_RD_CHIP_VER_PKG_ESP32D2WDQ5
EFUSE_RD_CHIP_VER_PKG_ESP32PICOD2
EFUSE_RD_CHIP_VER_PKG_ESP32PICOD4
EFUSE_RD_CHIP_VER_PKG_S
EFUSE_RD_CHIP_VER_PKG_V
EFUSE_RD_CHIP_VER_REV1_V
EFUSE_RD_CHIP_VER_REV1_S
EFUSE_RD_CK8M_FREQ
EFUSE_RD_CK8M_FREQ_V
EFUSE_RD_CK8M_FREQ_S
EFUSE_RD_CODING_SCHEME
EFUSE_RD_CODING_SCHEME_S
EFUSE_RD_CODING_SCHEME_V
EFUSE_RD_CONSOLE_DEBUG_DISABLE_S
EFUSE_RD_CONSOLE_DEBUG_DISABLE_V
EFUSE_RD_DIG_VOL_L6
EFUSE_RD_DIG_VOL_L6_V
EFUSE_RD_DIG_VOL_L6_S
EFUSE_RD_DIS
EFUSE_RD_DISABLE_DL_CACHE_S
EFUSE_RD_DISABLE_DL_CACHE_V
EFUSE_RD_DISABLE_DL_DECRYPT_S
EFUSE_RD_DISABLE_DL_DECRYPT_V
EFUSE_RD_DISABLE_DL_ENCRYPT_S
EFUSE_RD_DISABLE_DL_ENCRYPT_V
EFUSE_RD_DISABLE_JTAG_S
EFUSE_RD_DISABLE_JTAG_V
EFUSE_RD_DISABLE_SDIO_HOST_S
EFUSE_RD_DISABLE_SDIO_HOST_V
EFUSE_RD_DIS_BLK0_PARTIAL
EFUSE_RD_DIS_BLK1
EFUSE_RD_DIS_BLK2
EFUSE_RD_DIS_BLK3
EFUSE_RD_DIS_S
EFUSE_RD_DIS_V
EFUSE_RD_EFUSE_RD_DIS
EFUSE_RD_EFUSE_RD_DIS_S
EFUSE_RD_EFUSE_RD_DIS_V
EFUSE_RD_EFUSE_WR_DIS
EFUSE_RD_EFUSE_WR_DIS_S
EFUSE_RD_EFUSE_WR_DIS_V
EFUSE_RD_FLASH_CRYPT_CNT
EFUSE_RD_FLASH_CRYPT_CNT_S
EFUSE_RD_FLASH_CRYPT_CNT_V
EFUSE_RD_FLASH_CRYPT_CONFIG
EFUSE_RD_FLASH_CRYPT_CONFIG_S
EFUSE_RD_FLASH_CRYPT_CONFIG_V
EFUSE_RD_INST_CONFIG
EFUSE_RD_INST_CONFIG_S
EFUSE_RD_INST_CONFIG_V
EFUSE_RD_KEY_STATUS_S
EFUSE_RD_KEY_STATUS_V
EFUSE_RD_SDIO_DREFH
EFUSE_RD_SDIO_DREFH_S
EFUSE_RD_SDIO_DREFH_V
EFUSE_RD_SDIO_DREFL
EFUSE_RD_SDIO_DREFL_S
EFUSE_RD_SDIO_DREFL_V
EFUSE_RD_SDIO_DREFM
EFUSE_RD_SDIO_DREFM_S
EFUSE_RD_SDIO_DREFM_V
EFUSE_RD_SDIO_FORCE_S
EFUSE_RD_SDIO_FORCE_V
EFUSE_RD_SDIO_TIEH_S
EFUSE_RD_SDIO_TIEH_V
EFUSE_RD_SPI_PAD_CONFIG_CLK
EFUSE_RD_SPI_PAD_CONFIG_CLK_S
EFUSE_RD_SPI_PAD_CONFIG_CLK_V
EFUSE_RD_SPI_PAD_CONFIG_CS0
EFUSE_RD_SPI_PAD_CONFIG_CS0_V
EFUSE_RD_SPI_PAD_CONFIG_CS0_S
EFUSE_RD_SPI_PAD_CONFIG_D
EFUSE_RD_SPI_PAD_CONFIG_D_S
EFUSE_RD_SPI_PAD_CONFIG_D_V
EFUSE_RD_SPI_PAD_CONFIG_HD
EFUSE_RD_SPI_PAD_CONFIG_HD_S
EFUSE_RD_SPI_PAD_CONFIG_HD_V
EFUSE_RD_SPI_PAD_CONFIG_Q
EFUSE_RD_SPI_PAD_CONFIG_Q_S
EFUSE_RD_SPI_PAD_CONFIG_Q_V
EFUSE_RD_VOL_LEVEL_HP_INV
EFUSE_RD_VOL_LEVEL_HP_INV_S
EFUSE_RD_VOL_LEVEL_HP_INV_V
EFUSE_RD_WIFI_MAC_CRC_HIGH
EFUSE_RD_WIFI_MAC_CRC_HIGH_S
EFUSE_RD_WIFI_MAC_CRC_HIGH_V
EFUSE_RD_WIFI_MAC_CRC_LOW
EFUSE_RD_WIFI_MAC_CRC_LOW_S
EFUSE_RD_WIFI_MAC_CRC_LOW_V
EFUSE_RD_XPD_SDIO_REG_S
EFUSE_RD_XPD_SDIO_REG_V
EFUSE_READ_CMD_S
EFUSE_READ_CMD_V
EFUSE_READ_DONE_INT_CLR_S
EFUSE_READ_DONE_INT_CLR_V
EFUSE_READ_DONE_INT_ENA_S
EFUSE_READ_DONE_INT_ENA_V
EFUSE_READ_DONE_INT_RAW_S
EFUSE_READ_DONE_INT_RAW_V
EFUSE_READ_DONE_INT_ST_S
EFUSE_READ_DONE_INT_ST_V
EFUSE_SDIO_DREFH
EFUSE_SDIO_DREFH_S
EFUSE_SDIO_DREFH_V
EFUSE_SDIO_DREFL
EFUSE_SDIO_DREFL_S
EFUSE_SDIO_DREFL_V
EFUSE_SDIO_DREFM
EFUSE_SDIO_DREFM_S
EFUSE_SDIO_DREFM_V
EFUSE_SDIO_FORCE_S
EFUSE_SDIO_FORCE_V
EFUSE_SDIO_TIEH_S
EFUSE_SDIO_TIEH_V
EFUSE_SPI_PAD_CONFIG_CLK
EFUSE_SPI_PAD_CONFIG_CLK_S
EFUSE_SPI_PAD_CONFIG_CLK_V
EFUSE_SPI_PAD_CONFIG_CS0
EFUSE_SPI_PAD_CONFIG_CS0_V
EFUSE_SPI_PAD_CONFIG_CS0_S
EFUSE_SPI_PAD_CONFIG_D
EFUSE_SPI_PAD_CONFIG_D_S
EFUSE_SPI_PAD_CONFIG_D_V
EFUSE_SPI_PAD_CONFIG_HD
EFUSE_SPI_PAD_CONFIG_HD_S
EFUSE_SPI_PAD_CONFIG_HD_V
EFUSE_SPI_PAD_CONFIG_Q
EFUSE_SPI_PAD_CONFIG_Q_S
EFUSE_SPI_PAD_CONFIG_Q_V
EFUSE_STATUS_REG
EFUSE_VOL_LEVEL_HP_INV
EFUSE_VOL_LEVEL_HP_INV_M
EFUSE_VOL_LEVEL_HP_INV_S
EFUSE_VOL_LEVEL_HP_INV_V
EFUSE_WIFI_MAC_CRC_HIGH
EFUSE_WIFI_MAC_CRC_HIGH_S
EFUSE_WIFI_MAC_CRC_HIGH_V
EFUSE_WIFI_MAC_CRC_LOW
EFUSE_WIFI_MAC_CRC_LOW_S
EFUSE_WIFI_MAC_CRC_LOW_V
EFUSE_WR_DIS
EFUSE_WR_DIS_ABS_DONE_0
EFUSE_WR_DIS_ABS_DONE_1
EFUSE_WR_DIS_BLK1
EFUSE_WR_DIS_BLK2
EFUSE_WR_DIS_BLK3
EFUSE_WR_DIS_CONSOLE_DL_DISABLE
EFUSE_WR_DIS_FLASH_CRYPT_CNT
EFUSE_WR_DIS_FLASH_CRYPT_CODING_SCHEME
EFUSE_WR_DIS_JTAG_DISABLE
EFUSE_WR_DIS_MAC_SPI_CONFIG_HD
EFUSE_WR_DIS_RD_DIS
EFUSE_WR_DIS_S
EFUSE_WR_DIS_SPI_PAD_CONFIG
EFUSE_WR_DIS_V
EFUSE_WR_DIS_WR_DIS
EFUSE_WR_DIS_XPD_SDIO
EFUSE_XPD_SDIO_REG_S
EFUSE_XPD_SDIO_REG_V
EHOSTDOWN
EHOSTUNREACH
EIDRM
EILSEQ
EINPROGRESS
EINTR
EINVAL
EIO
EISCONN
EISDIR
ELOOP
EMAC_COL_I_IDX
EMAC_COL_O_IDX
EMAC_CRS_I_IDX
EMAC_CRS_O_IDX
EMAC_MDC_I_IDX
EMAC_MDC_O_IDX
EMAC_MDI_I_IDX
EMAC_MDO_O_IDX
EMFILE
EMLINK
EMSGSIZE
EMULTIHOP
ENAMETOOLONG
ENETDOWN
ENETRESET
ENETUNREACH
ENFILE
ENOBUFS
ENODATA
ENODEV
ENOENT
ENOEXEC
ENOLCK
ENOLINK
ENOMEM
ENOMSG
ENOPROTOOPT
ENOSPC
ENOSR
ENOSTR
ENOSYS
ENOTCONN
ENOTDIR
ENOTEMPTY
ENOTRECOVERABLE
ENOTSOCK
ENOTSUP
ENOTTY
ENXIO
EOF
EOPNOTSUPP
EOVERFLOW
EOWNERDEAD
EPC
EPC_1
EPC_2
EPC_3
EPC_4
EPC_5
EPC_6
EPC_7
EPERM
EPFNOSUPPORT
EPIPE
EPROTO
EPROTONOSUPPORT
EPROTOTYPE
EPS
EPS_2
EPS_3
EPS_4
EPS_5
EPS_6
EPS_7
ERANGE
EROFS
ERR_NEED_SCHED
ESPIPE
ESP_APP_DESC_MAGIC_WORD
ESP_AUTO_IP
ESP_AUTO_RECV
ESP_BOOTLOADER_DIGEST_OFFSET
ESP_BOOTLOADER_OFFSET
ESP_DHCP
ESP_DHCPS_TIMER
ESP_DNS
ESP_ERR_ESPNOW_ARG
ESP_ERR_ESPNOW_BASE
ESP_ERR_ESPNOW_EXIST
ESP_ERR_ESPNOW_FULL
ESP_ERR_ESPNOW_IF
ESP_ERR_ESPNOW_INTERNAL
ESP_ERR_ESPNOW_NOT_FOUND
ESP_ERR_ESPNOW_NOT_INIT
ESP_ERR_ESPNOW_NO_MEM
ESP_ERR_ESP_NETIF_BASE
ESP_ERR_ESP_NETIF_DHCPC_START_FAILED
ESP_ERR_ESP_NETIF_DHCP_ALREADY_STARTED
ESP_ERR_ESP_NETIF_DHCP_ALREADY_STOPPED
ESP_ERR_ESP_NETIF_DHCP_NOT_STOPPED
ESP_ERR_ESP_NETIF_DNS_NOT_CONFIGURED
ESP_ERR_ESP_NETIF_DRIVER_ATTACH_FAILED
ESP_ERR_ESP_NETIF_IF_NOT_READY
ESP_ERR_ESP_NETIF_INIT_FAILED
ESP_ERR_ESP_NETIF_INVALID_PARAMS
ESP_ERR_ESP_NETIF_NO_MEM
ESP_ERR_FLASH_BASE
ESP_ERR_FLASH_NOT_INITIALISED
ESP_ERR_FLASH_NO_RESPONSE
ESP_ERR_FLASH_OP_FAIL
ESP_ERR_FLASH_OP_TIMEOUT
ESP_ERR_FLASH_PROTECTED
ESP_ERR_FLASH_SIZE_NOT_MATCH
ESP_ERR_FLASH_UNSUPPORTED_CHIP
ESP_ERR_FLASH_UNSUPPORTED_HOST
ESP_ERR_IMAGE_BASE
ESP_ERR_IMAGE_FLASH_FAIL
ESP_ERR_IMAGE_INVALID
ESP_ERR_INVALID_ARG
ESP_ERR_INVALID_CRC
ESP_ERR_INVALID_MAC
ESP_ERR_INVALID_RESPONSE
ESP_ERR_INVALID_SIZE
ESP_ERR_INVALID_STATE
ESP_ERR_INVALID_VERSION
ESP_ERR_MESH_BASE
ESP_ERR_NOT_FOUND
ESP_ERR_NOT_SUPPORTED
ESP_ERR_NO_MEM
ESP_ERR_NVS_BASE
ESP_ERR_NVS_CONTENT_DIFFERS
ESP_ERR_NVS_CORRUPT_KEY_PART
ESP_ERR_NVS_ENCR_NOT_SUPPORTED
ESP_ERR_NVS_INVALID_HANDLE
ESP_ERR_NVS_INVALID_LENGTH
ESP_ERR_NVS_INVALID_NAME
ESP_ERR_NVS_INVALID_STATE
ESP_ERR_NVS_KEYS_NOT_INITIALIZED
ESP_ERR_NVS_KEY_TOO_LONG
ESP_ERR_NVS_NEW_VERSION_FOUND
ESP_ERR_NVS_NOT_ENOUGH_SPACE
ESP_ERR_NVS_NOT_FOUND
ESP_ERR_NVS_NOT_INITIALIZED
ESP_ERR_NVS_NO_FREE_PAGES
ESP_ERR_NVS_PAGE_FULL
ESP_ERR_NVS_PART_NOT_FOUND
ESP_ERR_NVS_READ_ONLY
ESP_ERR_NVS_REMOVE_FAILED
ESP_ERR_NVS_TYPE_MISMATCH
ESP_ERR_NVS_VALUE_TOO_LONG
ESP_ERR_NVS_XTS_CFG_FAILED
ESP_ERR_NVS_XTS_CFG_NOT_FOUND
ESP_ERR_NVS_XTS_DECR_FAILED
ESP_ERR_NVS_XTS_ENCR_FAILED
ESP_ERR_OTA_BASE
ESP_ERR_OTA_PARTITION_CONFLICT
ESP_ERR_OTA_ROLLBACK_FAILED
ESP_ERR_OTA_ROLLBACK_INVALID_STATE
ESP_ERR_OTA_SELECT_INFO_INVALID
ESP_ERR_OTA_SMALL_SEC_VER
ESP_ERR_OTA_VALIDATE_FAILED
ESP_ERR_TIMEOUT
ESP_ERR_WIFI_BASE
ESP_ERR_WIFI_CONN
ESP_ERR_WIFI_IF
ESP_ERR_WIFI_INIT_STATE
ESP_ERR_WIFI_MAC
ESP_ERR_WIFI_MODE
ESP_ERR_WIFI_NOT_CONNECT
ESP_ERR_WIFI_NOT_INIT
ESP_ERR_WIFI_NOT_STARTED
ESP_ERR_WIFI_NOT_STOPPED
ESP_ERR_WIFI_NVS
ESP_ERR_WIFI_PASSWORD
ESP_ERR_WIFI_POST
ESP_ERR_WIFI_SSID
ESP_ERR_WIFI_STATE
ESP_ERR_WIFI_STOP_STATE
ESP_ERR_WIFI_TIMEOUT
ESP_ERR_WIFI_WAKE_FAIL
ESP_ERR_WIFI_WOULD_BLOCK
ESP_EVENT_ANY_ID
ESP_FAIL
ESP_HAS_SELECT
ESP_IDF_VERSION_MAJOR
ESP_IDF_VERSION_MINOR
ESP_IDF_VERSION_PATCH
ESP_IMAGE_HASH_LEN
ESP_IMAGE_HEADER_MAGIC
ESP_IMAGE_MAX_SEGMENTS
ESP_INTR_FLAG_EDGE
ESP_INTR_FLAG_HIGH
ESP_INTR_FLAG_INTRDISABLED
ESP_INTR_FLAG_IRAM
ESP_INTR_FLAG_LEVEL1
ESP_INTR_FLAG_LEVEL2
ESP_INTR_FLAG_LEVEL3
ESP_INTR_FLAG_LEVEL4
ESP_INTR_FLAG_LEVEL5
ESP_INTR_FLAG_LEVEL6
ESP_INTR_FLAG_LEVELMASK
ESP_INTR_FLAG_LOWMED
ESP_INTR_FLAG_NMI
ESP_INTR_FLAG_SHARED
ESP_IP4_ATON
ESP_IP4_ROUTE
ESP_IPADDR_TYPE_ANY
ESP_IPADDR_TYPE_V4
ESP_IPADDR_TYPE_V6
ESP_IPV6
ESP_IPV6_AUTOCONFIG
ESP_LIGHT_SLEEP
ESP_LWIP
ESP_LWIP_ARP
ESP_LWIP_IGMP_TIMERS_ONDEMAND
ESP_LWIP_LOCK
ESP_LWIP_MLD6_TIMERS_ONDEMAND
ESP_LWIP_SELECT
ESP_NOW_ETH_ALEN
ESP_NOW_KEY_LEN
ESP_NOW_MAX_DATA_LEN
ESP_NOW_MAX_ENCRYPT_PEER_NUM
ESP_NOW_MAX_TOTAL_PEER_NUM
ESP_OK
ESP_PARTITION_MAGIC
ESP_PARTITION_MAGIC_MD5
ESP_PARTITION_TABLE_MAX_LEN
ESP_PARTITION_TABLE_OFFSET
ESP_PBUF
ESP_PERF
ESP_PER_SOC_TCP_WND
ESP_PING
ESP_PPP
ESP_RANDOM_TCP_PORT
ESP_SOCKET
ESP_STATS_TCP
ESP_TASKD_EVENT_PRIO
ESP_TASK_BT_CONTROLLER_PRIO
ESP_TASK_BT_CONTROLLER_STACK
ESP_TASK_MAIN_PRIO
ESP_TASK_PRIO_MAX
ESP_TASK_PRIO_MIN
ESP_TASK_TCPIP_PRIO
ESP_TASK_TIMER_PRIO
ESP_THREAD_SAFE
ESP_WIFI_CRYPTO_VERSION
ESP_WIFI_MAX_CONN_NUM
ESP_WIFI_OS_ADAPTER_MAGIC
ESP_WIFI_OS_ADAPTER_VERSION
ESRCH
ESTALE
ETHARP_STATS
ETHARP_SUPPORT_STATIC_ENTRIES
ETHARP_SUPPORT_VLAN
ETH_PAD_SIZE
ETIME
ETIMEDOUT
ETOOMANYREFS
ETS_BT_BB_INTR_SOURCE
ETS_BT_BB_NMI_SOURCE
ETS_BT_HOST_INUM
ETS_BT_MAC_INTR_SOURCE
ETS_CACHEERR_INUM
ETS_CACHE_IA_INTR_SOURCE
ETS_CAN_INTR_SOURCE
ETS_DPORT_INUM
ETS_EFUSE_INTR_SOURCE
ETS_ETH_MAC_INTR_SOURCE
ETS_FRC1_INUM
ETS_FROM_CPU_INTR0_SOURCE
ETS_FROM_CPU_INTR1_SOURCE
ETS_FROM_CPU_INTR2_SOURCE
ETS_FROM_CPU_INTR3_SOURCE
ETS_GPIO_INTR_SOURCE
ETS_GPIO_NMI_SOURCE
ETS_I2C_EXT0_INTR_SOURCE
ETS_I2C_EXT1_INTR_SOURCE
ETS_I2S0_INTR_SOURCE
ETS_I2S1_INTR_SOURCE
ETS_INTERNAL_INTR_SOURCE_OFF
ETS_INTERNAL_PROFILING_INTR_SOURCE
ETS_INTERNAL_SW0_INTR_SOURCE
ETS_INTERNAL_SW1_INTR_SOURCE
ETS_INTERNAL_TIMER0_INTR_SOURCE
ETS_INTERNAL_TIMER1_INTR_SOURCE
ETS_INTERNAL_TIMER2_INTR_SOURCE
ETS_INVALID_INUM
ETS_LEDC_INTR_SOURCE
ETS_MAX_INTR_SOURCE
ETS_MEMACCESS_ERR_INUM
ETS_MMU_IA_INTR_SOURCE
ETS_MPU_IA_INTR_SOURCE
ETS_PCNT_INTR_SOURCE
ETS_PWM0_INTR_SOURCE
ETS_PWM1_INTR_SOURCE
ETS_PWM2_INTR_SOURCE
ETS_PWM3_INTR_SOURCE
ETS_RMT_INTR_SOURCE
ETS_RSA_INTR_SOURCE
ETS_RTC_CORE_INTR_SOURCE
ETS_RWBLE_INTR_SOURCE
ETS_RWBLE_NMI_SOURCE
ETS_RWBT_INTR_SOURCE
ETS_RWBT_NMI_SOURCE
ETS_SDIO_HOST_INTR_SOURCE
ETS_SLC0_INTR_SOURCE
ETS_SLC1_INTR_SOURCE
ETS_SLC_INUM
ETS_SPI0_INTR_SOURCE
ETS_SPI1_INTR_SOURCE
ETS_SPI1_DMA_INTR_SOURCE
ETS_SPI2_INTR_SOURCE
ETS_SPI2_DMA_INTR_SOURCE
ETS_SPI3_INTR_SOURCE
ETS_SPI3_DMA_INTR_SOURCE
ETS_T1_WDT_INUM
ETS_TG0_WDT_EDGE_INTR_SOURCE
ETS_TG0_WDT_LEVEL_INTR_SOURCE
ETS_TG0_LACT_EDGE_INTR_SOURCE
ETS_TG0_LACT_LEVEL_INTR_SOURCE
ETS_TG1_WDT_LEVEL_INTR_SOURCE
ETS_TG1_LACT_LEVEL_INTR_SOURCE
ETS_TG1_WDT_EDGE_INTR_SOURCE
ETS_TG1_LACT_EDGE_INTR_SOURCE
ETS_TG0_T0_EDGE_INTR_SOURCE
ETS_TG0_T0_LEVEL_INTR_SOURCE
ETS_TG0_T1_LEVEL_INTR_SOURCE
ETS_TG0_T1_EDGE_INTR_SOURCE
ETS_TG0_T1_INUM
ETS_TG1_T0_EDGE_INTR_SOURCE
ETS_TG1_T0_LEVEL_INTR_SOURCE
ETS_TG1_T1_LEVEL_INTR_SOURCE
ETS_TG1_T1_EDGE_INTR_SOURCE
ETS_TIMER1_INTR_SOURCE
ETS_TIMER2_INTR_SOURCE
ETS_UART0_INUM
ETS_UART0_INTR_SOURCE
ETS_UART1_INTR_SOURCE
ETS_UART1_INUM
ETS_UART2_INTR_SOURCE
ETS_UHCI0_INTR_SOURCE
ETS_UHCI1_INTR_SOURCE
ETS_WBB_INUM
ETS_WDT_INTR_SOURCE
ETS_WIFI_BB_INTR_SOURCE
ETS_WIFI_MAC_INTR_SOURCE
ETS_WIFI_MAC_NMI_SOURCE
ETS_WMAC_INUM
ETXTBSY
EWOULDBLOCK
EXCCAUSE
EXCCAUSE_ALLOCA
EXCCAUSE_CP0_DISABLED
EXCCAUSE_CP1_DISABLED
EXCCAUSE_CP2_DISABLED
EXCCAUSE_CP3_DISABLED
EXCCAUSE_CP4_DISABLED
EXCCAUSE_CP5_DISABLED
EXCCAUSE_CP6_DISABLED
EXCCAUSE_CP7_DISABLED
EXCCAUSE_DIVIDE_BY_ZERO
EXCCAUSE_DTLB_MISS
EXCCAUSE_DTLB_MULTIHIT
EXCCAUSE_EXCCAUSE_MASK
EXCCAUSE_EXCCAUSE_SHIFT
EXCCAUSE_EXCLUSIVE_ERROR
EXCCAUSE_EXTREG_PRIVILEGE
EXCCAUSE_IFETCHERROR
EXCCAUSE_ILLEGAL
EXCCAUSE_INSTR_ADDR_ERROR
EXCCAUSE_INSTR_DATA_ERROR
EXCCAUSE_INSTR_ERROR
EXCCAUSE_INSTR_PROHIBITED
EXCCAUSE_INSTR_RING
EXCCAUSE_ITLB_MISS
EXCCAUSE_ITLB_MULTIHIT
EXCCAUSE_LEVEL1_INTERRUPT
EXCCAUSE_LEVEL1INTERRUPT
EXCCAUSE_LOADSTOREERROR
EXCCAUSE_LOAD_PROHIBITED
EXCCAUSE_LOAD_STORE_ADDR_ERROR
EXCCAUSE_LOAD_STORE_DATA_ERROR
EXCCAUSE_LOAD_STORE_ERROR
EXCCAUSE_LOAD_STORE_RING
EXCCAUSE_PC_ERROR
EXCCAUSE_PRIVILEGED
EXCCAUSE_SPECULATION
EXCCAUSE_STORE_PROHIBITED
EXCCAUSE_SYSCALL
EXCCAUSE_UNALIGNED
EXCSAVE
EXCSAVE_1
EXCSAVE_2
EXCSAVE_3
EXCSAVE_4
EXCSAVE_5
EXCSAVE_6
EXCSAVE_7
EXCVADDR
EXDEV
EXIT_FAILURE
EXIT_SUCCESS
EXT_ADC_START_IDX
EXT_I2C_SCL_O_IDX
EXT_I2C_SDA_O_IDX
EXT_I2C_SDA_I_IDX
FAPPEND
FASYNC
FCREAT
FDEFER
FD_CLOEXEC
FD_SETSIZE
FEXCL
FEXLOCK
FILENAME_MAX
FMARK
FNBIO
FNDELAY
FNOCTTY
FNONBIO
FNONBLOCK
FOPEN
FOPEN_MAX
FOUR_UNIVERSAL_MAC_ADDR
FREAD
FSHLOCK
FSYNC
FTRUNC
FUNC_GPIO0_EMAC_TX_CLK
FUNC_GPIO2_HSPIWP
FUNC_GPIO4_EMAC_TX_ER
FUNC_GPIO4_HSPIHD
FUNC_GPIO5_EMAC_RX_CLK
FUNC_GPIO16_EMAC_CLK_OUT
FUNC_GPIO18_VSPICLK
FUNC_GPIO19_VSPIQ
FUNC_GPIO21_EMAC_TX_EN
FUNC_GPIO21_VSPIHD
FUNC_GPIO22_VSPIWP
FUNC_GPIO23_VSPID
FUNC_GPIO27_EMAC_RX_DV
FUNC_GPIO0_CLK_OUT1
FUNC_GPIO0_GPIO0
FUNC_GPIO0_GPIO0_0
FUNC_GPIO16_GPIO16
FUNC_GPIO16_GPIO16_0
FUNC_GPIO16_HS1_DATA4
FUNC_GPIO16_U2RXD
FUNC_GPIO17_EMAC_CLK_OUT_180
FUNC_GPIO17_GPIO17
FUNC_GPIO17_GPIO17_0
FUNC_GPIO17_HS1_DATA5
FUNC_GPIO17_U2TXD
FUNC_GPIO18_GPIO18
FUNC_GPIO18_GPIO18_0
FUNC_GPIO18_HS1_DATA7
FUNC_GPIO19_EMAC_TXD0
FUNC_GPIO19_GPIO19
FUNC_GPIO19_GPIO19_0
FUNC_GPIO19_U0CTS
FUNC_GPIO20_GPIO20
FUNC_GPIO20_GPIO20_0
FUNC_GPIO21_GPIO21
FUNC_GPIO21_GPIO21_0
FUNC_GPIO22_EMAC_TXD1
FUNC_GPIO22_GPIO22
FUNC_GPIO22_GPIO22_0
FUNC_GPIO22_U0RTS
FUNC_GPIO23_GPIO23
FUNC_GPIO23_GPIO23_0
FUNC_GPIO23_HS1_STROBE
FUNC_GPIO24_GPIO24
FUNC_GPIO24_GPIO24_0
FUNC_GPIO25_EMAC_RXD0
FUNC_GPIO25_GPIO25
FUNC_GPIO25_GPIO25_0
FUNC_GPIO26_EMAC_RXD1
FUNC_GPIO26_GPIO26
FUNC_GPIO26_GPIO26_0
FUNC_GPIO27_GPIO27
FUNC_GPIO27_GPIO27_0
FUNC_GPIO2_GPIO2
FUNC_GPIO2_GPIO2_0
FUNC_GPIO2_HS2_DATA0
FUNC_GPIO2_SD_DATA0
FUNC_GPIO32_GPIO32
FUNC_GPIO32_GPIO32_0
FUNC_GPIO33_GPIO33
FUNC_GPIO33_GPIO33_0
FUNC_GPIO34_GPIO34
FUNC_GPIO34_GPIO34_0
FUNC_GPIO35_GPIO35
FUNC_GPIO35_GPIO35_0
FUNC_GPIO36_GPIO36
FUNC_GPIO36_GPIO36_0
FUNC_GPIO37_GPIO37
FUNC_GPIO37_GPIO37_0
FUNC_GPIO38_GPIO38
FUNC_GPIO38_GPIO38_0
FUNC_GPIO39_GPIO39
FUNC_GPIO39_GPIO39_0
FUNC_GPIO4_GPIO4
FUNC_GPIO4_GPIO4_0
FUNC_GPIO4_HS2_DATA1
FUNC_GPIO4_SD_DATA1
FUNC_GPIO5_GPIO5
FUNC_GPIO5_GPIO5_0
FUNC_GPIO5_HS1_DATA6
FUNC_GPIO5_VSPICS0
FUNC_MTCK_EMAC_RX_ER
FUNC_MTCK_GPIO13
FUNC_MTCK_HS2_DATA3
FUNC_MTCK_HSPID
FUNC_MTCK_MTCK
FUNC_MTCK_SD_DATA3
FUNC_MTDI_EMAC_TXD3
FUNC_MTDI_GPIO12
FUNC_MTDI_HS2_DATA2
FUNC_MTDI_HSPIQ
FUNC_MTDI_MTDI
FUNC_MTDI_SD_DATA2
FUNC_MTDO_EMAC_RXD3
FUNC_MTDO_GPIO15
FUNC_MTDO_HS2_CMD
FUNC_MTDO_HSPICS0
FUNC_MTDO_MTDO
FUNC_MTDO_SD_CMD
FUNC_MTMS_EMAC_TXD2
FUNC_MTMS_GPIO14
FUNC_MTMS_HS2_CLK
FUNC_MTMS_HSPICLK
FUNC_MTMS_MTMS
FUNC_MTMS_SD_CLK
FUNC_SD_CLK_GPIO6
FUNC_SD_CLK_HS1_CLK
FUNC_SD_CLK_SD_CLK
FUNC_SD_CLK_SPICLK
FUNC_SD_CLK_U1CTS
FUNC_SD_CMD_GPIO11
FUNC_SD_CMD_HS1_CMD
FUNC_SD_CMD_SD_CMD
FUNC_SD_CMD_SPICS0
FUNC_SD_CMD_U1RTS
FUNC_SD_DATA0_SPIQ
FUNC_SD_DATA1_SPID
FUNC_SD_DATA2_SPIHD
FUNC_SD_DATA3_SPIWP
FUNC_SD_DATA0_GPIO7
FUNC_SD_DATA0_HS1_DATA0
FUNC_SD_DATA0_SD_DATA0
FUNC_SD_DATA0_U2RTS
FUNC_SD_DATA1_GPIO8
FUNC_SD_DATA1_HS1_DATA1
FUNC_SD_DATA1_SD_DATA1
FUNC_SD_DATA1_U2CTS
FUNC_SD_DATA2_GPIO9
FUNC_SD_DATA2_HS1_DATA2
FUNC_SD_DATA2_SD_DATA2
FUNC_SD_DATA2_U1RXD
FUNC_SD_DATA3_GPIO10
FUNC_SD_DATA3_HS1_DATA3
FUNC_SD_DATA3_SD_DATA3
FUNC_SD_DATA3_U1TXD
FUNC_U0RXD_CLK_OUT2
FUNC_U0RXD_GPIO3
FUNC_U0RXD_U0RXD
FUNC_U0TXD_CLK_OUT3
FUNC_U0TXD_EMAC_RXD2
FUNC_U0TXD_GPIO1
FUNC_U0TXD_U0TXD
FUN_DRV
FUN_DRV_S
FUN_DRV_V
FUN_IE_S
FUN_IE_V
FUN_PD_S
FUN_PD_V
FUN_PU_S
FUN_PU_V
FWRITE
F_CNVT
F_DUPFD
F_DUPFD_CLOEXEC
F_GETFD
F_GETFL
F_GETLK
F_GETOWN
F_LOCK
F_OK
F_RDLCK
F_RGETLK
F_RSETLK
F_RSETLKW
F_SETFD
F_SETFL
F_SETLK
F_SETLKW
F_SETOWN
F_TEST
F_TLOCK
F_ULOCK
F_UNLCK
F_UNLKSYS
F_WRLCK
GPIO_ACPU_INT1_REG
GPIO_ACPU_INT_REG
GPIO_ACPU_NMI_INT1_REG
GPIO_ACPU_NMI_INT_REG
GPIO_APPCPU_INT
GPIO_APPCPU_INT_H
GPIO_APPCPU_INT_H_S
GPIO_APPCPU_INT_H_V
GPIO_APPCPU_INT_S
GPIO_APPCPU_INT_V
GPIO_APPCPU_NMI_INT
GPIO_APPCPU_NMI_INT_H
GPIO_APPCPU_NMI_INT_H_S
GPIO_APPCPU_NMI_INT_H_V
GPIO_APPCPU_NMI_INT_S
GPIO_APPCPU_NMI_INT_V
GPIO_BT_ACTIVE_IDX
GPIO_BT_PRIORITY_IDX
GPIO_BT_SEL
GPIO_BT_SELECT_REG
GPIO_BT_SEL_S
GPIO_BT_SEL_V
GPIO_CALI_RDY_REAL_S
GPIO_CALI_RDY_REAL_V
GPIO_CALI_RDY_SYNC2_V
GPIO_CALI_RDY_SYNC2_S
GPIO_CALI_RTC_MAX
GPIO_CALI_RTC_MAX_S
GPIO_CALI_RTC_MAX_V
GPIO_CALI_START_S
GPIO_CALI_START_V
GPIO_CALI_VALUE_SYNC2
GPIO_CALI_VALUE_SYNC2_V
GPIO_CALI_VALUE_SYNC2_S
GPIO_CPUSDIO_INT1_REG
GPIO_CPUSDIO_INT_REG
GPIO_ENABLE1_REG
GPIO_ENABLE1_DATA
GPIO_ENABLE1_DATA_V
GPIO_ENABLE1_DATA_S
GPIO_ENABLE1_DATA_W1TS
GPIO_ENABLE1_DATA_W1TS_V
GPIO_ENABLE1_DATA_W1TS_S
GPIO_ENABLE1_DATA_W1TC
GPIO_ENABLE1_DATA_W1TC_V
GPIO_ENABLE1_DATA_W1TC_S
GPIO_ENABLE1_W1TS_REG
GPIO_ENABLE1_W1TC_REG
GPIO_ENABLE_DATA
GPIO_ENABLE_DATA_S
GPIO_ENABLE_DATA_V
GPIO_ENABLE_DATA_W1TS
GPIO_ENABLE_DATA_W1TS_V
GPIO_ENABLE_DATA_W1TS_S
GPIO_ENABLE_DATA_W1TC
GPIO_ENABLE_DATA_W1TC_V
GPIO_ENABLE_DATA_W1TC_S
GPIO_ENABLE_REG
GPIO_ENABLE_W1TS_REG
GPIO_ENABLE_W1TC_REG
GPIO_FUNC0_IN_SEL
GPIO_FUNC0_OUT_SEL
GPIO_FUNC0_IN_SEL_V
GPIO_FUNC0_IN_SEL_S
GPIO_FUNC0_OEN_SEL_V
GPIO_FUNC0_OEN_SEL_S
GPIO_FUNC0_OUT_SEL_V
GPIO_FUNC0_OUT_SEL_S
GPIO_FUNC0_IN_INV_SEL_V
GPIO_FUNC0_IN_INV_SEL_S
GPIO_FUNC0_OEN_INV_SEL_V
GPIO_FUNC0_OEN_INV_SEL_S
GPIO_FUNC0_OUT_INV_SEL_V
GPIO_FUNC0_OUT_INV_SEL_S
GPIO_FUNC0_IN_SEL_CFG_REG
GPIO_FUNC0_OUT_SEL_CFG_REG
GPIO_FUNC1_IN_SEL_CFG_REG
GPIO_FUNC1_IN_INV_SEL_V
GPIO_FUNC1_IN_INV_SEL_S
GPIO_FUNC1_IN_SEL
GPIO_FUNC1_IN_SEL_V
GPIO_FUNC1_IN_SEL_S
GPIO_FUNC1_OUT_SEL_CFG_REG
GPIO_FUNC1_OEN_INV_SEL_V
GPIO_FUNC1_OEN_INV_SEL_S
GPIO_FUNC1_OEN_SEL_V
GPIO_FUNC1_OEN_SEL_S
GPIO_FUNC1_OUT_INV_SEL_V
GPIO_FUNC1_OUT_INV_SEL_S
GPIO_FUNC1_OUT_SEL
GPIO_FUNC1_OUT_SEL_V
GPIO_FUNC1_OUT_SEL_S
GPIO_FUNC2_IN_SEL_CFG_REG
GPIO_FUNC2_IN_INV_SEL_V
GPIO_FUNC2_IN_INV_SEL_S
GPIO_FUNC2_IN_SEL
GPIO_FUNC2_IN_SEL_V
GPIO_FUNC2_IN_SEL_S
GPIO_FUNC2_OUT_SEL_CFG_REG
GPIO_FUNC2_OEN_INV_SEL_V
GPIO_FUNC2_OEN_INV_SEL_S
GPIO_FUNC2_OEN_SEL_V
GPIO_FUNC2_OEN_SEL_S
GPIO_FUNC2_OUT_INV_SEL_V
GPIO_FUNC2_OUT_INV_SEL_S
GPIO_FUNC2_OUT_SEL
GPIO_FUNC2_OUT_SEL_V
GPIO_FUNC2_OUT_SEL_S
GPIO_FUNC3_IN_SEL_CFG_REG
GPIO_FUNC3_IN_INV_SEL_V
GPIO_FUNC3_IN_INV_SEL_S
GPIO_FUNC3_IN_SEL
GPIO_FUNC3_IN_SEL_V
GPIO_FUNC3_IN_SEL_S
GPIO_FUNC3_OUT_SEL_CFG_REG
GPIO_FUNC3_OEN_INV_SEL_V
GPIO_FUNC3_OEN_INV_SEL_S
GPIO_FUNC3_OEN_SEL_V
GPIO_FUNC3_OEN_SEL_S
GPIO_FUNC3_OUT_INV_SEL_V
GPIO_FUNC3_OUT_INV_SEL_S
GPIO_FUNC3_OUT_SEL
GPIO_FUNC3_OUT_SEL_V
GPIO_FUNC3_OUT_SEL_S
GPIO_FUNC4_IN_SEL_CFG_REG
GPIO_FUNC4_IN_INV_SEL_V
GPIO_FUNC4_IN_INV_SEL_S
GPIO_FUNC4_IN_SEL
GPIO_FUNC4_IN_SEL_V
GPIO_FUNC4_IN_SEL_S
GPIO_FUNC4_OUT_SEL_CFG_REG
GPIO_FUNC4_OEN_INV_SEL_V
GPIO_FUNC4_OEN_INV_SEL_S
GPIO_FUNC4_OEN_SEL_V
GPIO_FUNC4_OEN_SEL_S
GPIO_FUNC4_OUT_INV_SEL_V
GPIO_FUNC4_OUT_INV_SEL_S
GPIO_FUNC4_OUT_SEL
GPIO_FUNC4_OUT_SEL_V
GPIO_FUNC4_OUT_SEL_S
GPIO_FUNC5_IN_SEL_CFG_REG
GPIO_FUNC5_IN_INV_SEL_V
GPIO_FUNC5_IN_INV_SEL_S
GPIO_FUNC5_IN_SEL
GPIO_FUNC5_IN_SEL_V
GPIO_FUNC5_IN_SEL_S
GPIO_FUNC5_OUT_SEL_CFG_REG
GPIO_FUNC5_OEN_INV_SEL_V
GPIO_FUNC5_OEN_INV_SEL_S
GPIO_FUNC5_OEN_SEL_V
GPIO_FUNC5_OEN_SEL_S
GPIO_FUNC5_OUT_INV_SEL_V
GPIO_FUNC5_OUT_INV_SEL_S
GPIO_FUNC5_OUT_SEL
GPIO_FUNC5_OUT_SEL_V
GPIO_FUNC5_OUT_SEL_S
GPIO_FUNC6_IN_SEL_CFG_REG
GPIO_FUNC6_IN_INV_SEL_V
GPIO_FUNC6_IN_INV_SEL_S
GPIO_FUNC6_IN_SEL
GPIO_FUNC6_IN_SEL_V
GPIO_FUNC6_IN_SEL_S
GPIO_FUNC6_OUT_SEL_CFG_REG
GPIO_FUNC6_OEN_INV_SEL_V
GPIO_FUNC6_OEN_INV_SEL_S
GPIO_FUNC6_OEN_SEL_V
GPIO_FUNC6_OEN_SEL_S
GPIO_FUNC6_OUT_INV_SEL_V
GPIO_FUNC6_OUT_INV_SEL_S
GPIO_FUNC6_OUT_SEL
GPIO_FUNC6_OUT_SEL_V
GPIO_FUNC6_OUT_SEL_S
GPIO_FUNC7_IN_SEL_CFG_REG
GPIO_FUNC7_IN_INV_SEL_V
GPIO_FUNC7_IN_INV_SEL_S
GPIO_FUNC7_IN_SEL
GPIO_FUNC7_IN_SEL_V
GPIO_FUNC7_IN_SEL_S
GPIO_FUNC7_OUT_SEL_CFG_REG
GPIO_FUNC7_OEN_INV_SEL_V
GPIO_FUNC7_OEN_INV_SEL_S
GPIO_FUNC7_OEN_SEL_V
GPIO_FUNC7_OEN_SEL_S
GPIO_FUNC7_OUT_INV_SEL_V
GPIO_FUNC7_OUT_INV_SEL_S
GPIO_FUNC7_OUT_SEL
GPIO_FUNC7_OUT_SEL_V
GPIO_FUNC7_OUT_SEL_S
GPIO_FUNC8_IN_SEL_CFG_REG
GPIO_FUNC8_IN_INV_SEL_V
GPIO_FUNC8_IN_INV_SEL_S
GPIO_FUNC8_IN_SEL
GPIO_FUNC8_IN_SEL_V
GPIO_FUNC8_IN_SEL_S
GPIO_FUNC8_OUT_SEL_CFG_REG
GPIO_FUNC8_OEN_INV_SEL_V
GPIO_FUNC8_OEN_INV_SEL_S
GPIO_FUNC8_OEN_SEL_V
GPIO_FUNC8_OEN_SEL_S
GPIO_FUNC8_OUT_INV_SEL_V
GPIO_FUNC8_OUT_INV_SEL_S
GPIO_FUNC8_OUT_SEL
GPIO_FUNC8_OUT_SEL_V
GPIO_FUNC8_OUT_SEL_S
GPIO_FUNC9_IN_SEL_CFG_REG
GPIO_FUNC9_IN_INV_SEL_V
GPIO_FUNC9_IN_INV_SEL_S
GPIO_FUNC9_IN_SEL
GPIO_FUNC9_IN_SEL_V
GPIO_FUNC9_IN_SEL_S
GPIO_FUNC9_OUT_SEL_CFG_REG
GPIO_FUNC9_OEN_INV_SEL_V
GPIO_FUNC9_OEN_INV_SEL_S
GPIO_FUNC9_OEN_SEL_V
GPIO_FUNC9_OEN_SEL_S
GPIO_FUNC9_OUT_INV_SEL_V
GPIO_FUNC9_OUT_INV_SEL_S
GPIO_FUNC9_OUT_SEL
GPIO_FUNC9_OUT_SEL_V
GPIO_FUNC9_OUT_SEL_S
GPIO_FUNC10_IN_SEL_CFG_REG
GPIO_FUNC10_IN_INV_SEL_V
GPIO_FUNC10_IN_INV_SEL_S
GPIO_FUNC10_IN_SEL
GPIO_FUNC10_IN_SEL_V
GPIO_FUNC10_IN_SEL_S
GPIO_FUNC10_OUT_SEL_CFG_REG
GPIO_FUNC10_OEN_INV_SEL_V
GPIO_FUNC10_OEN_INV_SEL_S
GPIO_FUNC10_OEN_SEL_V
GPIO_FUNC10_OEN_SEL_S
GPIO_FUNC10_OUT_INV_SEL_V
GPIO_FUNC10_OUT_INV_SEL_S
GPIO_FUNC10_OUT_SEL
GPIO_FUNC10_OUT_SEL_V
GPIO_FUNC10_OUT_SEL_S
GPIO_FUNC11_IN_SEL_CFG_REG
GPIO_FUNC11_IN_INV_SEL_V
GPIO_FUNC11_IN_INV_SEL_S
GPIO_FUNC11_IN_SEL
GPIO_FUNC11_IN_SEL_V
GPIO_FUNC11_IN_SEL_S
GPIO_FUNC11_OUT_SEL_CFG_REG
GPIO_FUNC11_OEN_INV_SEL_V
GPIO_FUNC11_OEN_INV_SEL_S
GPIO_FUNC11_OEN_SEL_V
GPIO_FUNC11_OEN_SEL_S
GPIO_FUNC11_OUT_INV_SEL_V
GPIO_FUNC11_OUT_INV_SEL_S
GPIO_FUNC11_OUT_SEL
GPIO_FUNC11_OUT_SEL_V
GPIO_FUNC11_OUT_SEL_S
GPIO_FUNC12_IN_SEL_CFG_REG
GPIO_FUNC12_IN_INV_SEL_V
GPIO_FUNC12_IN_INV_SEL_S
GPIO_FUNC12_IN_SEL
GPIO_FUNC12_IN_SEL_V
GPIO_FUNC12_IN_SEL_S
GPIO_FUNC12_OUT_SEL_CFG_REG
GPIO_FUNC12_OEN_INV_SEL_V
GPIO_FUNC12_OEN_INV_SEL_S
GPIO_FUNC12_OEN_SEL_V
GPIO_FUNC12_OEN_SEL_S
GPIO_FUNC12_OUT_INV_SEL_V
GPIO_FUNC12_OUT_INV_SEL_S
GPIO_FUNC12_OUT_SEL
GPIO_FUNC12_OUT_SEL_V
GPIO_FUNC12_OUT_SEL_S
GPIO_FUNC13_IN_SEL_CFG_REG
GPIO_FUNC13_IN_INV_SEL_V
GPIO_FUNC13_IN_INV_SEL_S
GPIO_FUNC13_IN_SEL
GPIO_FUNC13_IN_SEL_V
GPIO_FUNC13_IN_SEL_S
GPIO_FUNC13_OUT_SEL_CFG_REG
GPIO_FUNC13_OEN_INV_SEL_V
GPIO_FUNC13_OEN_INV_SEL_S
GPIO_FUNC13_OEN_SEL_V
GPIO_FUNC13_OEN_SEL_S
GPIO_FUNC13_OUT_INV_SEL_V
GPIO_FUNC13_OUT_INV_SEL_S
GPIO_FUNC13_OUT_SEL
GPIO_FUNC13_OUT_SEL_V
GPIO_FUNC13_OUT_SEL_S
GPIO_FUNC14_IN_SEL_CFG_REG
GPIO_FUNC14_IN_INV_SEL_V
GPIO_FUNC14_IN_INV_SEL_S
GPIO_FUNC14_IN_SEL
GPIO_FUNC14_IN_SEL_V
GPIO_FUNC14_IN_SEL_S
GPIO_FUNC14_OUT_SEL_CFG_REG
GPIO_FUNC14_OEN_INV_SEL_V
GPIO_FUNC14_OEN_INV_SEL_S
GPIO_FUNC14_OEN_SEL_V
GPIO_FUNC14_OEN_SEL_S
GPIO_FUNC14_OUT_INV_SEL_V
GPIO_FUNC14_OUT_INV_SEL_S
GPIO_FUNC14_OUT_SEL
GPIO_FUNC14_OUT_SEL_V
GPIO_FUNC14_OUT_SEL_S
GPIO_FUNC15_IN_SEL_CFG_REG
GPIO_FUNC15_IN_INV_SEL_V
GPIO_FUNC15_IN_INV_SEL_S
GPIO_FUNC15_IN_SEL
GPIO_FUNC15_IN_SEL_V
GPIO_FUNC15_IN_SEL_S
GPIO_FUNC15_OUT_SEL_CFG_REG
GPIO_FUNC15_OEN_INV_SEL_V
GPIO_FUNC15_OEN_INV_SEL_S
GPIO_FUNC15_OEN_SEL_V
GPIO_FUNC15_OEN_SEL_S
GPIO_FUNC15_OUT_INV_SEL_V
GPIO_FUNC15_OUT_INV_SEL_S
GPIO_FUNC15_OUT_SEL
GPIO_FUNC15_OUT_SEL_V
GPIO_FUNC15_OUT_SEL_S
GPIO_FUNC16_IN_SEL_CFG_REG
GPIO_FUNC16_IN_INV_SEL_V
GPIO_FUNC16_IN_INV_SEL_S
GPIO_FUNC16_IN_SEL
GPIO_FUNC16_IN_SEL_V
GPIO_FUNC16_IN_SEL_S
GPIO_FUNC16_OUT_SEL_CFG_REG
GPIO_FUNC16_OEN_INV_SEL_V
GPIO_FUNC16_OEN_INV_SEL_S
GPIO_FUNC16_OEN_SEL_V
GPIO_FUNC16_OEN_SEL_S
GPIO_FUNC16_OUT_INV_SEL_V
GPIO_FUNC16_OUT_INV_SEL_S
GPIO_FUNC16_OUT_SEL
GPIO_FUNC16_OUT_SEL_V
GPIO_FUNC16_OUT_SEL_S
GPIO_FUNC17_IN_SEL_CFG_REG
GPIO_FUNC17_IN_INV_SEL_V
GPIO_FUNC17_IN_INV_SEL_S
GPIO_FUNC17_IN_SEL
GPIO_FUNC17_IN_SEL_V
GPIO_FUNC17_IN_SEL_S
GPIO_FUNC17_OUT_SEL_CFG_REG
GPIO_FUNC17_OEN_INV_SEL_V
GPIO_FUNC17_OEN_INV_SEL_S
GPIO_FUNC17_OEN_SEL_V
GPIO_FUNC17_OEN_SEL_S
GPIO_FUNC17_OUT_INV_SEL_V
GPIO_FUNC17_OUT_INV_SEL_S
GPIO_FUNC17_OUT_SEL
GPIO_FUNC17_OUT_SEL_V
GPIO_FUNC17_OUT_SEL_S
GPIO_FUNC18_IN_SEL_CFG_REG
GPIO_FUNC18_IN_INV_SEL_V
GPIO_FUNC18_IN_INV_SEL_S
GPIO_FUNC18_IN_SEL
GPIO_FUNC18_IN_SEL_V
GPIO_FUNC18_IN_SEL_S
GPIO_FUNC18_OUT_SEL_CFG_REG
GPIO_FUNC18_OEN_INV_SEL_V
GPIO_FUNC18_OEN_INV_SEL_S
GPIO_FUNC18_OEN_SEL_V
GPIO_FUNC18_OEN_SEL_S
GPIO_FUNC18_OUT_INV_SEL_V
GPIO_FUNC18_OUT_INV_SEL_S
GPIO_FUNC18_OUT_SEL
GPIO_FUNC18_OUT_SEL_V
GPIO_FUNC18_OUT_SEL_S
GPIO_FUNC19_IN_SEL_CFG_REG
GPIO_FUNC19_IN_INV_SEL_V
GPIO_FUNC19_IN_INV_SEL_S
GPIO_FUNC19_IN_SEL
GPIO_FUNC19_IN_SEL_V
GPIO_FUNC19_IN_SEL_S
GPIO_FUNC19_OUT_SEL_CFG_REG
GPIO_FUNC19_OEN_INV_SEL_V
GPIO_FUNC19_OEN_INV_SEL_S
GPIO_FUNC19_OEN_SEL_V
GPIO_FUNC19_OEN_SEL_S
GPIO_FUNC19_OUT_INV_SEL_V
GPIO_FUNC19_OUT_INV_SEL_S
GPIO_FUNC19_OUT_SEL
GPIO_FUNC19_OUT_SEL_V
GPIO_FUNC19_OUT_SEL_S
GPIO_FUNC20_IN_SEL_CFG_REG
GPIO_FUNC20_IN_INV_SEL_V
GPIO_FUNC20_IN_INV_SEL_S
GPIO_FUNC20_IN_SEL
GPIO_FUNC20_IN_SEL_V
GPIO_FUNC20_IN_SEL_S
GPIO_FUNC20_OUT_SEL_CFG_REG
GPIO_FUNC20_OEN_INV_SEL_V
GPIO_FUNC20_OEN_INV_SEL_S
GPIO_FUNC20_OEN_SEL_V
GPIO_FUNC20_OEN_SEL_S
GPIO_FUNC20_OUT_INV_SEL_V
GPIO_FUNC20_OUT_INV_SEL_S
GPIO_FUNC20_OUT_SEL
GPIO_FUNC20_OUT_SEL_V
GPIO_FUNC20_OUT_SEL_S
GPIO_FUNC21_IN_SEL_CFG_REG
GPIO_FUNC21_IN_INV_SEL_V
GPIO_FUNC21_IN_INV_SEL_S
GPIO_FUNC21_IN_SEL
GPIO_FUNC21_IN_SEL_V
GPIO_FUNC21_IN_SEL_S
GPIO_FUNC21_OUT_SEL_CFG_REG
GPIO_FUNC21_OEN_INV_SEL_V
GPIO_FUNC21_OEN_INV_SEL_S
GPIO_FUNC21_OEN_SEL_V
GPIO_FUNC21_OEN_SEL_S
GPIO_FUNC21_OUT_INV_SEL_V
GPIO_FUNC21_OUT_INV_SEL_S
GPIO_FUNC21_OUT_SEL
GPIO_FUNC21_OUT_SEL_V
GPIO_FUNC21_OUT_SEL_S
GPIO_FUNC22_IN_SEL_CFG_REG
GPIO_FUNC22_IN_INV_SEL_V
GPIO_FUNC22_IN_INV_SEL_S
GPIO_FUNC22_IN_SEL
GPIO_FUNC22_IN_SEL_V
GPIO_FUNC22_IN_SEL_S
GPIO_FUNC22_OUT_SEL_CFG_REG
GPIO_FUNC22_OEN_INV_SEL_V
GPIO_FUNC22_OEN_INV_SEL_S
GPIO_FUNC22_OEN_SEL_V
GPIO_FUNC22_OEN_SEL_S
GPIO_FUNC22_OUT_INV_SEL_V
GPIO_FUNC22_OUT_INV_SEL_S
GPIO_FUNC22_OUT_SEL
GPIO_FUNC22_OUT_SEL_V
GPIO_FUNC22_OUT_SEL_S
GPIO_FUNC23_IN_SEL_CFG_REG
GPIO_FUNC23_IN_INV_SEL_V
GPIO_FUNC23_IN_INV_SEL_S
GPIO_FUNC23_IN_SEL
GPIO_FUNC23_IN_SEL_V
GPIO_FUNC23_IN_SEL_S
GPIO_FUNC23_OUT_SEL_CFG_REG
GPIO_FUNC23_OEN_INV_SEL_V
GPIO_FUNC23_OEN_INV_SEL_S
GPIO_FUNC23_OEN_SEL_V
GPIO_FUNC23_OEN_SEL_S
GPIO_FUNC23_OUT_INV_SEL_V
GPIO_FUNC23_OUT_INV_SEL_S
GPIO_FUNC23_OUT_SEL
GPIO_FUNC23_OUT_SEL_V
GPIO_FUNC23_OUT_SEL_S
GPIO_FUNC24_IN_SEL_CFG_REG
GPIO_FUNC24_IN_INV_SEL_V
GPIO_FUNC24_IN_INV_SEL_S
GPIO_FUNC24_IN_SEL
GPIO_FUNC24_IN_SEL_V
GPIO_FUNC24_IN_SEL_S
GPIO_FUNC24_OUT_SEL_CFG_REG
GPIO_FUNC24_OEN_INV_SEL_V
GPIO_FUNC24_OEN_INV_SEL_S
GPIO_FUNC24_OEN_SEL_V
GPIO_FUNC24_OEN_SEL_S
GPIO_FUNC24_OUT_INV_SEL_V
GPIO_FUNC24_OUT_INV_SEL_S
GPIO_FUNC24_OUT_SEL
GPIO_FUNC24_OUT_SEL_V
GPIO_FUNC24_OUT_SEL_S
GPIO_FUNC25_IN_SEL_CFG_REG
GPIO_FUNC25_IN_INV_SEL_V
GPIO_FUNC25_IN_INV_SEL_S
GPIO_FUNC25_IN_SEL
GPIO_FUNC25_IN_SEL_V
GPIO_FUNC25_IN_SEL_S
GPIO_FUNC25_OUT_SEL_CFG_REG
GPIO_FUNC25_OEN_INV_SEL_V
GPIO_FUNC25_OEN_INV_SEL_S
GPIO_FUNC25_OEN_SEL_V
GPIO_FUNC25_OEN_SEL_S
GPIO_FUNC25_OUT_INV_SEL_V
GPIO_FUNC25_OUT_INV_SEL_S
GPIO_FUNC25_OUT_SEL
GPIO_FUNC25_OUT_SEL_V
GPIO_FUNC25_OUT_SEL_S
GPIO_FUNC26_IN_SEL_CFG_REG
GPIO_FUNC26_IN_INV_SEL_V
GPIO_FUNC26_IN_INV_SEL_S
GPIO_FUNC26_IN_SEL
GPIO_FUNC26_IN_SEL_V
GPIO_FUNC26_IN_SEL_S
GPIO_FUNC26_OUT_SEL_CFG_REG
GPIO_FUNC26_OEN_INV_SEL_V
GPIO_FUNC26_OEN_INV_SEL_S
GPIO_FUNC26_OEN_SEL_V
GPIO_FUNC26_OEN_SEL_S
GPIO_FUNC26_OUT_INV_SEL_V
GPIO_FUNC26_OUT_INV_SEL_S
GPIO_FUNC26_OUT_SEL
GPIO_FUNC26_OUT_SEL_V
GPIO_FUNC26_OUT_SEL_S
GPIO_FUNC27_IN_SEL_CFG_REG
GPIO_FUNC27_IN_INV_SEL_V
GPIO_FUNC27_IN_INV_SEL_S
GPIO_FUNC27_IN_SEL
GPIO_FUNC27_IN_SEL_V
GPIO_FUNC27_IN_SEL_S
GPIO_FUNC27_OUT_SEL_CFG_REG
GPIO_FUNC27_OEN_INV_SEL_V
GPIO_FUNC27_OEN_INV_SEL_S
GPIO_FUNC27_OEN_SEL_V
GPIO_FUNC27_OEN_SEL_S
GPIO_FUNC27_OUT_INV_SEL_V
GPIO_FUNC27_OUT_INV_SEL_S
GPIO_FUNC27_OUT_SEL
GPIO_FUNC27_OUT_SEL_V
GPIO_FUNC27_OUT_SEL_S
GPIO_FUNC28_IN_SEL_CFG_REG
GPIO_FUNC28_IN_INV_SEL_V
GPIO_FUNC28_IN_INV_SEL_S
GPIO_FUNC28_IN_SEL
GPIO_FUNC28_IN_SEL_V
GPIO_FUNC28_IN_SEL_S
GPIO_FUNC28_OUT_SEL_CFG_REG
GPIO_FUNC28_OEN_INV_SEL_V
GPIO_FUNC28_OEN_INV_SEL_S
GPIO_FUNC28_OEN_SEL_V
GPIO_FUNC28_OEN_SEL_S
GPIO_FUNC28_OUT_INV_SEL_V
GPIO_FUNC28_OUT_INV_SEL_S
GPIO_FUNC28_OUT_SEL
GPIO_FUNC28_OUT_SEL_V
GPIO_FUNC28_OUT_SEL_S
GPIO_FUNC29_IN_SEL_CFG_REG
GPIO_FUNC29_IN_INV_SEL_V
GPIO_FUNC29_IN_INV_SEL_S
GPIO_FUNC29_IN_SEL
GPIO_FUNC29_IN_SEL_V
GPIO_FUNC29_IN_SEL_S
GPIO_FUNC29_OUT_SEL_CFG_REG
GPIO_FUNC29_OEN_INV_SEL_V
GPIO_FUNC29_OEN_INV_SEL_S
GPIO_FUNC29_OEN_SEL_V
GPIO_FUNC29_OEN_SEL_S
GPIO_FUNC29_OUT_INV_SEL_V
GPIO_FUNC29_OUT_INV_SEL_S
GPIO_FUNC29_OUT_SEL
GPIO_FUNC29_OUT_SEL_V
GPIO_FUNC29_OUT_SEL_S
GPIO_FUNC30_IN_SEL_CFG_REG
GPIO_FUNC30_IN_INV_SEL_V
GPIO_FUNC30_IN_INV_SEL_S
GPIO_FUNC30_IN_SEL
GPIO_FUNC30_IN_SEL_V
GPIO_FUNC30_IN_SEL_S
GPIO_FUNC30_OUT_SEL_CFG_REG
GPIO_FUNC30_OEN_INV_SEL_V
GPIO_FUNC30_OEN_INV_SEL_S
GPIO_FUNC30_OEN_SEL_V
GPIO_FUNC30_OEN_SEL_S
GPIO_FUNC30_OUT_INV_SEL_V
GPIO_FUNC30_OUT_INV_SEL_S
GPIO_FUNC30_OUT_SEL
GPIO_FUNC30_OUT_SEL_V
GPIO_FUNC30_OUT_SEL_S
GPIO_FUNC31_IN_SEL_CFG_REG
GPIO_FUNC31_IN_INV_SEL_V
GPIO_FUNC31_IN_INV_SEL_S
GPIO_FUNC31_IN_SEL
GPIO_FUNC31_IN_SEL_V
GPIO_FUNC31_IN_SEL_S
GPIO_FUNC31_OUT_SEL_CFG_REG
GPIO_FUNC31_OEN_INV_SEL_V
GPIO_FUNC31_OEN_INV_SEL_S
GPIO_FUNC31_OEN_SEL_V
GPIO_FUNC31_OEN_SEL_S
GPIO_FUNC31_OUT_INV_SEL_V
GPIO_FUNC31_OUT_INV_SEL_S
GPIO_FUNC31_OUT_SEL
GPIO_FUNC31_OUT_SEL_V
GPIO_FUNC31_OUT_SEL_S
GPIO_FUNC32_IN_SEL_CFG_REG
GPIO_FUNC32_IN_INV_SEL_V
GPIO_FUNC32_IN_INV_SEL_S
GPIO_FUNC32_IN_SEL
GPIO_FUNC32_IN_SEL_V
GPIO_FUNC32_IN_SEL_S
GPIO_FUNC32_OUT_SEL_CFG_REG
GPIO_FUNC32_OEN_INV_SEL_V
GPIO_FUNC32_OEN_INV_SEL_S
GPIO_FUNC32_OEN_SEL_V
GPIO_FUNC32_OEN_SEL_S
GPIO_FUNC32_OUT_INV_SEL_V
GPIO_FUNC32_OUT_INV_SEL_S
GPIO_FUNC32_OUT_SEL
GPIO_FUNC32_OUT_SEL_V
GPIO_FUNC32_OUT_SEL_S
GPIO_FUNC33_IN_SEL_CFG_REG
GPIO_FUNC33_IN_INV_SEL_V
GPIO_FUNC33_IN_INV_SEL_S
GPIO_FUNC33_IN_SEL
GPIO_FUNC33_IN_SEL_V
GPIO_FUNC33_IN_SEL_S
GPIO_FUNC33_OUT_SEL_CFG_REG
GPIO_FUNC33_OEN_INV_SEL_V
GPIO_FUNC33_OEN_INV_SEL_S
GPIO_FUNC33_OEN_SEL_V
GPIO_FUNC33_OEN_SEL_S
GPIO_FUNC33_OUT_INV_SEL_V
GPIO_FUNC33_OUT_INV_SEL_S
GPIO_FUNC33_OUT_SEL
GPIO_FUNC33_OUT_SEL_V
GPIO_FUNC33_OUT_SEL_S
GPIO_FUNC34_IN_SEL_CFG_REG
GPIO_FUNC34_IN_INV_SEL_V
GPIO_FUNC34_IN_INV_SEL_S
GPIO_FUNC34_IN_SEL
GPIO_FUNC34_IN_SEL_V
GPIO_FUNC34_IN_SEL_S
GPIO_FUNC34_OUT_SEL_CFG_REG
GPIO_FUNC34_OEN_INV_SEL_V
GPIO_FUNC34_OEN_INV_SEL_S
GPIO_FUNC34_OEN_SEL_V
GPIO_FUNC34_OEN_SEL_S
GPIO_FUNC34_OUT_INV_SEL_V
GPIO_FUNC34_OUT_INV_SEL_S
GPIO_FUNC34_OUT_SEL
GPIO_FUNC34_OUT_SEL_V
GPIO_FUNC34_OUT_SEL_S
GPIO_FUNC35_IN_SEL_CFG_REG
GPIO_FUNC35_IN_INV_SEL_V
GPIO_FUNC35_IN_INV_SEL_S
GPIO_FUNC35_IN_SEL
GPIO_FUNC35_IN_SEL_V
GPIO_FUNC35_IN_SEL_S
GPIO_FUNC35_OUT_SEL_CFG_REG
GPIO_FUNC35_OEN_INV_SEL_V
GPIO_FUNC35_OEN_INV_SEL_S
GPIO_FUNC35_OEN_SEL_V
GPIO_FUNC35_OEN_SEL_S
GPIO_FUNC35_OUT_INV_SEL_V
GPIO_FUNC35_OUT_INV_SEL_S
GPIO_FUNC35_OUT_SEL
GPIO_FUNC35_OUT_SEL_V
GPIO_FUNC35_OUT_SEL_S
GPIO_FUNC36_IN_SEL_CFG_REG
GPIO_FUNC36_IN_INV_SEL_V
GPIO_FUNC36_IN_INV_SEL_S
GPIO_FUNC36_IN_SEL
GPIO_FUNC36_IN_SEL_V
GPIO_FUNC36_IN_SEL_S
GPIO_FUNC36_OUT_SEL_CFG_REG
GPIO_FUNC36_OEN_INV_SEL_V
GPIO_FUNC36_OEN_INV_SEL_S
GPIO_FUNC36_OEN_SEL_V
GPIO_FUNC36_OEN_SEL_S
GPIO_FUNC36_OUT_INV_SEL_V
GPIO_FUNC36_OUT_INV_SEL_S
GPIO_FUNC36_OUT_SEL
GPIO_FUNC36_OUT_SEL_V
GPIO_FUNC36_OUT_SEL_S
GPIO_FUNC37_IN_SEL_CFG_REG
GPIO_FUNC37_IN_INV_SEL_V
GPIO_FUNC37_IN_INV_SEL_S
GPIO_FUNC37_IN_SEL
GPIO_FUNC37_IN_SEL_V
GPIO_FUNC37_IN_SEL_S
GPIO_FUNC37_OUT_SEL_CFG_REG
GPIO_FUNC37_OEN_INV_SEL_V
GPIO_FUNC37_OEN_INV_SEL_S
GPIO_FUNC37_OEN_SEL_V
GPIO_FUNC37_OEN_SEL_S
GPIO_FUNC37_OUT_INV_SEL_V
GPIO_FUNC37_OUT_INV_SEL_S
GPIO_FUNC37_OUT_SEL
GPIO_FUNC37_OUT_SEL_V
GPIO_FUNC37_OUT_SEL_S
GPIO_FUNC38_IN_SEL_CFG_REG
GPIO_FUNC38_IN_INV_SEL_V
GPIO_FUNC38_IN_INV_SEL_S
GPIO_FUNC38_IN_SEL
GPIO_FUNC38_IN_SEL_V
GPIO_FUNC38_IN_SEL_S
GPIO_FUNC38_OUT_SEL_CFG_REG
GPIO_FUNC38_OEN_INV_SEL_V
GPIO_FUNC38_OEN_INV_SEL_S
GPIO_FUNC38_OEN_SEL_V
GPIO_FUNC38_OEN_SEL_S
GPIO_FUNC38_OUT_INV_SEL_V
GPIO_FUNC38_OUT_INV_SEL_S
GPIO_FUNC38_OUT_SEL
GPIO_FUNC38_OUT_SEL_V
GPIO_FUNC38_OUT_SEL_S
GPIO_FUNC39_IN_SEL_CFG_REG
GPIO_FUNC39_IN_INV_SEL_V
GPIO_FUNC39_IN_INV_SEL_S
GPIO_FUNC39_IN_SEL
GPIO_FUNC39_IN_SEL_V
GPIO_FUNC39_IN_SEL_S
GPIO_FUNC39_OUT_SEL_CFG_REG
GPIO_FUNC39_OEN_INV_SEL_V
GPIO_FUNC39_OEN_INV_SEL_S
GPIO_FUNC39_OEN_SEL_V
GPIO_FUNC39_OEN_SEL_S
GPIO_FUNC39_OUT_INV_SEL_V
GPIO_FUNC39_OUT_INV_SEL_S
GPIO_FUNC39_OUT_SEL
GPIO_FUNC39_OUT_SEL_V
GPIO_FUNC39_OUT_SEL_S
GPIO_FUNC40_IN_SEL_CFG_REG
GPIO_FUNC40_IN_INV_SEL_V
GPIO_FUNC40_IN_INV_SEL_S
GPIO_FUNC40_IN_SEL
GPIO_FUNC40_IN_SEL_V
GPIO_FUNC40_IN_SEL_S
GPIO_FUNC41_IN_SEL_CFG_REG
GPIO_FUNC41_IN_INV_SEL_V
GPIO_FUNC41_IN_INV_SEL_S
GPIO_FUNC41_IN_SEL
GPIO_FUNC41_IN_SEL_V
GPIO_FUNC41_IN_SEL_S
GPIO_FUNC42_IN_SEL_CFG_REG
GPIO_FUNC42_IN_INV_SEL_V
GPIO_FUNC42_IN_INV_SEL_S
GPIO_FUNC42_IN_SEL
GPIO_FUNC42_IN_SEL_V
GPIO_FUNC42_IN_SEL_S
GPIO_FUNC43_IN_SEL_CFG_REG
GPIO_FUNC43_IN_INV_SEL_V
GPIO_FUNC43_IN_INV_SEL_S
GPIO_FUNC43_IN_SEL
GPIO_FUNC43_IN_SEL_V
GPIO_FUNC43_IN_SEL_S
GPIO_FUNC44_IN_SEL_CFG_REG
GPIO_FUNC44_IN_INV_SEL_V
GPIO_FUNC44_IN_INV_SEL_S
GPIO_FUNC44_IN_SEL
GPIO_FUNC44_IN_SEL_V
GPIO_FUNC44_IN_SEL_S
GPIO_FUNC45_IN_SEL_CFG_REG
GPIO_FUNC45_IN_INV_SEL_V
GPIO_FUNC45_IN_INV_SEL_S
GPIO_FUNC45_IN_SEL
GPIO_FUNC45_IN_SEL_V
GPIO_FUNC45_IN_SEL_S
GPIO_FUNC46_IN_SEL_CFG_REG
GPIO_FUNC46_IN_INV_SEL_V
GPIO_FUNC46_IN_INV_SEL_S
GPIO_FUNC46_IN_SEL
GPIO_FUNC46_IN_SEL_V
GPIO_FUNC46_IN_SEL_S
GPIO_FUNC47_IN_SEL_CFG_REG
GPIO_FUNC47_IN_INV_SEL_V
GPIO_FUNC47_IN_INV_SEL_S
GPIO_FUNC47_IN_SEL
GPIO_FUNC47_IN_SEL_V
GPIO_FUNC47_IN_SEL_S
GPIO_FUNC48_IN_SEL_CFG_REG
GPIO_FUNC48_IN_INV_SEL_V
GPIO_FUNC48_IN_INV_SEL_S
GPIO_FUNC48_IN_SEL
GPIO_FUNC48_IN_SEL_V
GPIO_FUNC48_IN_SEL_S
GPIO_FUNC49_IN_SEL_CFG_REG
GPIO_FUNC49_IN_INV_SEL_V
GPIO_FUNC49_IN_INV_SEL_S
GPIO_FUNC49_IN_SEL
GPIO_FUNC49_IN_SEL_V
GPIO_FUNC49_IN_SEL_S
GPIO_FUNC50_IN_SEL_CFG_REG
GPIO_FUNC50_IN_INV_SEL_V
GPIO_FUNC50_IN_INV_SEL_S
GPIO_FUNC50_IN_SEL
GPIO_FUNC50_IN_SEL_V
GPIO_FUNC50_IN_SEL_S
GPIO_FUNC51_IN_SEL_CFG_REG
GPIO_FUNC51_IN_INV_SEL_V
GPIO_FUNC51_IN_INV_SEL_S
GPIO_FUNC51_IN_SEL
GPIO_FUNC51_IN_SEL_V
GPIO_FUNC51_IN_SEL_S
GPIO_FUNC52_IN_SEL_CFG_REG
GPIO_FUNC52_IN_INV_SEL_V
GPIO_FUNC52_IN_INV_SEL_S
GPIO_FUNC52_IN_SEL
GPIO_FUNC52_IN_SEL_V
GPIO_FUNC52_IN_SEL_S
GPIO_FUNC53_IN_SEL_CFG_REG
GPIO_FUNC53_IN_INV_SEL_V
GPIO_FUNC53_IN_INV_SEL_S
GPIO_FUNC53_IN_SEL
GPIO_FUNC53_IN_SEL_V
GPIO_FUNC53_IN_SEL_S
GPIO_FUNC54_IN_SEL_CFG_REG
GPIO_FUNC54_IN_INV_SEL_V
GPIO_FUNC54_IN_INV_SEL_S
GPIO_FUNC54_IN_SEL
GPIO_FUNC54_IN_SEL_V
GPIO_FUNC54_IN_SEL_S
GPIO_FUNC55_IN_SEL_CFG_REG
GPIO_FUNC55_IN_INV_SEL_V
GPIO_FUNC55_IN_INV_SEL_S
GPIO_FUNC55_IN_SEL
GPIO_FUNC55_IN_SEL_V
GPIO_FUNC55_IN_SEL_S
GPIO_FUNC56_IN_SEL_CFG_REG
GPIO_FUNC56_IN_INV_SEL_V
GPIO_FUNC56_IN_INV_SEL_S
GPIO_FUNC56_IN_SEL
GPIO_FUNC56_IN_SEL_V
GPIO_FUNC56_IN_SEL_S
GPIO_FUNC57_IN_SEL_CFG_REG
GPIO_FUNC57_IN_INV_SEL_V
GPIO_FUNC57_IN_INV_SEL_S
GPIO_FUNC57_IN_SEL
GPIO_FUNC57_IN_SEL_V
GPIO_FUNC57_IN_SEL_S
GPIO_FUNC58_IN_SEL_CFG_REG
GPIO_FUNC58_IN_INV_SEL_V
GPIO_FUNC58_IN_INV_SEL_S
GPIO_FUNC58_IN_SEL
GPIO_FUNC58_IN_SEL_V
GPIO_FUNC58_IN_SEL_S
GPIO_FUNC59_IN_SEL_CFG_REG
GPIO_FUNC59_IN_INV_SEL_V
GPIO_FUNC59_IN_INV_SEL_S
GPIO_FUNC59_IN_SEL
GPIO_FUNC59_IN_SEL_V
GPIO_FUNC59_IN_SEL_S
GPIO_FUNC60_IN_SEL_CFG_REG
GPIO_FUNC60_IN_INV_SEL_V
GPIO_FUNC60_IN_INV_SEL_S
GPIO_FUNC60_IN_SEL
GPIO_FUNC60_IN_SEL_V
GPIO_FUNC60_IN_SEL_S
GPIO_FUNC61_IN_SEL_CFG_REG
GPIO_FUNC61_IN_INV_SEL_V
GPIO_FUNC61_IN_INV_SEL_S
GPIO_FUNC61_IN_SEL
GPIO_FUNC61_IN_SEL_V
GPIO_FUNC61_IN_SEL_S
GPIO_FUNC62_IN_SEL_CFG_REG
GPIO_FUNC62_IN_INV_SEL_V
GPIO_FUNC62_IN_INV_SEL_S
GPIO_FUNC62_IN_SEL
GPIO_FUNC62_IN_SEL_V
GPIO_FUNC62_IN_SEL_S
GPIO_FUNC63_IN_SEL_CFG_REG
GPIO_FUNC63_IN_INV_SEL_V
GPIO_FUNC63_IN_INV_SEL_S
GPIO_FUNC63_IN_SEL
GPIO_FUNC63_IN_SEL_V
GPIO_FUNC63_IN_SEL_S
GPIO_FUNC64_IN_SEL_CFG_REG
GPIO_FUNC64_IN_INV_SEL_V
GPIO_FUNC64_IN_INV_SEL_S
GPIO_FUNC64_IN_SEL
GPIO_FUNC64_IN_SEL_V
GPIO_FUNC64_IN_SEL_S
GPIO_FUNC65_IN_SEL_CFG_REG
GPIO_FUNC65_IN_INV_SEL_V
GPIO_FUNC65_IN_INV_SEL_S
GPIO_FUNC65_IN_SEL
GPIO_FUNC65_IN_SEL_V
GPIO_FUNC65_IN_SEL_S
GPIO_FUNC66_IN_SEL_CFG_REG
GPIO_FUNC66_IN_INV_SEL_V
GPIO_FUNC66_IN_INV_SEL_S
GPIO_FUNC66_IN_SEL
GPIO_FUNC66_IN_SEL_V
GPIO_FUNC66_IN_SEL_S
GPIO_FUNC67_IN_SEL_CFG_REG
GPIO_FUNC67_IN_INV_SEL_V
GPIO_FUNC67_IN_INV_SEL_S
GPIO_FUNC67_IN_SEL
GPIO_FUNC67_IN_SEL_V
GPIO_FUNC67_IN_SEL_S
GPIO_FUNC68_IN_SEL_CFG_REG
GPIO_FUNC68_IN_INV_SEL_V
GPIO_FUNC68_IN_INV_SEL_S
GPIO_FUNC68_IN_SEL
GPIO_FUNC68_IN_SEL_V
GPIO_FUNC68_IN_SEL_S
GPIO_FUNC69_IN_SEL_CFG_REG
GPIO_FUNC69_IN_INV_SEL_V
GPIO_FUNC69_IN_INV_SEL_S
GPIO_FUNC69_IN_SEL
GPIO_FUNC69_IN_SEL_V
GPIO_FUNC69_IN_SEL_S
GPIO_FUNC70_IN_SEL_CFG_REG
GPIO_FUNC70_IN_INV_SEL_V
GPIO_FUNC70_IN_INV_SEL_S
GPIO_FUNC70_IN_SEL
GPIO_FUNC70_IN_SEL_V
GPIO_FUNC70_IN_SEL_S
GPIO_FUNC71_IN_SEL_CFG_REG
GPIO_FUNC71_IN_INV_SEL_V
GPIO_FUNC71_IN_INV_SEL_S
GPIO_FUNC71_IN_SEL
GPIO_FUNC71_IN_SEL_V
GPIO_FUNC71_IN_SEL_S
GPIO_FUNC72_IN_SEL_CFG_REG
GPIO_FUNC72_IN_INV_SEL_V
GPIO_FUNC72_IN_INV_SEL_S
GPIO_FUNC72_IN_SEL
GPIO_FUNC72_IN_SEL_V
GPIO_FUNC72_IN_SEL_S
GPIO_FUNC73_IN_SEL_CFG_REG
GPIO_FUNC73_IN_INV_SEL_V
GPIO_FUNC73_IN_INV_SEL_S
GPIO_FUNC73_IN_SEL
GPIO_FUNC73_IN_SEL_V
GPIO_FUNC73_IN_SEL_S
GPIO_FUNC74_IN_SEL_CFG_REG
GPIO_FUNC74_IN_INV_SEL_V
GPIO_FUNC74_IN_INV_SEL_S
GPIO_FUNC74_IN_SEL
GPIO_FUNC74_IN_SEL_V
GPIO_FUNC74_IN_SEL_S
GPIO_FUNC75_IN_SEL_CFG_REG
GPIO_FUNC75_IN_INV_SEL_V
GPIO_FUNC75_IN_INV_SEL_S
GPIO_FUNC75_IN_SEL
GPIO_FUNC75_IN_SEL_V
GPIO_FUNC75_IN_SEL_S
GPIO_FUNC76_IN_SEL_CFG_REG
GPIO_FUNC76_IN_INV_SEL_V
GPIO_FUNC76_IN_INV_SEL_S
GPIO_FUNC76_IN_SEL
GPIO_FUNC76_IN_SEL_V
GPIO_FUNC76_IN_SEL_S
GPIO_FUNC77_IN_SEL_CFG_REG
GPIO_FUNC77_IN_INV_SEL_V
GPIO_FUNC77_IN_INV_SEL_S
GPIO_FUNC77_IN_SEL
GPIO_FUNC77_IN_SEL_V
GPIO_FUNC77_IN_SEL_S
GPIO_FUNC78_IN_SEL_CFG_REG
GPIO_FUNC78_IN_INV_SEL_V
GPIO_FUNC78_IN_INV_SEL_S
GPIO_FUNC78_IN_SEL
GPIO_FUNC78_IN_SEL_V
GPIO_FUNC78_IN_SEL_S
GPIO_FUNC79_IN_SEL_CFG_REG
GPIO_FUNC79_IN_INV_SEL_V
GPIO_FUNC79_IN_INV_SEL_S
GPIO_FUNC79_IN_SEL
GPIO_FUNC79_IN_SEL_V
GPIO_FUNC79_IN_SEL_S
GPIO_FUNC80_IN_SEL_CFG_REG
GPIO_FUNC80_IN_INV_SEL_V
GPIO_FUNC80_IN_INV_SEL_S
GPIO_FUNC80_IN_SEL
GPIO_FUNC80_IN_SEL_V
GPIO_FUNC80_IN_SEL_S
GPIO_FUNC81_IN_SEL_CFG_REG
GPIO_FUNC81_IN_INV_SEL_V
GPIO_FUNC81_IN_INV_SEL_S
GPIO_FUNC81_IN_SEL
GPIO_FUNC81_IN_SEL_V
GPIO_FUNC81_IN_SEL_S
GPIO_FUNC82_IN_SEL_CFG_REG
GPIO_FUNC82_IN_INV_SEL_V
GPIO_FUNC82_IN_INV_SEL_S
GPIO_FUNC82_IN_SEL
GPIO_FUNC82_IN_SEL_V
GPIO_FUNC82_IN_SEL_S
GPIO_FUNC83_IN_SEL_CFG_REG
GPIO_FUNC83_IN_INV_SEL_V
GPIO_FUNC83_IN_INV_SEL_S
GPIO_FUNC83_IN_SEL
GPIO_FUNC83_IN_SEL_V
GPIO_FUNC83_IN_SEL_S
GPIO_FUNC84_IN_SEL_CFG_REG
GPIO_FUNC84_IN_INV_SEL_V
GPIO_FUNC84_IN_INV_SEL_S
GPIO_FUNC84_IN_SEL
GPIO_FUNC84_IN_SEL_V
GPIO_FUNC84_IN_SEL_S
GPIO_FUNC85_IN_SEL_CFG_REG
GPIO_FUNC85_IN_INV_SEL_V
GPIO_FUNC85_IN_INV_SEL_S
GPIO_FUNC85_IN_SEL
GPIO_FUNC85_IN_SEL_V
GPIO_FUNC85_IN_SEL_S
GPIO_FUNC86_IN_SEL_CFG_REG
GPIO_FUNC86_IN_INV_SEL_V
GPIO_FUNC86_IN_INV_SEL_S
GPIO_FUNC86_IN_SEL
GPIO_FUNC86_IN_SEL_V
GPIO_FUNC86_IN_SEL_S
GPIO_FUNC87_IN_SEL_CFG_REG
GPIO_FUNC87_IN_INV_SEL_V
GPIO_FUNC87_IN_INV_SEL_S
GPIO_FUNC87_IN_SEL
GPIO_FUNC87_IN_SEL_V
GPIO_FUNC87_IN_SEL_S
GPIO_FUNC88_IN_SEL_CFG_REG
GPIO_FUNC88_IN_INV_SEL_V
GPIO_FUNC88_IN_INV_SEL_S
GPIO_FUNC88_IN_SEL
GPIO_FUNC88_IN_SEL_V
GPIO_FUNC88_IN_SEL_S
GPIO_FUNC89_IN_SEL_CFG_REG
GPIO_FUNC89_IN_INV_SEL_V
GPIO_FUNC89_IN_INV_SEL_S
GPIO_FUNC89_IN_SEL
GPIO_FUNC89_IN_SEL_V
GPIO_FUNC89_IN_SEL_S
GPIO_FUNC90_IN_SEL_CFG_REG
GPIO_FUNC90_IN_INV_SEL_V
GPIO_FUNC90_IN_INV_SEL_S
GPIO_FUNC90_IN_SEL
GPIO_FUNC90_IN_SEL_V
GPIO_FUNC90_IN_SEL_S
GPIO_FUNC91_IN_SEL_CFG_REG
GPIO_FUNC91_IN_INV_SEL_V
GPIO_FUNC91_IN_INV_SEL_S
GPIO_FUNC91_IN_SEL
GPIO_FUNC91_IN_SEL_V
GPIO_FUNC91_IN_SEL_S
GPIO_FUNC92_IN_SEL_CFG_REG
GPIO_FUNC92_IN_INV_SEL_V
GPIO_FUNC92_IN_INV_SEL_S
GPIO_FUNC92_IN_SEL
GPIO_FUNC92_IN_SEL_V
GPIO_FUNC92_IN_SEL_S
GPIO_FUNC93_IN_SEL_CFG_REG
GPIO_FUNC93_IN_INV_SEL_V
GPIO_FUNC93_IN_INV_SEL_S
GPIO_FUNC93_IN_SEL
GPIO_FUNC93_IN_SEL_V
GPIO_FUNC93_IN_SEL_S
GPIO_FUNC94_IN_SEL_CFG_REG
GPIO_FUNC94_IN_INV_SEL_V
GPIO_FUNC94_IN_INV_SEL_S
GPIO_FUNC94_IN_SEL
GPIO_FUNC94_IN_SEL_V
GPIO_FUNC94_IN_SEL_S
GPIO_FUNC95_IN_SEL_CFG_REG
GPIO_FUNC95_IN_INV_SEL_V
GPIO_FUNC95_IN_INV_SEL_S
GPIO_FUNC95_IN_SEL
GPIO_FUNC95_IN_SEL_V
GPIO_FUNC95_IN_SEL_S
GPIO_FUNC96_IN_SEL_CFG_REG
GPIO_FUNC96_IN_INV_SEL_V
GPIO_FUNC96_IN_INV_SEL_S
GPIO_FUNC96_IN_SEL
GPIO_FUNC96_IN_SEL_V
GPIO_FUNC96_IN_SEL_S
GPIO_FUNC97_IN_SEL_CFG_REG
GPIO_FUNC97_IN_INV_SEL_V
GPIO_FUNC97_IN_INV_SEL_S
GPIO_FUNC97_IN_SEL
GPIO_FUNC97_IN_SEL_V
GPIO_FUNC97_IN_SEL_S
GPIO_FUNC98_IN_SEL_CFG_REG
GPIO_FUNC98_IN_INV_SEL_V
GPIO_FUNC98_IN_INV_SEL_S
GPIO_FUNC98_IN_SEL
GPIO_FUNC98_IN_SEL_V
GPIO_FUNC98_IN_SEL_S
GPIO_FUNC99_IN_SEL_CFG_REG
GPIO_FUNC99_IN_INV_SEL_V
GPIO_FUNC99_IN_INV_SEL_S
GPIO_FUNC99_IN_SEL
GPIO_FUNC99_IN_SEL_V
GPIO_FUNC99_IN_SEL_S
GPIO_FUNC100_IN_SEL_CFG_REG
GPIO_FUNC100_IN_INV_SEL_V
GPIO_FUNC100_IN_INV_SEL_S
GPIO_FUNC100_IN_SEL
GPIO_FUNC100_IN_SEL_V
GPIO_FUNC100_IN_SEL_S
GPIO_FUNC101_IN_SEL_CFG_REG
GPIO_FUNC101_IN_INV_SEL_V
GPIO_FUNC101_IN_INV_SEL_S
GPIO_FUNC101_IN_SEL
GPIO_FUNC101_IN_SEL_V
GPIO_FUNC101_IN_SEL_S
GPIO_FUNC102_IN_SEL_CFG_REG
GPIO_FUNC102_IN_INV_SEL_V
GPIO_FUNC102_IN_INV_SEL_S
GPIO_FUNC102_IN_SEL
GPIO_FUNC102_IN_SEL_V
GPIO_FUNC102_IN_SEL_S
GPIO_FUNC103_IN_SEL_CFG_REG
GPIO_FUNC103_IN_INV_SEL_V
GPIO_FUNC103_IN_INV_SEL_S
GPIO_FUNC103_IN_SEL
GPIO_FUNC103_IN_SEL_V
GPIO_FUNC103_IN_SEL_S
GPIO_FUNC104_IN_SEL_CFG_REG
GPIO_FUNC104_IN_INV_SEL_V
GPIO_FUNC104_IN_INV_SEL_S
GPIO_FUNC104_IN_SEL
GPIO_FUNC104_IN_SEL_V
GPIO_FUNC104_IN_SEL_S
GPIO_FUNC105_IN_SEL_CFG_REG
GPIO_FUNC105_IN_INV_SEL_V
GPIO_FUNC105_IN_INV_SEL_S
GPIO_FUNC105_IN_SEL
GPIO_FUNC105_IN_SEL_V
GPIO_FUNC105_IN_SEL_S
GPIO_FUNC106_IN_SEL_CFG_REG
GPIO_FUNC106_IN_INV_SEL_V
GPIO_FUNC106_IN_INV_SEL_S
GPIO_FUNC106_IN_SEL
GPIO_FUNC106_IN_SEL_V
GPIO_FUNC106_IN_SEL_S
GPIO_FUNC107_IN_SEL_CFG_REG
GPIO_FUNC107_IN_INV_SEL_V
GPIO_FUNC107_IN_INV_SEL_S
GPIO_FUNC107_IN_SEL
GPIO_FUNC107_IN_SEL_V
GPIO_FUNC107_IN_SEL_S
GPIO_FUNC108_IN_SEL_CFG_REG
GPIO_FUNC108_IN_INV_SEL_V
GPIO_FUNC108_IN_INV_SEL_S
GPIO_FUNC108_IN_SEL
GPIO_FUNC108_IN_SEL_V
GPIO_FUNC108_IN_SEL_S
GPIO_FUNC109_IN_SEL_CFG_REG
GPIO_FUNC109_IN_INV_SEL_V
GPIO_FUNC109_IN_INV_SEL_S
GPIO_FUNC109_IN_SEL
GPIO_FUNC109_IN_SEL_V
GPIO_FUNC109_IN_SEL_S
GPIO_FUNC110_IN_SEL_CFG_REG
GPIO_FUNC110_IN_INV_SEL_V
GPIO_FUNC110_IN_INV_SEL_S
GPIO_FUNC110_IN_SEL
GPIO_FUNC110_IN_SEL_V
GPIO_FUNC110_IN_SEL_S
GPIO_FUNC111_IN_SEL_CFG_REG
GPIO_FUNC111_IN_INV_SEL_V
GPIO_FUNC111_IN_INV_SEL_S
GPIO_FUNC111_IN_SEL
GPIO_FUNC111_IN_SEL_V
GPIO_FUNC111_IN_SEL_S
GPIO_FUNC112_IN_SEL_CFG_REG
GPIO_FUNC112_IN_INV_SEL_V
GPIO_FUNC112_IN_INV_SEL_S
GPIO_FUNC112_IN_SEL
GPIO_FUNC112_IN_SEL_V
GPIO_FUNC112_IN_SEL_S
GPIO_FUNC113_IN_SEL_CFG_REG
GPIO_FUNC113_IN_INV_SEL_V
GPIO_FUNC113_IN_INV_SEL_S
GPIO_FUNC113_IN_SEL
GPIO_FUNC113_IN_SEL_V
GPIO_FUNC113_IN_SEL_S
GPIO_FUNC114_IN_SEL_CFG_REG
GPIO_FUNC114_IN_INV_SEL_V
GPIO_FUNC114_IN_INV_SEL_S
GPIO_FUNC114_IN_SEL
GPIO_FUNC114_IN_SEL_V
GPIO_FUNC114_IN_SEL_S
GPIO_FUNC115_IN_SEL_CFG_REG
GPIO_FUNC115_IN_INV_SEL_V
GPIO_FUNC115_IN_INV_SEL_S
GPIO_FUNC115_IN_SEL
GPIO_FUNC115_IN_SEL_V
GPIO_FUNC115_IN_SEL_S
GPIO_FUNC116_IN_SEL_CFG_REG
GPIO_FUNC116_IN_INV_SEL_V
GPIO_FUNC116_IN_INV_SEL_S
GPIO_FUNC116_IN_SEL
GPIO_FUNC116_IN_SEL_V
GPIO_FUNC116_IN_SEL_S
GPIO_FUNC117_IN_SEL_CFG_REG
GPIO_FUNC117_IN_INV_SEL_V
GPIO_FUNC117_IN_INV_SEL_S
GPIO_FUNC117_IN_SEL
GPIO_FUNC117_IN_SEL_V
GPIO_FUNC117_IN_SEL_S
GPIO_FUNC118_IN_SEL_CFG_REG
GPIO_FUNC118_IN_INV_SEL_V
GPIO_FUNC118_IN_INV_SEL_S
GPIO_FUNC118_IN_SEL
GPIO_FUNC118_IN_SEL_V
GPIO_FUNC118_IN_SEL_S
GPIO_FUNC119_IN_SEL_CFG_REG
GPIO_FUNC119_IN_INV_SEL_V
GPIO_FUNC119_IN_INV_SEL_S
GPIO_FUNC119_IN_SEL
GPIO_FUNC119_IN_SEL_V
GPIO_FUNC119_IN_SEL_S
GPIO_FUNC120_IN_SEL_CFG_REG
GPIO_FUNC120_IN_INV_SEL_V
GPIO_FUNC120_IN_INV_SEL_S
GPIO_FUNC120_IN_SEL
GPIO_FUNC120_IN_SEL_V
GPIO_FUNC120_IN_SEL_S
GPIO_FUNC121_IN_SEL_CFG_REG
GPIO_FUNC121_IN_INV_SEL_V
GPIO_FUNC121_IN_INV_SEL_S
GPIO_FUNC121_IN_SEL
GPIO_FUNC121_IN_SEL_V
GPIO_FUNC121_IN_SEL_S
GPIO_FUNC122_IN_SEL_CFG_REG
GPIO_FUNC122_IN_INV_SEL_V
GPIO_FUNC122_IN_INV_SEL_S
GPIO_FUNC122_IN_SEL
GPIO_FUNC122_IN_SEL_V
GPIO_FUNC122_IN_SEL_S
GPIO_FUNC123_IN_SEL_CFG_REG
GPIO_FUNC123_IN_INV_SEL_V
GPIO_FUNC123_IN_INV_SEL_S
GPIO_FUNC123_IN_SEL
GPIO_FUNC123_IN_SEL_V
GPIO_FUNC123_IN_SEL_S
GPIO_FUNC124_IN_SEL_CFG_REG
GPIO_FUNC124_IN_INV_SEL_V
GPIO_FUNC124_IN_INV_SEL_S
GPIO_FUNC124_IN_SEL
GPIO_FUNC124_IN_SEL_V
GPIO_FUNC124_IN_SEL_S
GPIO_FUNC125_IN_SEL_CFG_REG
GPIO_FUNC125_IN_INV_SEL_V
GPIO_FUNC125_IN_INV_SEL_S
GPIO_FUNC125_IN_SEL
GPIO_FUNC125_IN_SEL_V
GPIO_FUNC125_IN_SEL_S
GPIO_FUNC126_IN_SEL_CFG_REG
GPIO_FUNC126_IN_INV_SEL_V
GPIO_FUNC126_IN_INV_SEL_S
GPIO_FUNC126_IN_SEL
GPIO_FUNC126_IN_SEL_V
GPIO_FUNC126_IN_SEL_S
GPIO_FUNC127_IN_SEL_CFG_REG
GPIO_FUNC127_IN_INV_SEL_V
GPIO_FUNC127_IN_INV_SEL_S
GPIO_FUNC127_IN_SEL
GPIO_FUNC127_IN_SEL_V
GPIO_FUNC127_IN_SEL_S
GPIO_FUNC128_IN_SEL_CFG_REG
GPIO_FUNC128_IN_INV_SEL_V
GPIO_FUNC128_IN_INV_SEL_S
GPIO_FUNC128_IN_SEL
GPIO_FUNC128_IN_SEL_V
GPIO_FUNC128_IN_SEL_S
GPIO_FUNC129_IN_SEL_CFG_REG
GPIO_FUNC129_IN_INV_SEL_V
GPIO_FUNC129_IN_INV_SEL_S
GPIO_FUNC129_IN_SEL
GPIO_FUNC129_IN_SEL_V
GPIO_FUNC129_IN_SEL_S
GPIO_FUNC130_IN_SEL_CFG_REG
GPIO_FUNC130_IN_INV_SEL_V
GPIO_FUNC130_IN_INV_SEL_S
GPIO_FUNC130_IN_SEL
GPIO_FUNC130_IN_SEL_V
GPIO_FUNC130_IN_SEL_S
GPIO_FUNC131_IN_SEL_CFG_REG
GPIO_FUNC131_IN_INV_SEL_V
GPIO_FUNC131_IN_INV_SEL_S
GPIO_FUNC131_IN_SEL
GPIO_FUNC131_IN_SEL_V
GPIO_FUNC131_IN_SEL_S
GPIO_FUNC132_IN_SEL_CFG_REG
GPIO_FUNC132_IN_INV_SEL_V
GPIO_FUNC132_IN_INV_SEL_S
GPIO_FUNC132_IN_SEL
GPIO_FUNC132_IN_SEL_V
GPIO_FUNC132_IN_SEL_S
GPIO_FUNC133_IN_SEL_CFG_REG
GPIO_FUNC133_IN_INV_SEL_V
GPIO_FUNC133_IN_INV_SEL_S
GPIO_FUNC133_IN_SEL
GPIO_FUNC133_IN_SEL_V
GPIO_FUNC133_IN_SEL_S
GPIO_FUNC134_IN_SEL_CFG_REG
GPIO_FUNC134_IN_INV_SEL_V
GPIO_FUNC134_IN_INV_SEL_S
GPIO_FUNC134_IN_SEL
GPIO_FUNC134_IN_SEL_V
GPIO_FUNC134_IN_SEL_S
GPIO_FUNC135_IN_SEL_CFG_REG
GPIO_FUNC135_IN_INV_SEL_V
GPIO_FUNC135_IN_INV_SEL_S
GPIO_FUNC135_IN_SEL
GPIO_FUNC135_IN_SEL_V
GPIO_FUNC135_IN_SEL_S
GPIO_FUNC136_IN_SEL_CFG_REG
GPIO_FUNC136_IN_INV_SEL_V
GPIO_FUNC136_IN_INV_SEL_S
GPIO_FUNC136_IN_SEL
GPIO_FUNC136_IN_SEL_V
GPIO_FUNC136_IN_SEL_S
GPIO_FUNC137_IN_SEL_CFG_REG
GPIO_FUNC137_IN_INV_SEL_V
GPIO_FUNC137_IN_INV_SEL_S
GPIO_FUNC137_IN_SEL
GPIO_FUNC137_IN_SEL_V
GPIO_FUNC137_IN_SEL_S
GPIO_FUNC138_IN_SEL_CFG_REG
GPIO_FUNC138_IN_INV_SEL_V
GPIO_FUNC138_IN_INV_SEL_S
GPIO_FUNC138_IN_SEL
GPIO_FUNC138_IN_SEL_V
GPIO_FUNC138_IN_SEL_S
GPIO_FUNC139_IN_SEL_CFG_REG
GPIO_FUNC139_IN_INV_SEL_V
GPIO_FUNC139_IN_INV_SEL_S
GPIO_FUNC139_IN_SEL
GPIO_FUNC139_IN_SEL_V
GPIO_FUNC139_IN_SEL_S
GPIO_FUNC140_IN_SEL_CFG_REG
GPIO_FUNC140_IN_INV_SEL_V
GPIO_FUNC140_IN_INV_SEL_S
GPIO_FUNC140_IN_SEL
GPIO_FUNC140_IN_SEL_V
GPIO_FUNC140_IN_SEL_S
GPIO_FUNC141_IN_SEL_CFG_REG
GPIO_FUNC141_IN_INV_SEL_V
GPIO_FUNC141_IN_INV_SEL_S
GPIO_FUNC141_IN_SEL
GPIO_FUNC141_IN_SEL_V
GPIO_FUNC141_IN_SEL_S
GPIO_FUNC142_IN_SEL_CFG_REG
GPIO_FUNC142_IN_INV_SEL_V
GPIO_FUNC142_IN_INV_SEL_S
GPIO_FUNC142_IN_SEL
GPIO_FUNC142_IN_SEL_V
GPIO_FUNC142_IN_SEL_S
GPIO_FUNC143_IN_SEL_CFG_REG
GPIO_FUNC143_IN_INV_SEL_V
GPIO_FUNC143_IN_INV_SEL_S
GPIO_FUNC143_IN_SEL
GPIO_FUNC143_IN_SEL_V
GPIO_FUNC143_IN_SEL_S
GPIO_FUNC144_IN_SEL_CFG_REG
GPIO_FUNC144_IN_INV_SEL_V
GPIO_FUNC144_IN_INV_SEL_S
GPIO_FUNC144_IN_SEL
GPIO_FUNC144_IN_SEL_V
GPIO_FUNC144_IN_SEL_S
GPIO_FUNC145_IN_SEL_CFG_REG
GPIO_FUNC145_IN_INV_SEL_V
GPIO_FUNC145_IN_INV_SEL_S
GPIO_FUNC145_IN_SEL
GPIO_FUNC145_IN_SEL_V
GPIO_FUNC145_IN_SEL_S
GPIO_FUNC146_IN_SEL_CFG_REG
GPIO_FUNC146_IN_INV_SEL_V
GPIO_FUNC146_IN_INV_SEL_S
GPIO_FUNC146_IN_SEL
GPIO_FUNC146_IN_SEL_V
GPIO_FUNC146_IN_SEL_S
GPIO_FUNC147_IN_SEL_CFG_REG
GPIO_FUNC147_IN_INV_SEL_V
GPIO_FUNC147_IN_INV_SEL_S
GPIO_FUNC147_IN_SEL
GPIO_FUNC147_IN_SEL_V
GPIO_FUNC147_IN_SEL_S
GPIO_FUNC148_IN_SEL_CFG_REG
GPIO_FUNC148_IN_INV_SEL_V
GPIO_FUNC148_IN_INV_SEL_S
GPIO_FUNC148_IN_SEL
GPIO_FUNC148_IN_SEL_V
GPIO_FUNC148_IN_SEL_S
GPIO_FUNC149_IN_SEL_CFG_REG
GPIO_FUNC149_IN_INV_SEL_V
GPIO_FUNC149_IN_INV_SEL_S
GPIO_FUNC149_IN_SEL
GPIO_FUNC149_IN_SEL_V
GPIO_FUNC149_IN_SEL_S
GPIO_FUNC150_IN_SEL_CFG_REG
GPIO_FUNC150_IN_INV_SEL_V
GPIO_FUNC150_IN_INV_SEL_S
GPIO_FUNC150_IN_SEL
GPIO_FUNC150_IN_SEL_V
GPIO_FUNC150_IN_SEL_S
GPIO_FUNC151_IN_SEL_CFG_REG
GPIO_FUNC151_IN_INV_SEL_V
GPIO_FUNC151_IN_INV_SEL_S
GPIO_FUNC151_IN_SEL
GPIO_FUNC151_IN_SEL_V
GPIO_FUNC151_IN_SEL_S
GPIO_FUNC152_IN_SEL_CFG_REG
GPIO_FUNC152_IN_INV_SEL_V
GPIO_FUNC152_IN_INV_SEL_S
GPIO_FUNC152_IN_SEL
GPIO_FUNC152_IN_SEL_V
GPIO_FUNC152_IN_SEL_S
GPIO_FUNC153_IN_SEL_CFG_REG
GPIO_FUNC153_IN_INV_SEL_V
GPIO_FUNC153_IN_INV_SEL_S
GPIO_FUNC153_IN_SEL
GPIO_FUNC153_IN_SEL_V
GPIO_FUNC153_IN_SEL_S
GPIO_FUNC154_IN_SEL_CFG_REG
GPIO_FUNC154_IN_INV_SEL_V
GPIO_FUNC154_IN_INV_SEL_S
GPIO_FUNC154_IN_SEL
GPIO_FUNC154_IN_SEL_V
GPIO_FUNC154_IN_SEL_S
GPIO_FUNC155_IN_SEL_CFG_REG
GPIO_FUNC155_IN_INV_SEL_V
GPIO_FUNC155_IN_INV_SEL_S
GPIO_FUNC155_IN_SEL
GPIO_FUNC155_IN_SEL_V
GPIO_FUNC155_IN_SEL_S
GPIO_FUNC156_IN_SEL_CFG_REG
GPIO_FUNC156_IN_INV_SEL_V
GPIO_FUNC156_IN_INV_SEL_S
GPIO_FUNC156_IN_SEL
GPIO_FUNC156_IN_SEL_V
GPIO_FUNC156_IN_SEL_S
GPIO_FUNC157_IN_SEL_CFG_REG
GPIO_FUNC157_IN_INV_SEL_V
GPIO_FUNC157_IN_INV_SEL_S
GPIO_FUNC157_IN_SEL
GPIO_FUNC157_IN_SEL_V
GPIO_FUNC157_IN_SEL_S
GPIO_FUNC158_IN_SEL_CFG_REG
GPIO_FUNC158_IN_INV_SEL_V
GPIO_FUNC158_IN_INV_SEL_S
GPIO_FUNC158_IN_SEL
GPIO_FUNC158_IN_SEL_V
GPIO_FUNC158_IN_SEL_S
GPIO_FUNC159_IN_SEL_CFG_REG
GPIO_FUNC159_IN_INV_SEL_V
GPIO_FUNC159_IN_INV_SEL_S
GPIO_FUNC159_IN_SEL
GPIO_FUNC159_IN_SEL_V
GPIO_FUNC159_IN_SEL_S
GPIO_FUNC160_IN_SEL_CFG_REG
GPIO_FUNC160_IN_INV_SEL_V
GPIO_FUNC160_IN_INV_SEL_S
GPIO_FUNC160_IN_SEL
GPIO_FUNC160_IN_SEL_V
GPIO_FUNC160_IN_SEL_S
GPIO_FUNC161_IN_SEL_CFG_REG
GPIO_FUNC161_IN_INV_SEL_V
GPIO_FUNC161_IN_INV_SEL_S
GPIO_FUNC161_IN_SEL
GPIO_FUNC161_IN_SEL_V
GPIO_FUNC161_IN_SEL_S
GPIO_FUNC162_IN_SEL_CFG_REG
GPIO_FUNC162_IN_INV_SEL_V
GPIO_FUNC162_IN_INV_SEL_S
GPIO_FUNC162_IN_SEL
GPIO_FUNC162_IN_SEL_V
GPIO_FUNC162_IN_SEL_S
GPIO_FUNC163_IN_SEL_CFG_REG
GPIO_FUNC163_IN_INV_SEL_V
GPIO_FUNC163_IN_INV_SEL_S
GPIO_FUNC163_IN_SEL
GPIO_FUNC163_IN_SEL_V
GPIO_FUNC163_IN_SEL_S
GPIO_FUNC164_IN_SEL_CFG_REG
GPIO_FUNC164_IN_INV_SEL_V
GPIO_FUNC164_IN_INV_SEL_S
GPIO_FUNC164_IN_SEL
GPIO_FUNC164_IN_SEL_V
GPIO_FUNC164_IN_SEL_S
GPIO_FUNC165_IN_SEL_CFG_REG
GPIO_FUNC165_IN_INV_SEL_V
GPIO_FUNC165_IN_INV_SEL_S
GPIO_FUNC165_IN_SEL
GPIO_FUNC165_IN_SEL_V
GPIO_FUNC165_IN_SEL_S
GPIO_FUNC166_IN_SEL_CFG_REG
GPIO_FUNC166_IN_INV_SEL_V
GPIO_FUNC166_IN_INV_SEL_S
GPIO_FUNC166_IN_SEL
GPIO_FUNC166_IN_SEL_V
GPIO_FUNC166_IN_SEL_S
GPIO_FUNC167_IN_SEL_CFG_REG
GPIO_FUNC167_IN_INV_SEL_V
GPIO_FUNC167_IN_INV_SEL_S
GPIO_FUNC167_IN_SEL
GPIO_FUNC167_IN_SEL_V
GPIO_FUNC167_IN_SEL_S
GPIO_FUNC168_IN_SEL_CFG_REG
GPIO_FUNC168_IN_INV_SEL_V
GPIO_FUNC168_IN_INV_SEL_S
GPIO_FUNC168_IN_SEL
GPIO_FUNC168_IN_SEL_V
GPIO_FUNC168_IN_SEL_S
GPIO_FUNC169_IN_SEL_CFG_REG
GPIO_FUNC169_IN_INV_SEL_V
GPIO_FUNC169_IN_INV_SEL_S
GPIO_FUNC169_IN_SEL
GPIO_FUNC169_IN_SEL_V
GPIO_FUNC169_IN_SEL_S
GPIO_FUNC170_IN_SEL_CFG_REG
GPIO_FUNC170_IN_INV_SEL_V
GPIO_FUNC170_IN_INV_SEL_S
GPIO_FUNC170_IN_SEL
GPIO_FUNC170_IN_SEL_V
GPIO_FUNC170_IN_SEL_S
GPIO_FUNC171_IN_SEL_CFG_REG
GPIO_FUNC171_IN_INV_SEL_V
GPIO_FUNC171_IN_INV_SEL_S
GPIO_FUNC171_IN_SEL
GPIO_FUNC171_IN_SEL_V
GPIO_FUNC171_IN_SEL_S
GPIO_FUNC172_IN_SEL_CFG_REG
GPIO_FUNC172_IN_INV_SEL_V
GPIO_FUNC172_IN_INV_SEL_S
GPIO_FUNC172_IN_SEL
GPIO_FUNC172_IN_SEL_V
GPIO_FUNC172_IN_SEL_S
GPIO_FUNC173_IN_SEL_CFG_REG
GPIO_FUNC173_IN_INV_SEL_V
GPIO_FUNC173_IN_INV_SEL_S
GPIO_FUNC173_IN_SEL
GPIO_FUNC173_IN_SEL_V
GPIO_FUNC173_IN_SEL_S
GPIO_FUNC174_IN_SEL_CFG_REG
GPIO_FUNC174_IN_INV_SEL_V
GPIO_FUNC174_IN_INV_SEL_S
GPIO_FUNC174_IN_SEL
GPIO_FUNC174_IN_SEL_V
GPIO_FUNC174_IN_SEL_S
GPIO_FUNC175_IN_SEL_CFG_REG
GPIO_FUNC175_IN_INV_SEL_V
GPIO_FUNC175_IN_INV_SEL_S
GPIO_FUNC175_IN_SEL
GPIO_FUNC175_IN_SEL_V
GPIO_FUNC175_IN_SEL_S
GPIO_FUNC176_IN_SEL_CFG_REG
GPIO_FUNC176_IN_INV_SEL_V
GPIO_FUNC176_IN_INV_SEL_S
GPIO_FUNC176_IN_SEL
GPIO_FUNC176_IN_SEL_V
GPIO_FUNC176_IN_SEL_S
GPIO_FUNC177_IN_SEL_CFG_REG
GPIO_FUNC177_IN_INV_SEL_V
GPIO_FUNC177_IN_INV_SEL_S
GPIO_FUNC177_IN_SEL
GPIO_FUNC177_IN_SEL_V
GPIO_FUNC177_IN_SEL_S
GPIO_FUNC178_IN_SEL_CFG_REG
GPIO_FUNC178_IN_INV_SEL_V
GPIO_FUNC178_IN_INV_SEL_S
GPIO_FUNC178_IN_SEL
GPIO_FUNC178_IN_SEL_V
GPIO_FUNC178_IN_SEL_S
GPIO_FUNC179_IN_SEL_CFG_REG
GPIO_FUNC179_IN_INV_SEL_V
GPIO_FUNC179_IN_INV_SEL_S
GPIO_FUNC179_IN_SEL
GPIO_FUNC179_IN_SEL_V
GPIO_FUNC179_IN_SEL_S
GPIO_FUNC180_IN_SEL_CFG_REG
GPIO_FUNC180_IN_INV_SEL_V
GPIO_FUNC180_IN_INV_SEL_S
GPIO_FUNC180_IN_SEL
GPIO_FUNC180_IN_SEL_V
GPIO_FUNC180_IN_SEL_S
GPIO_FUNC181_IN_SEL_CFG_REG
GPIO_FUNC181_IN_INV_SEL_V
GPIO_FUNC181_IN_INV_SEL_S
GPIO_FUNC181_IN_SEL
GPIO_FUNC181_IN_SEL_V
GPIO_FUNC181_IN_SEL_S
GPIO_FUNC182_IN_SEL_CFG_REG
GPIO_FUNC182_IN_INV_SEL_V
GPIO_FUNC182_IN_INV_SEL_S
GPIO_FUNC182_IN_SEL
GPIO_FUNC182_IN_SEL_V
GPIO_FUNC182_IN_SEL_S
GPIO_FUNC183_IN_SEL_CFG_REG
GPIO_FUNC183_IN_INV_SEL_V
GPIO_FUNC183_IN_INV_SEL_S
GPIO_FUNC183_IN_SEL
GPIO_FUNC183_IN_SEL_V
GPIO_FUNC183_IN_SEL_S
GPIO_FUNC184_IN_SEL_CFG_REG
GPIO_FUNC184_IN_INV_SEL_V
GPIO_FUNC184_IN_INV_SEL_S
GPIO_FUNC184_IN_SEL
GPIO_FUNC184_IN_SEL_V
GPIO_FUNC184_IN_SEL_S
GPIO_FUNC185_IN_SEL_CFG_REG
GPIO_FUNC185_IN_INV_SEL_V
GPIO_FUNC185_IN_INV_SEL_S
GPIO_FUNC185_IN_SEL
GPIO_FUNC185_IN_SEL_V
GPIO_FUNC185_IN_SEL_S
GPIO_FUNC186_IN_SEL_CFG_REG
GPIO_FUNC186_IN_INV_SEL_V
GPIO_FUNC186_IN_INV_SEL_S
GPIO_FUNC186_IN_SEL
GPIO_FUNC186_IN_SEL_V
GPIO_FUNC186_IN_SEL_S
GPIO_FUNC187_IN_SEL_CFG_REG
GPIO_FUNC187_IN_INV_SEL_V
GPIO_FUNC187_IN_INV_SEL_S
GPIO_FUNC187_IN_SEL
GPIO_FUNC187_IN_SEL_V
GPIO_FUNC187_IN_SEL_S
GPIO_FUNC188_IN_SEL_CFG_REG
GPIO_FUNC188_IN_INV_SEL_V
GPIO_FUNC188_IN_INV_SEL_S
GPIO_FUNC188_IN_SEL
GPIO_FUNC188_IN_SEL_V
GPIO_FUNC188_IN_SEL_S
GPIO_FUNC189_IN_SEL_CFG_REG
GPIO_FUNC189_IN_INV_SEL_V
GPIO_FUNC189_IN_INV_SEL_S
GPIO_FUNC189_IN_SEL
GPIO_FUNC189_IN_SEL_V
GPIO_FUNC189_IN_SEL_S
GPIO_FUNC190_IN_SEL_CFG_REG
GPIO_FUNC190_IN_INV_SEL_V
GPIO_FUNC190_IN_INV_SEL_S
GPIO_FUNC190_IN_SEL
GPIO_FUNC190_IN_SEL_V
GPIO_FUNC190_IN_SEL_S
GPIO_FUNC191_IN_SEL_CFG_REG
GPIO_FUNC191_IN_INV_SEL_V
GPIO_FUNC191_IN_INV_SEL_S
GPIO_FUNC191_IN_SEL
GPIO_FUNC191_IN_SEL_V
GPIO_FUNC191_IN_SEL_S
GPIO_FUNC192_IN_SEL_CFG_REG
GPIO_FUNC192_IN_INV_SEL_V
GPIO_FUNC192_IN_INV_SEL_S
GPIO_FUNC192_IN_SEL
GPIO_FUNC192_IN_SEL_V
GPIO_FUNC192_IN_SEL_S
GPIO_FUNC193_IN_SEL_CFG_REG
GPIO_FUNC193_IN_INV_SEL_V
GPIO_FUNC193_IN_INV_SEL_S
GPIO_FUNC193_IN_SEL
GPIO_FUNC193_IN_SEL_V
GPIO_FUNC193_IN_SEL_S
GPIO_FUNC194_IN_SEL_CFG_REG
GPIO_FUNC194_IN_INV_SEL_V
GPIO_FUNC194_IN_INV_SEL_S
GPIO_FUNC194_IN_SEL
GPIO_FUNC194_IN_SEL_V
GPIO_FUNC194_IN_SEL_S
GPIO_FUNC195_IN_SEL_CFG_REG
GPIO_FUNC195_IN_INV_SEL_V
GPIO_FUNC195_IN_INV_SEL_S
GPIO_FUNC195_IN_SEL
GPIO_FUNC195_IN_SEL_V
GPIO_FUNC195_IN_SEL_S
GPIO_FUNC196_IN_SEL_CFG_REG
GPIO_FUNC196_IN_INV_SEL_V
GPIO_FUNC196_IN_INV_SEL_S
GPIO_FUNC196_IN_SEL
GPIO_FUNC196_IN_SEL_V
GPIO_FUNC196_IN_SEL_S
GPIO_FUNC197_IN_SEL_CFG_REG
GPIO_FUNC197_IN_INV_SEL_V
GPIO_FUNC197_IN_INV_SEL_S
GPIO_FUNC197_IN_SEL
GPIO_FUNC197_IN_SEL_V
GPIO_FUNC197_IN_SEL_S
GPIO_FUNC198_IN_SEL_CFG_REG
GPIO_FUNC198_IN_INV_SEL_V
GPIO_FUNC198_IN_INV_SEL_S
GPIO_FUNC198_IN_SEL
GPIO_FUNC198_IN_SEL_V
GPIO_FUNC198_IN_SEL_S
GPIO_FUNC199_IN_SEL_CFG_REG
GPIO_FUNC199_IN_INV_SEL_V
GPIO_FUNC199_IN_INV_SEL_S
GPIO_FUNC199_IN_SEL
GPIO_FUNC199_IN_SEL_V
GPIO_FUNC199_IN_SEL_S
GPIO_FUNC200_IN_SEL_CFG_REG
GPIO_FUNC200_IN_INV_SEL_V
GPIO_FUNC200_IN_INV_SEL_S
GPIO_FUNC200_IN_SEL
GPIO_FUNC200_IN_SEL_V
GPIO_FUNC200_IN_SEL_S
GPIO_FUNC201_IN_SEL_CFG_REG
GPIO_FUNC201_IN_INV_SEL_V
GPIO_FUNC201_IN_INV_SEL_S
GPIO_FUNC201_IN_SEL
GPIO_FUNC201_IN_SEL_V
GPIO_FUNC201_IN_SEL_S
GPIO_FUNC202_IN_SEL_CFG_REG
GPIO_FUNC202_IN_INV_SEL_V
GPIO_FUNC202_IN_INV_SEL_S
GPIO_FUNC202_IN_SEL
GPIO_FUNC202_IN_SEL_V
GPIO_FUNC202_IN_SEL_S
GPIO_FUNC203_IN_SEL_CFG_REG
GPIO_FUNC203_IN_INV_SEL_V
GPIO_FUNC203_IN_INV_SEL_S
GPIO_FUNC203_IN_SEL
GPIO_FUNC203_IN_SEL_V
GPIO_FUNC203_IN_SEL_S
GPIO_FUNC204_IN_SEL_CFG_REG
GPIO_FUNC204_IN_INV_SEL_V
GPIO_FUNC204_IN_INV_SEL_S
GPIO_FUNC204_IN_SEL
GPIO_FUNC204_IN_SEL_V
GPIO_FUNC204_IN_SEL_S
GPIO_FUNC205_IN_SEL_CFG_REG
GPIO_FUNC205_IN_INV_SEL_V
GPIO_FUNC205_IN_INV_SEL_S
GPIO_FUNC205_IN_SEL
GPIO_FUNC205_IN_SEL_V
GPIO_FUNC205_IN_SEL_S
GPIO_FUNC206_IN_SEL_CFG_REG
GPIO_FUNC206_IN_INV_SEL_V
GPIO_FUNC206_IN_INV_SEL_S
GPIO_FUNC206_IN_SEL
GPIO_FUNC206_IN_SEL_V
GPIO_FUNC206_IN_SEL_S
GPIO_FUNC207_IN_SEL_CFG_REG
GPIO_FUNC207_IN_INV_SEL_V
GPIO_FUNC207_IN_INV_SEL_S
GPIO_FUNC207_IN_SEL
GPIO_FUNC207_IN_SEL_V
GPIO_FUNC207_IN_SEL_S
GPIO_FUNC208_IN_SEL_CFG_REG
GPIO_FUNC208_IN_INV_SEL_V
GPIO_FUNC208_IN_INV_SEL_S
GPIO_FUNC208_IN_SEL
GPIO_FUNC208_IN_SEL_V
GPIO_FUNC208_IN_SEL_S
GPIO_FUNC209_IN_SEL_CFG_REG
GPIO_FUNC209_IN_INV_SEL_V
GPIO_FUNC209_IN_INV_SEL_S
GPIO_FUNC209_IN_SEL
GPIO_FUNC209_IN_SEL_V
GPIO_FUNC209_IN_SEL_S
GPIO_FUNC210_IN_SEL_CFG_REG
GPIO_FUNC210_IN_INV_SEL_V
GPIO_FUNC210_IN_INV_SEL_S
GPIO_FUNC210_IN_SEL
GPIO_FUNC210_IN_SEL_V
GPIO_FUNC210_IN_SEL_S
GPIO_FUNC211_IN_SEL_CFG_REG
GPIO_FUNC211_IN_INV_SEL_V
GPIO_FUNC211_IN_INV_SEL_S
GPIO_FUNC211_IN_SEL
GPIO_FUNC211_IN_SEL_V
GPIO_FUNC211_IN_SEL_S
GPIO_FUNC212_IN_SEL_CFG_REG
GPIO_FUNC212_IN_INV_SEL_V
GPIO_FUNC212_IN_INV_SEL_S
GPIO_FUNC212_IN_SEL
GPIO_FUNC212_IN_SEL_V
GPIO_FUNC212_IN_SEL_S
GPIO_FUNC213_IN_SEL_CFG_REG
GPIO_FUNC213_IN_INV_SEL_V
GPIO_FUNC213_IN_INV_SEL_S
GPIO_FUNC213_IN_SEL
GPIO_FUNC213_IN_SEL_V
GPIO_FUNC213_IN_SEL_S
GPIO_FUNC214_IN_SEL_CFG_REG
GPIO_FUNC214_IN_INV_SEL_V
GPIO_FUNC214_IN_INV_SEL_S
GPIO_FUNC214_IN_SEL
GPIO_FUNC214_IN_SEL_V
GPIO_FUNC214_IN_SEL_S
GPIO_FUNC215_IN_SEL_CFG_REG
GPIO_FUNC215_IN_INV_SEL_V
GPIO_FUNC215_IN_INV_SEL_S
GPIO_FUNC215_IN_SEL
GPIO_FUNC215_IN_SEL_V
GPIO_FUNC215_IN_SEL_S
GPIO_FUNC216_IN_SEL_CFG_REG
GPIO_FUNC216_IN_INV_SEL_V
GPIO_FUNC216_IN_INV_SEL_S
GPIO_FUNC216_IN_SEL
GPIO_FUNC216_IN_SEL_V
GPIO_FUNC216_IN_SEL_S
GPIO_FUNC217_IN_SEL_CFG_REG
GPIO_FUNC217_IN_INV_SEL_V
GPIO_FUNC217_IN_INV_SEL_S
GPIO_FUNC217_IN_SEL
GPIO_FUNC217_IN_SEL_V
GPIO_FUNC217_IN_SEL_S
GPIO_FUNC218_IN_SEL_CFG_REG
GPIO_FUNC218_IN_INV_SEL_V
GPIO_FUNC218_IN_INV_SEL_S
GPIO_FUNC218_IN_SEL
GPIO_FUNC218_IN_SEL_V
GPIO_FUNC218_IN_SEL_S
GPIO_FUNC219_IN_SEL_CFG_REG
GPIO_FUNC219_IN_INV_SEL_V
GPIO_FUNC219_IN_INV_SEL_S
GPIO_FUNC219_IN_SEL
GPIO_FUNC219_IN_SEL_V
GPIO_FUNC219_IN_SEL_S
GPIO_FUNC220_IN_SEL_CFG_REG
GPIO_FUNC220_IN_INV_SEL_V
GPIO_FUNC220_IN_INV_SEL_S
GPIO_FUNC220_IN_SEL
GPIO_FUNC220_IN_SEL_V
GPIO_FUNC220_IN_SEL_S
GPIO_FUNC221_IN_SEL_CFG_REG
GPIO_FUNC221_IN_INV_SEL_V
GPIO_FUNC221_IN_INV_SEL_S
GPIO_FUNC221_IN_SEL
GPIO_FUNC221_IN_SEL_V
GPIO_FUNC221_IN_SEL_S
GPIO_FUNC222_IN_SEL_CFG_REG
GPIO_FUNC222_IN_INV_SEL_V
GPIO_FUNC222_IN_INV_SEL_S
GPIO_FUNC222_IN_SEL
GPIO_FUNC222_IN_SEL_V
GPIO_FUNC222_IN_SEL_S
GPIO_FUNC223_IN_SEL_CFG_REG
GPIO_FUNC223_IN_INV_SEL_V
GPIO_FUNC223_IN_INV_SEL_S
GPIO_FUNC223_IN_SEL
GPIO_FUNC223_IN_SEL_V
GPIO_FUNC223_IN_SEL_S
GPIO_FUNC224_IN_SEL_CFG_REG
GPIO_FUNC224_IN_INV_SEL_V
GPIO_FUNC224_IN_INV_SEL_S
GPIO_FUNC224_IN_SEL
GPIO_FUNC224_IN_SEL_V
GPIO_FUNC224_IN_SEL_S
GPIO_FUNC225_IN_SEL_CFG_REG
GPIO_FUNC225_IN_INV_SEL_V
GPIO_FUNC225_IN_INV_SEL_S
GPIO_FUNC225_IN_SEL
GPIO_FUNC225_IN_SEL_V
GPIO_FUNC225_IN_SEL_S
GPIO_FUNC226_IN_SEL_CFG_REG
GPIO_FUNC226_IN_INV_SEL_V
GPIO_FUNC226_IN_INV_SEL_S
GPIO_FUNC226_IN_SEL
GPIO_FUNC226_IN_SEL_V
GPIO_FUNC226_IN_SEL_S
GPIO_FUNC227_IN_SEL_CFG_REG
GPIO_FUNC227_IN_INV_SEL_V
GPIO_FUNC227_IN_INV_SEL_S
GPIO_FUNC227_IN_SEL
GPIO_FUNC227_IN_SEL_V
GPIO_FUNC227_IN_SEL_S
GPIO_FUNC228_IN_SEL_CFG_REG
GPIO_FUNC228_IN_INV_SEL_V
GPIO_FUNC228_IN_INV_SEL_S
GPIO_FUNC228_IN_SEL
GPIO_FUNC228_IN_SEL_V
GPIO_FUNC228_IN_SEL_S
GPIO_FUNC229_IN_SEL_CFG_REG
GPIO_FUNC229_IN_INV_SEL_V
GPIO_FUNC229_IN_INV_SEL_S
GPIO_FUNC229_IN_SEL
GPIO_FUNC229_IN_SEL_V
GPIO_FUNC229_IN_SEL_S
GPIO_FUNC230_IN_SEL_CFG_REG
GPIO_FUNC230_IN_INV_SEL_V
GPIO_FUNC230_IN_INV_SEL_S
GPIO_FUNC230_IN_SEL
GPIO_FUNC230_IN_SEL_V
GPIO_FUNC230_IN_SEL_S
GPIO_FUNC231_IN_SEL_CFG_REG
GPIO_FUNC231_IN_INV_SEL_V
GPIO_FUNC231_IN_INV_SEL_S
GPIO_FUNC231_IN_SEL
GPIO_FUNC231_IN_SEL_V
GPIO_FUNC231_IN_SEL_S
GPIO_FUNC232_IN_SEL_CFG_REG
GPIO_FUNC232_IN_INV_SEL_V
GPIO_FUNC232_IN_INV_SEL_S
GPIO_FUNC232_IN_SEL
GPIO_FUNC232_IN_SEL_V
GPIO_FUNC232_IN_SEL_S
GPIO_FUNC233_IN_SEL_CFG_REG
GPIO_FUNC233_IN_INV_SEL_V
GPIO_FUNC233_IN_INV_SEL_S
GPIO_FUNC233_IN_SEL
GPIO_FUNC233_IN_SEL_V
GPIO_FUNC233_IN_SEL_S
GPIO_FUNC234_IN_SEL_CFG_REG
GPIO_FUNC234_IN_INV_SEL_V
GPIO_FUNC234_IN_INV_SEL_S
GPIO_FUNC234_IN_SEL
GPIO_FUNC234_IN_SEL_V
GPIO_FUNC234_IN_SEL_S
GPIO_FUNC235_IN_SEL_CFG_REG
GPIO_FUNC235_IN_INV_SEL_V
GPIO_FUNC235_IN_INV_SEL_S
GPIO_FUNC235_IN_SEL
GPIO_FUNC235_IN_SEL_V
GPIO_FUNC235_IN_SEL_S
GPIO_FUNC236_IN_SEL_CFG_REG
GPIO_FUNC236_IN_INV_SEL_V
GPIO_FUNC236_IN_INV_SEL_S
GPIO_FUNC236_IN_SEL
GPIO_FUNC236_IN_SEL_V
GPIO_FUNC236_IN_SEL_S
GPIO_FUNC237_IN_SEL_CFG_REG
GPIO_FUNC237_IN_INV_SEL_V
GPIO_FUNC237_IN_INV_SEL_S
GPIO_FUNC237_IN_SEL
GPIO_FUNC237_IN_SEL_V
GPIO_FUNC237_IN_SEL_S
GPIO_FUNC238_IN_SEL_CFG_REG
GPIO_FUNC238_IN_INV_SEL_V
GPIO_FUNC238_IN_INV_SEL_S
GPIO_FUNC238_IN_SEL
GPIO_FUNC238_IN_SEL_V
GPIO_FUNC238_IN_SEL_S
GPIO_FUNC239_IN_SEL_CFG_REG
GPIO_FUNC239_IN_INV_SEL_V
GPIO_FUNC239_IN_INV_SEL_S
GPIO_FUNC239_IN_SEL
GPIO_FUNC239_IN_SEL_V
GPIO_FUNC239_IN_SEL_S
GPIO_FUNC240_IN_SEL_CFG_REG
GPIO_FUNC240_IN_INV_SEL_V
GPIO_FUNC240_IN_INV_SEL_S
GPIO_FUNC240_IN_SEL
GPIO_FUNC240_IN_SEL_V
GPIO_FUNC240_IN_SEL_S
GPIO_FUNC241_IN_SEL_CFG_REG
GPIO_FUNC241_IN_INV_SEL_V
GPIO_FUNC241_IN_INV_SEL_S
GPIO_FUNC241_IN_SEL
GPIO_FUNC241_IN_SEL_V
GPIO_FUNC241_IN_SEL_S
GPIO_FUNC242_IN_SEL_CFG_REG
GPIO_FUNC242_IN_INV_SEL_V
GPIO_FUNC242_IN_INV_SEL_S
GPIO_FUNC242_IN_SEL
GPIO_FUNC242_IN_SEL_V
GPIO_FUNC242_IN_SEL_S
GPIO_FUNC243_IN_SEL_CFG_REG
GPIO_FUNC243_IN_INV_SEL_V
GPIO_FUNC243_IN_INV_SEL_S
GPIO_FUNC243_IN_SEL
GPIO_FUNC243_IN_SEL_V
GPIO_FUNC243_IN_SEL_S
GPIO_FUNC244_IN_SEL_CFG_REG
GPIO_FUNC244_IN_INV_SEL_V
GPIO_FUNC244_IN_INV_SEL_S
GPIO_FUNC244_IN_SEL
GPIO_FUNC244_IN_SEL_V
GPIO_FUNC244_IN_SEL_S
GPIO_FUNC245_IN_SEL_CFG_REG
GPIO_FUNC245_IN_INV_SEL_V
GPIO_FUNC245_IN_INV_SEL_S
GPIO_FUNC245_IN_SEL
GPIO_FUNC245_IN_SEL_V
GPIO_FUNC245_IN_SEL_S
GPIO_FUNC246_IN_SEL_CFG_REG
GPIO_FUNC246_IN_INV_SEL_V
GPIO_FUNC246_IN_INV_SEL_S
GPIO_FUNC246_IN_SEL
GPIO_FUNC246_IN_SEL_V
GPIO_FUNC246_IN_SEL_S
GPIO_FUNC247_IN_SEL_CFG_REG
GPIO_FUNC247_IN_INV_SEL_V
GPIO_FUNC247_IN_INV_SEL_S
GPIO_FUNC247_IN_SEL
GPIO_FUNC247_IN_SEL_V
GPIO_FUNC247_IN_SEL_S
GPIO_FUNC248_IN_SEL_CFG_REG
GPIO_FUNC248_IN_INV_SEL_V
GPIO_FUNC248_IN_INV_SEL_S
GPIO_FUNC248_IN_SEL
GPIO_FUNC248_IN_SEL_V
GPIO_FUNC248_IN_SEL_S
GPIO_FUNC249_IN_SEL_CFG_REG
GPIO_FUNC249_IN_INV_SEL_V
GPIO_FUNC249_IN_INV_SEL_S
GPIO_FUNC249_IN_SEL
GPIO_FUNC249_IN_SEL_V
GPIO_FUNC249_IN_SEL_S
GPIO_FUNC250_IN_SEL_CFG_REG
GPIO_FUNC250_IN_INV_SEL_V
GPIO_FUNC250_IN_INV_SEL_S
GPIO_FUNC250_IN_SEL
GPIO_FUNC250_IN_SEL_V
GPIO_FUNC250_IN_SEL_S
GPIO_FUNC251_IN_SEL_CFG_REG
GPIO_FUNC251_IN_INV_SEL_V
GPIO_FUNC251_IN_INV_SEL_S
GPIO_FUNC251_IN_SEL
GPIO_FUNC251_IN_SEL_V
GPIO_FUNC251_IN_SEL_S
GPIO_FUNC252_IN_SEL_CFG_REG
GPIO_FUNC252_IN_INV_SEL_V
GPIO_FUNC252_IN_INV_SEL_S
GPIO_FUNC252_IN_SEL
GPIO_FUNC252_IN_SEL_V
GPIO_FUNC252_IN_SEL_S
GPIO_FUNC253_IN_SEL_CFG_REG
GPIO_FUNC253_IN_INV_SEL_V
GPIO_FUNC253_IN_INV_SEL_S
GPIO_FUNC253_IN_SEL
GPIO_FUNC253_IN_SEL_V
GPIO_FUNC253_IN_SEL_S
GPIO_FUNC254_IN_SEL_CFG_REG
GPIO_FUNC254_IN_INV_SEL_V
GPIO_FUNC254_IN_INV_SEL_S
GPIO_FUNC254_IN_SEL
GPIO_FUNC254_IN_SEL_V
GPIO_FUNC254_IN_SEL_S
GPIO_FUNC255_IN_SEL_CFG_REG
GPIO_FUNC255_IN_INV_SEL_V
GPIO_FUNC255_IN_INV_SEL_S
GPIO_FUNC255_IN_SEL
GPIO_FUNC255_IN_SEL_V
GPIO_FUNC255_IN_SEL_S
GPIO_FUNC_IN_HIGH
GPIO_FUNC_IN_LOW
GPIO_ID_PIN0
GPIO_IN1_REG
GPIO_IN1_DATA
GPIO_IN1_DATA_V
GPIO_IN1_DATA_S
GPIO_IN_DATA
GPIO_IN_DATA_S
GPIO_IN_DATA_V
GPIO_IN_REG
GPIO_MATRIX_DELAY_NS
GPIO_MODE_DEF_DISABLE
GPIO_MODE_DEF_INPUT
GPIO_MODE_DEF_OD
GPIO_MODE_DEF_OUTPUT
GPIO_OUT1_REG
GPIO_OUT1_DATA
GPIO_OUT1_DATA_V
GPIO_OUT1_DATA_S
GPIO_OUT1_DATA_W1TS
GPIO_OUT1_DATA_W1TS_V
GPIO_OUT1_DATA_W1TS_S
GPIO_OUT1_DATA_W1TC
GPIO_OUT1_DATA_W1TC_V
GPIO_OUT1_DATA_W1TC_S
GPIO_OUT1_W1TS_REG
GPIO_OUT1_W1TC_REG
GPIO_OUT_DATA
GPIO_OUT_DATA_S
GPIO_OUT_DATA_V
GPIO_OUT_DATA_W1TS
GPIO_OUT_DATA_W1TS_V
GPIO_OUT_DATA_W1TS_S
GPIO_OUT_DATA_W1TC
GPIO_OUT_DATA_W1TC_V
GPIO_OUT_DATA_W1TC_S
GPIO_OUT_REG
GPIO_OUT_W1TS_REG
GPIO_OUT_W1TC_REG
GPIO_PCPU_INT1_REG
GPIO_PCPU_INT_REG
GPIO_PCPU_NMI_INT1_REG
GPIO_PCPU_NMI_INT_REG
GPIO_PIN0_REG
GPIO_PIN0_CONFIG
GPIO_PIN0_INT_ENA
GPIO_PIN0_CONFIG_V
GPIO_PIN0_CONFIG_S
GPIO_PIN0_INT_TYPE
GPIO_PIN0_INT_ENA_V
GPIO_PIN0_INT_ENA_S
GPIO_PIN0_INT_TYPE_V
GPIO_PIN0_INT_TYPE_S
GPIO_PIN0_PAD_DRIVER_V
GPIO_PIN0_PAD_DRIVER_S
GPIO_PIN0_WAKEUP_ENABLE_V
GPIO_PIN0_WAKEUP_ENABLE_S
GPIO_PIN1_REG
GPIO_PIN1_INT_ENA
GPIO_PIN1_INT_ENA_V
GPIO_PIN1_INT_ENA_S
GPIO_PIN1_CONFIG
GPIO_PIN1_CONFIG_V
GPIO_PIN1_CONFIG_S
GPIO_PIN1_WAKEUP_ENABLE_V
GPIO_PIN1_WAKEUP_ENABLE_S
GPIO_PIN1_INT_TYPE
GPIO_PIN1_INT_TYPE_V
GPIO_PIN1_INT_TYPE_S
GPIO_PIN1_PAD_DRIVER_V
GPIO_PIN1_PAD_DRIVER_S
GPIO_PIN2_REG
GPIO_PIN2_INT_ENA
GPIO_PIN2_INT_ENA_V
GPIO_PIN2_INT_ENA_S
GPIO_PIN2_CONFIG
GPIO_PIN2_CONFIG_V
GPIO_PIN2_CONFIG_S
GPIO_PIN2_WAKEUP_ENABLE_V
GPIO_PIN2_WAKEUP_ENABLE_S
GPIO_PIN2_INT_TYPE
GPIO_PIN2_INT_TYPE_V
GPIO_PIN2_INT_TYPE_S
GPIO_PIN2_PAD_DRIVER_V
GPIO_PIN2_PAD_DRIVER_S
GPIO_PIN3_REG
GPIO_PIN3_INT_ENA
GPIO_PIN3_INT_ENA_V
GPIO_PIN3_INT_ENA_S
GPIO_PIN3_CONFIG
GPIO_PIN3_CONFIG_V
GPIO_PIN3_CONFIG_S
GPIO_PIN3_WAKEUP_ENABLE_V
GPIO_PIN3_WAKEUP_ENABLE_S
GPIO_PIN3_INT_TYPE
GPIO_PIN3_INT_TYPE_V
GPIO_PIN3_INT_TYPE_S
GPIO_PIN3_PAD_DRIVER_V
GPIO_PIN3_PAD_DRIVER_S
GPIO_PIN4_REG
GPIO_PIN4_INT_ENA
GPIO_PIN4_INT_ENA_V
GPIO_PIN4_INT_ENA_S
GPIO_PIN4_CONFIG
GPIO_PIN4_CONFIG_V
GPIO_PIN4_CONFIG_S
GPIO_PIN4_WAKEUP_ENABLE_V
GPIO_PIN4_WAKEUP_ENABLE_S
GPIO_PIN4_INT_TYPE
GPIO_PIN4_INT_TYPE_V
GPIO_PIN4_INT_TYPE_S
GPIO_PIN4_PAD_DRIVER_V
GPIO_PIN4_PAD_DRIVER_S
GPIO_PIN5_REG
GPIO_PIN5_INT_ENA
GPIO_PIN5_INT_ENA_V
GPIO_PIN5_INT_ENA_S
GPIO_PIN5_CONFIG
GPIO_PIN5_CONFIG_V
GPIO_PIN5_CONFIG_S
GPIO_PIN5_WAKEUP_ENABLE_V
GPIO_PIN5_WAKEUP_ENABLE_S
GPIO_PIN5_INT_TYPE
GPIO_PIN5_INT_TYPE_V
GPIO_PIN5_INT_TYPE_S
GPIO_PIN5_PAD_DRIVER_V
GPIO_PIN5_PAD_DRIVER_S
GPIO_PIN6_REG
GPIO_PIN6_INT_ENA
GPIO_PIN6_INT_ENA_V
GPIO_PIN6_INT_ENA_S
GPIO_PIN6_CONFIG
GPIO_PIN6_CONFIG_V
GPIO_PIN6_CONFIG_S
GPIO_PIN6_WAKEUP_ENABLE_V
GPIO_PIN6_WAKEUP_ENABLE_S
GPIO_PIN6_INT_TYPE
GPIO_PIN6_INT_TYPE_V
GPIO_PIN6_INT_TYPE_S
GPIO_PIN6_PAD_DRIVER_V
GPIO_PIN6_PAD_DRIVER_S
GPIO_PIN7_REG
GPIO_PIN7_INT_ENA
GPIO_PIN7_INT_ENA_V
GPIO_PIN7_INT_ENA_S
GPIO_PIN7_CONFIG
GPIO_PIN7_CONFIG_V
GPIO_PIN7_CONFIG_S
GPIO_PIN7_WAKEUP_ENABLE_V
GPIO_PIN7_WAKEUP_ENABLE_S
GPIO_PIN7_INT_TYPE
GPIO_PIN7_INT_TYPE_V
GPIO_PIN7_INT_TYPE_S
GPIO_PIN7_PAD_DRIVER_V
GPIO_PIN7_PAD_DRIVER_S
GPIO_PIN8_REG
GPIO_PIN8_INT_ENA
GPIO_PIN8_INT_ENA_V
GPIO_PIN8_INT_ENA_S
GPIO_PIN8_CONFIG
GPIO_PIN8_CONFIG_V
GPIO_PIN8_CONFIG_S
GPIO_PIN8_WAKEUP_ENABLE_V
GPIO_PIN8_WAKEUP_ENABLE_S
GPIO_PIN8_INT_TYPE
GPIO_PIN8_INT_TYPE_V
GPIO_PIN8_INT_TYPE_S
GPIO_PIN8_PAD_DRIVER_V
GPIO_PIN8_PAD_DRIVER_S
GPIO_PIN9_REG
GPIO_PIN9_INT_ENA
GPIO_PIN9_INT_ENA_V
GPIO_PIN9_INT_ENA_S
GPIO_PIN9_CONFIG
GPIO_PIN9_CONFIG_V
GPIO_PIN9_CONFIG_S
GPIO_PIN9_WAKEUP_ENABLE_V
GPIO_PIN9_WAKEUP_ENABLE_S
GPIO_PIN9_INT_TYPE
GPIO_PIN9_INT_TYPE_V
GPIO_PIN9_INT_TYPE_S
GPIO_PIN9_PAD_DRIVER_V
GPIO_PIN9_PAD_DRIVER_S
GPIO_PIN10_REG
GPIO_PIN10_INT_ENA
GPIO_PIN10_INT_ENA_V
GPIO_PIN10_INT_ENA_S
GPIO_PIN10_CONFIG
GPIO_PIN10_CONFIG_V
GPIO_PIN10_CONFIG_S
GPIO_PIN10_WAKEUP_ENABLE_V
GPIO_PIN10_WAKEUP_ENABLE_S
GPIO_PIN10_INT_TYPE
GPIO_PIN10_INT_TYPE_V
GPIO_PIN10_INT_TYPE_S
GPIO_PIN10_PAD_DRIVER_V
GPIO_PIN10_PAD_DRIVER_S
GPIO_PIN11_REG
GPIO_PIN11_INT_ENA
GPIO_PIN11_INT_ENA_V
GPIO_PIN11_INT_ENA_S
GPIO_PIN11_CONFIG
GPIO_PIN11_CONFIG_V
GPIO_PIN11_CONFIG_S
GPIO_PIN11_WAKEUP_ENABLE_V
GPIO_PIN11_WAKEUP_ENABLE_S
GPIO_PIN11_INT_TYPE
GPIO_PIN11_INT_TYPE_V
GPIO_PIN11_INT_TYPE_S
GPIO_PIN11_PAD_DRIVER_V
GPIO_PIN11_PAD_DRIVER_S
GPIO_PIN12_REG
GPIO_PIN12_INT_ENA
GPIO_PIN12_INT_ENA_V
GPIO_PIN12_INT_ENA_S
GPIO_PIN12_CONFIG
GPIO_PIN12_CONFIG_V
GPIO_PIN12_CONFIG_S
GPIO_PIN12_WAKEUP_ENABLE_V
GPIO_PIN12_WAKEUP_ENABLE_S
GPIO_PIN12_INT_TYPE
GPIO_PIN12_INT_TYPE_V
GPIO_PIN12_INT_TYPE_S
GPIO_PIN12_PAD_DRIVER_V
GPIO_PIN12_PAD_DRIVER_S
GPIO_PIN13_REG
GPIO_PIN13_INT_ENA
GPIO_PIN13_INT_ENA_V
GPIO_PIN13_INT_ENA_S
GPIO_PIN13_CONFIG
GPIO_PIN13_CONFIG_V
GPIO_PIN13_CONFIG_S
GPIO_PIN13_WAKEUP_ENABLE_V
GPIO_PIN13_WAKEUP_ENABLE_S
GPIO_PIN13_INT_TYPE
GPIO_PIN13_INT_TYPE_V
GPIO_PIN13_INT_TYPE_S
GPIO_PIN13_PAD_DRIVER_V
GPIO_PIN13_PAD_DRIVER_S
GPIO_PIN14_REG
GPIO_PIN14_INT_ENA
GPIO_PIN14_INT_ENA_V
GPIO_PIN14_INT_ENA_S
GPIO_PIN14_CONFIG
GPIO_PIN14_CONFIG_V
GPIO_PIN14_CONFIG_S
GPIO_PIN14_WAKEUP_ENABLE_V
GPIO_PIN14_WAKEUP_ENABLE_S
GPIO_PIN14_INT_TYPE
GPIO_PIN14_INT_TYPE_V
GPIO_PIN14_INT_TYPE_S
GPIO_PIN14_PAD_DRIVER_V
GPIO_PIN14_PAD_DRIVER_S
GPIO_PIN15_REG
GPIO_PIN15_INT_ENA
GPIO_PIN15_INT_ENA_V
GPIO_PIN15_INT_ENA_S
GPIO_PIN15_CONFIG
GPIO_PIN15_CONFIG_V
GPIO_PIN15_CONFIG_S
GPIO_PIN15_WAKEUP_ENABLE_V
GPIO_PIN15_WAKEUP_ENABLE_S
GPIO_PIN15_INT_TYPE
GPIO_PIN15_INT_TYPE_V
GPIO_PIN15_INT_TYPE_S
GPIO_PIN15_PAD_DRIVER_V
GPIO_PIN15_PAD_DRIVER_S
GPIO_PIN16_REG
GPIO_PIN16_INT_ENA
GPIO_PIN16_INT_ENA_V
GPIO_PIN16_INT_ENA_S
GPIO_PIN16_CONFIG
GPIO_PIN16_CONFIG_V
GPIO_PIN16_CONFIG_S
GPIO_PIN16_WAKEUP_ENABLE_V
GPIO_PIN16_WAKEUP_ENABLE_S
GPIO_PIN16_INT_TYPE
GPIO_PIN16_INT_TYPE_V
GPIO_PIN16_INT_TYPE_S
GPIO_PIN16_PAD_DRIVER_V
GPIO_PIN16_PAD_DRIVER_S
GPIO_PIN17_REG
GPIO_PIN17_INT_ENA
GPIO_PIN17_INT_ENA_V
GPIO_PIN17_INT_ENA_S
GPIO_PIN17_CONFIG
GPIO_PIN17_CONFIG_V
GPIO_PIN17_CONFIG_S
GPIO_PIN17_WAKEUP_ENABLE_V
GPIO_PIN17_WAKEUP_ENABLE_S
GPIO_PIN17_INT_TYPE
GPIO_PIN17_INT_TYPE_V
GPIO_PIN17_INT_TYPE_S
GPIO_PIN17_PAD_DRIVER_V
GPIO_PIN17_PAD_DRIVER_S
GPIO_PIN18_REG
GPIO_PIN18_INT_ENA
GPIO_PIN18_INT_ENA_V
GPIO_PIN18_INT_ENA_S
GPIO_PIN18_CONFIG
GPIO_PIN18_CONFIG_V
GPIO_PIN18_CONFIG_S
GPIO_PIN18_WAKEUP_ENABLE_V
GPIO_PIN18_WAKEUP_ENABLE_S
GPIO_PIN18_INT_TYPE
GPIO_PIN18_INT_TYPE_V
GPIO_PIN18_INT_TYPE_S
GPIO_PIN18_PAD_DRIVER_V
GPIO_PIN18_PAD_DRIVER_S
GPIO_PIN19_REG
GPIO_PIN19_INT_ENA
GPIO_PIN19_INT_ENA_V
GPIO_PIN19_INT_ENA_S
GPIO_PIN19_CONFIG
GPIO_PIN19_CONFIG_V
GPIO_PIN19_CONFIG_S
GPIO_PIN19_WAKEUP_ENABLE_V
GPIO_PIN19_WAKEUP_ENABLE_S
GPIO_PIN19_INT_TYPE
GPIO_PIN19_INT_TYPE_V
GPIO_PIN19_INT_TYPE_S
GPIO_PIN19_PAD_DRIVER_V
GPIO_PIN19_PAD_DRIVER_S
GPIO_PIN20_REG
GPIO_PIN20_INT_ENA
GPIO_PIN20_INT_ENA_V
GPIO_PIN20_INT_ENA_S
GPIO_PIN20_CONFIG
GPIO_PIN20_CONFIG_V
GPIO_PIN20_CONFIG_S
GPIO_PIN20_WAKEUP_ENABLE_V
GPIO_PIN20_WAKEUP_ENABLE_S
GPIO_PIN20_INT_TYPE
GPIO_PIN20_INT_TYPE_V
GPIO_PIN20_INT_TYPE_S
GPIO_PIN20_PAD_DRIVER_V
GPIO_PIN20_PAD_DRIVER_S
GPIO_PIN21_REG
GPIO_PIN21_INT_ENA
GPIO_PIN21_INT_ENA_V
GPIO_PIN21_INT_ENA_S
GPIO_PIN21_CONFIG
GPIO_PIN21_CONFIG_V
GPIO_PIN21_CONFIG_S
GPIO_PIN21_WAKEUP_ENABLE_V
GPIO_PIN21_WAKEUP_ENABLE_S
GPIO_PIN21_INT_TYPE
GPIO_PIN21_INT_TYPE_V
GPIO_PIN21_INT_TYPE_S
GPIO_PIN21_PAD_DRIVER_V
GPIO_PIN21_PAD_DRIVER_S
GPIO_PIN22_REG
GPIO_PIN22_INT_ENA
GPIO_PIN22_INT_ENA_V
GPIO_PIN22_INT_ENA_S
GPIO_PIN22_CONFIG
GPIO_PIN22_CONFIG_V
GPIO_PIN22_CONFIG_S
GPIO_PIN22_WAKEUP_ENABLE_V
GPIO_PIN22_WAKEUP_ENABLE_S
GPIO_PIN22_INT_TYPE
GPIO_PIN22_INT_TYPE_V
GPIO_PIN22_INT_TYPE_S
GPIO_PIN22_PAD_DRIVER_V
GPIO_PIN22_PAD_DRIVER_S
GPIO_PIN23_REG
GPIO_PIN23_INT_ENA
GPIO_PIN23_INT_ENA_V
GPIO_PIN23_INT_ENA_S
GPIO_PIN23_CONFIG
GPIO_PIN23_CONFIG_V
GPIO_PIN23_CONFIG_S
GPIO_PIN23_WAKEUP_ENABLE_V
GPIO_PIN23_WAKEUP_ENABLE_S
GPIO_PIN23_INT_TYPE
GPIO_PIN23_INT_TYPE_V
GPIO_PIN23_INT_TYPE_S
GPIO_PIN23_PAD_DRIVER_V
GPIO_PIN23_PAD_DRIVER_S
GPIO_PIN24_REG
GPIO_PIN24_INT_ENA
GPIO_PIN24_INT_ENA_V
GPIO_PIN24_INT_ENA_S
GPIO_PIN24_CONFIG
GPIO_PIN24_CONFIG_V
GPIO_PIN24_CONFIG_S
GPIO_PIN24_WAKEUP_ENABLE_V
GPIO_PIN24_WAKEUP_ENABLE_S
GPIO_PIN24_INT_TYPE
GPIO_PIN24_INT_TYPE_V
GPIO_PIN24_INT_TYPE_S
GPIO_PIN24_PAD_DRIVER_V
GPIO_PIN24_PAD_DRIVER_S
GPIO_PIN25_REG
GPIO_PIN25_INT_ENA
GPIO_PIN25_INT_ENA_V
GPIO_PIN25_INT_ENA_S
GPIO_PIN25_CONFIG
GPIO_PIN25_CONFIG_V
GPIO_PIN25_CONFIG_S
GPIO_PIN25_WAKEUP_ENABLE_V
GPIO_PIN25_WAKEUP_ENABLE_S
GPIO_PIN25_INT_TYPE
GPIO_PIN25_INT_TYPE_V
GPIO_PIN25_INT_TYPE_S
GPIO_PIN25_PAD_DRIVER_V
GPIO_PIN25_PAD_DRIVER_S
GPIO_PIN26_REG
GPIO_PIN26_INT_ENA
GPIO_PIN26_INT_ENA_V
GPIO_PIN26_INT_ENA_S
GPIO_PIN26_CONFIG
GPIO_PIN26_CONFIG_V
GPIO_PIN26_CONFIG_S
GPIO_PIN26_WAKEUP_ENABLE_V
GPIO_PIN26_WAKEUP_ENABLE_S
GPIO_PIN26_INT_TYPE
GPIO_PIN26_INT_TYPE_V
GPIO_PIN26_INT_TYPE_S
GPIO_PIN26_PAD_DRIVER_V
GPIO_PIN26_PAD_DRIVER_S
GPIO_PIN27_REG
GPIO_PIN27_INT_ENA
GPIO_PIN27_INT_ENA_V
GPIO_PIN27_INT_ENA_S
GPIO_PIN27_CONFIG
GPIO_PIN27_CONFIG_V
GPIO_PIN27_CONFIG_S
GPIO_PIN27_WAKEUP_ENABLE_V
GPIO_PIN27_WAKEUP_ENABLE_S
GPIO_PIN27_INT_TYPE
GPIO_PIN27_INT_TYPE_V
GPIO_PIN27_INT_TYPE_S
GPIO_PIN27_PAD_DRIVER_V
GPIO_PIN27_PAD_DRIVER_S
GPIO_PIN28_REG
GPIO_PIN28_INT_ENA
GPIO_PIN28_INT_ENA_V
GPIO_PIN28_INT_ENA_S
GPIO_PIN28_CONFIG
GPIO_PIN28_CONFIG_V
GPIO_PIN28_CONFIG_S
GPIO_PIN28_WAKEUP_ENABLE_V
GPIO_PIN28_WAKEUP_ENABLE_S
GPIO_PIN28_INT_TYPE
GPIO_PIN28_INT_TYPE_V
GPIO_PIN28_INT_TYPE_S
GPIO_PIN28_PAD_DRIVER_V
GPIO_PIN28_PAD_DRIVER_S
GPIO_PIN29_REG
GPIO_PIN29_INT_ENA
GPIO_PIN29_INT_ENA_V
GPIO_PIN29_INT_ENA_S
GPIO_PIN29_CONFIG
GPIO_PIN29_CONFIG_V
GPIO_PIN29_CONFIG_S
GPIO_PIN29_WAKEUP_ENABLE_V
GPIO_PIN29_WAKEUP_ENABLE_S
GPIO_PIN29_INT_TYPE
GPIO_PIN29_INT_TYPE_V
GPIO_PIN29_INT_TYPE_S
GPIO_PIN29_PAD_DRIVER_V
GPIO_PIN29_PAD_DRIVER_S
GPIO_PIN30_REG
GPIO_PIN30_INT_ENA
GPIO_PIN30_INT_ENA_V
GPIO_PIN30_INT_ENA_S
GPIO_PIN30_CONFIG
GPIO_PIN30_CONFIG_V
GPIO_PIN30_CONFIG_S
GPIO_PIN30_WAKEUP_ENABLE_V
GPIO_PIN30_WAKEUP_ENABLE_S
GPIO_PIN30_INT_TYPE
GPIO_PIN30_INT_TYPE_V
GPIO_PIN30_INT_TYPE_S
GPIO_PIN30_PAD_DRIVER_V
GPIO_PIN30_PAD_DRIVER_S
GPIO_PIN31_REG
GPIO_PIN31_INT_ENA
GPIO_PIN31_INT_ENA_V
GPIO_PIN31_INT_ENA_S
GPIO_PIN31_CONFIG
GPIO_PIN31_CONFIG_V
GPIO_PIN31_CONFIG_S
GPIO_PIN31_WAKEUP_ENABLE_V
GPIO_PIN31_WAKEUP_ENABLE_S
GPIO_PIN31_INT_TYPE
GPIO_PIN31_INT_TYPE_V
GPIO_PIN31_INT_TYPE_S
GPIO_PIN31_PAD_DRIVER_V
GPIO_PIN31_PAD_DRIVER_S
GPIO_PIN32_REG
GPIO_PIN32_INT_ENA
GPIO_PIN32_INT_ENA_V
GPIO_PIN32_INT_ENA_S
GPIO_PIN32_CONFIG
GPIO_PIN32_CONFIG_V
GPIO_PIN32_CONFIG_S
GPIO_PIN32_WAKEUP_ENABLE_V
GPIO_PIN32_WAKEUP_ENABLE_S
GPIO_PIN32_INT_TYPE
GPIO_PIN32_INT_TYPE_V
GPIO_PIN32_INT_TYPE_S
GPIO_PIN32_PAD_DRIVER_V
GPIO_PIN32_PAD_DRIVER_S
GPIO_PIN33_REG
GPIO_PIN33_INT_ENA
GPIO_PIN33_INT_ENA_V
GPIO_PIN33_INT_ENA_S
GPIO_PIN33_CONFIG
GPIO_PIN33_CONFIG_V
GPIO_PIN33_CONFIG_S
GPIO_PIN33_WAKEUP_ENABLE_V
GPIO_PIN33_WAKEUP_ENABLE_S
GPIO_PIN33_INT_TYPE
GPIO_PIN33_INT_TYPE_V
GPIO_PIN33_INT_TYPE_S
GPIO_PIN33_PAD_DRIVER_V
GPIO_PIN33_PAD_DRIVER_S
GPIO_PIN34_REG
GPIO_PIN34_INT_ENA
GPIO_PIN34_INT_ENA_V
GPIO_PIN34_INT_ENA_S
GPIO_PIN34_CONFIG
GPIO_PIN34_CONFIG_V
GPIO_PIN34_CONFIG_S
GPIO_PIN34_WAKEUP_ENABLE_V
GPIO_PIN34_WAKEUP_ENABLE_S
GPIO_PIN34_INT_TYPE
GPIO_PIN34_INT_TYPE_V
GPIO_PIN34_INT_TYPE_S
GPIO_PIN34_PAD_DRIVER_V
GPIO_PIN34_PAD_DRIVER_S
GPIO_PIN35_REG
GPIO_PIN35_INT_ENA
GPIO_PIN35_INT_ENA_V
GPIO_PIN35_INT_ENA_S
GPIO_PIN35_CONFIG
GPIO_PIN35_CONFIG_V
GPIO_PIN35_CONFIG_S
GPIO_PIN35_WAKEUP_ENABLE_V
GPIO_PIN35_WAKEUP_ENABLE_S
GPIO_PIN35_INT_TYPE
GPIO_PIN35_INT_TYPE_V
GPIO_PIN35_INT_TYPE_S
GPIO_PIN35_PAD_DRIVER_V
GPIO_PIN35_PAD_DRIVER_S
GPIO_PIN36_REG
GPIO_PIN36_INT_ENA
GPIO_PIN36_INT_ENA_V
GPIO_PIN36_INT_ENA_S
GPIO_PIN36_CONFIG
GPIO_PIN36_CONFIG_V
GPIO_PIN36_CONFIG_S
GPIO_PIN36_WAKEUP_ENABLE_V
GPIO_PIN36_WAKEUP_ENABLE_S
GPIO_PIN36_INT_TYPE
GPIO_PIN36_INT_TYPE_V
GPIO_PIN36_INT_TYPE_S
GPIO_PIN36_PAD_DRIVER_V
GPIO_PIN36_PAD_DRIVER_S
GPIO_PIN37_REG
GPIO_PIN37_INT_ENA
GPIO_PIN37_INT_ENA_V
GPIO_PIN37_INT_ENA_S
GPIO_PIN37_CONFIG
GPIO_PIN37_CONFIG_V
GPIO_PIN37_CONFIG_S
GPIO_PIN37_WAKEUP_ENABLE_V
GPIO_PIN37_WAKEUP_ENABLE_S
GPIO_PIN37_INT_TYPE
GPIO_PIN37_INT_TYPE_V
GPIO_PIN37_INT_TYPE_S
GPIO_PIN37_PAD_DRIVER_V
GPIO_PIN37_PAD_DRIVER_S
GPIO_PIN38_REG
GPIO_PIN38_INT_ENA
GPIO_PIN38_INT_ENA_V
GPIO_PIN38_INT_ENA_S
GPIO_PIN38_CONFIG
GPIO_PIN38_CONFIG_V
GPIO_PIN38_CONFIG_S
GPIO_PIN38_WAKEUP_ENABLE_V
GPIO_PIN38_WAKEUP_ENABLE_S
GPIO_PIN38_INT_TYPE
GPIO_PIN38_INT_TYPE_V
GPIO_PIN38_INT_TYPE_S
GPIO_PIN38_PAD_DRIVER_V
GPIO_PIN38_PAD_DRIVER_S
GPIO_PIN39_REG
GPIO_PIN39_INT_ENA
GPIO_PIN39_INT_ENA_V
GPIO_PIN39_INT_ENA_S
GPIO_PIN39_CONFIG
GPIO_PIN39_CONFIG_V
GPIO_PIN39_CONFIG_S
GPIO_PIN39_WAKEUP_ENABLE_V
GPIO_PIN39_WAKEUP_ENABLE_S
GPIO_PIN39_INT_TYPE
GPIO_PIN39_INT_TYPE_V
GPIO_PIN39_INT_TYPE_S
GPIO_PIN39_PAD_DRIVER_V
GPIO_PIN39_PAD_DRIVER_S
GPIO_PIN_CONFIG
GPIO_PIN_CONFIG_S
GPIO_PIN_CONFIG_V
GPIO_PIN_COUNT
GPIO_PIN_INT_ENA
GPIO_PIN_INT_ENA_S
GPIO_PIN_INT_ENA_V
GPIO_PIN_INT_TYPE
GPIO_PIN_INT_TYPE_S
GPIO_PIN_INT_TYPE_V
GPIO_PIN_PAD_DRIVER_S
GPIO_PIN_PAD_DRIVER_V
GPIO_PIN_REG_0
GPIO_PIN_REG_1
GPIO_PIN_REG_2
GPIO_PIN_REG_3
GPIO_PIN_REG_4
GPIO_PIN_REG_5
GPIO_PIN_REG_6
GPIO_PIN_REG_7
GPIO_PIN_REG_8
GPIO_PIN_REG_9
GPIO_PIN_REG_10
GPIO_PIN_REG_11
GPIO_PIN_REG_12
GPIO_PIN_REG_13
GPIO_PIN_REG_14
GPIO_PIN_REG_15
GPIO_PIN_REG_16
GPIO_PIN_REG_17
GPIO_PIN_REG_18
GPIO_PIN_REG_19
GPIO_PIN_REG_20
GPIO_PIN_REG_21
GPIO_PIN_REG_22
GPIO_PIN_REG_23
GPIO_PIN_REG_24
GPIO_PIN_REG_25
GPIO_PIN_REG_26
GPIO_PIN_REG_27
GPIO_PIN_REG_32
GPIO_PIN_REG_33
GPIO_PIN_REG_34
GPIO_PIN_REG_35
GPIO_PIN_REG_36
GPIO_PIN_REG_37
GPIO_PIN_REG_38
GPIO_PIN_REG_39
GPIO_PIN_WAKEUP_ENABLE_S
GPIO_PIN_WAKEUP_ENABLE_V
GPIO_PROCPU_INT
GPIO_PROCPU_INT_H
GPIO_PROCPU_INT_H_S
GPIO_PROCPU_INT_H_V
GPIO_PROCPU_INT_S
GPIO_PROCPU_INT_V
GPIO_PROCPU_NMI_INT
GPIO_PROCPU_NMI_INT_H
GPIO_PROCPU_NMI_INT_H_S
GPIO_PROCPU_NMI_INT_H_V
GPIO_PROCPU_NMI_INT_S
GPIO_PROCPU_NMI_INT_V
GPIO_SD0_OUT_IDX
GPIO_SD1_OUT_IDX
GPIO_SD2_OUT_IDX
GPIO_SD3_OUT_IDX
GPIO_SD4_OUT_IDX
GPIO_SD5_OUT_IDX
GPIO_SD6_OUT_IDX
GPIO_SD7_OUT_IDX
GPIO_SDIO_INT
GPIO_SDIO_INT_H
GPIO_SDIO_INT_H_S
GPIO_SDIO_INT_H_V
GPIO_SDIO_INT_S
GPIO_SDIO_INT_V
GPIO_SDIO_SEL
GPIO_SDIO_SELECT_REG
GPIO_SDIO_SEL_S
GPIO_SDIO_SEL_V
GPIO_SIG0_IN_SEL_V
GPIO_SIG0_IN_SEL_S
GPIO_SIG1_IN_SEL_V
GPIO_SIG1_IN_SEL_S
GPIO_SIG2_IN_SEL_V
GPIO_SIG2_IN_SEL_S
GPIO_SIG3_IN_SEL_V
GPIO_SIG3_IN_SEL_S
GPIO_SIG4_IN_SEL_V
GPIO_SIG4_IN_SEL_S
GPIO_SIG5_IN_SEL_V
GPIO_SIG5_IN_SEL_S
GPIO_SIG6_IN_SEL_V
GPIO_SIG6_IN_SEL_S
GPIO_SIG7_IN_SEL_V
GPIO_SIG7_IN_SEL_S
GPIO_SIG8_IN_SEL_V
GPIO_SIG8_IN_SEL_S
GPIO_SIG9_IN_SEL_V
GPIO_SIG9_IN_SEL_S
GPIO_SIG10_IN_SEL_V
GPIO_SIG10_IN_SEL_S
GPIO_SIG11_IN_SEL_V
GPIO_SIG11_IN_SEL_S
GPIO_SIG12_IN_SEL_V
GPIO_SIG12_IN_SEL_S
GPIO_SIG13_IN_SEL_V
GPIO_SIG13_IN_SEL_S
GPIO_SIG14_IN_SEL_V
GPIO_SIG14_IN_SEL_S
GPIO_SIG15_IN_SEL_V
GPIO_SIG15_IN_SEL_S
GPIO_SIG16_IN_SEL_V
GPIO_SIG16_IN_SEL_S
GPIO_SIG17_IN_SEL_V
GPIO_SIG17_IN_SEL_S
GPIO_SIG18_IN_SEL_V
GPIO_SIG18_IN_SEL_S
GPIO_SIG19_IN_SEL_V
GPIO_SIG19_IN_SEL_S
GPIO_SIG20_IN_SEL_V
GPIO_SIG20_IN_SEL_S
GPIO_SIG21_IN_SEL_V
GPIO_SIG21_IN_SEL_S
GPIO_SIG22_IN_SEL_V
GPIO_SIG22_IN_SEL_S
GPIO_SIG23_IN_SEL_V
GPIO_SIG23_IN_SEL_S
GPIO_SIG24_IN_SEL_V
GPIO_SIG24_IN_SEL_S
GPIO_SIG25_IN_SEL_V
GPIO_SIG25_IN_SEL_S
GPIO_SIG26_IN_SEL_V
GPIO_SIG26_IN_SEL_S
GPIO_SIG27_IN_SEL_V
GPIO_SIG27_IN_SEL_S
GPIO_SIG28_IN_SEL_V
GPIO_SIG28_IN_SEL_S
GPIO_SIG29_IN_SEL_V
GPIO_SIG29_IN_SEL_S
GPIO_SIG30_IN_SEL_V
GPIO_SIG30_IN_SEL_S
GPIO_SIG31_IN_SEL_V
GPIO_SIG31_IN_SEL_S
GPIO_SIG32_IN_SEL_V
GPIO_SIG32_IN_SEL_S
GPIO_SIG33_IN_SEL_V
GPIO_SIG33_IN_SEL_S
GPIO_SIG34_IN_SEL_V
GPIO_SIG34_IN_SEL_S
GPIO_SIG35_IN_SEL_V
GPIO_SIG35_IN_SEL_S
GPIO_SIG36_IN_SEL_V
GPIO_SIG36_IN_SEL_S
GPIO_SIG37_IN_SEL_V
GPIO_SIG37_IN_SEL_S
GPIO_SIG38_IN_SEL_V
GPIO_SIG38_IN_SEL_S
GPIO_SIG39_IN_SEL_V
GPIO_SIG39_IN_SEL_S
GPIO_SIG40_IN_SEL_V
GPIO_SIG40_IN_SEL_S
GPIO_SIG41_IN_SEL_V
GPIO_SIG41_IN_SEL_S
GPIO_SIG42_IN_SEL_V
GPIO_SIG42_IN_SEL_S
GPIO_SIG43_IN_SEL_V
GPIO_SIG43_IN_SEL_S
GPIO_SIG44_IN_SEL_V
GPIO_SIG44_IN_SEL_S
GPIO_SIG45_IN_SEL_V
GPIO_SIG45_IN_SEL_S
GPIO_SIG46_IN_SEL_V
GPIO_SIG46_IN_SEL_S
GPIO_SIG47_IN_SEL_V
GPIO_SIG47_IN_SEL_S
GPIO_SIG48_IN_SEL_V
GPIO_SIG48_IN_SEL_S
GPIO_SIG49_IN_SEL_V
GPIO_SIG49_IN_SEL_S
GPIO_SIG50_IN_SEL_V
GPIO_SIG50_IN_SEL_S
GPIO_SIG51_IN_SEL_V
GPIO_SIG51_IN_SEL_S
GPIO_SIG52_IN_SEL_V
GPIO_SIG52_IN_SEL_S
GPIO_SIG53_IN_SEL_V
GPIO_SIG53_IN_SEL_S
GPIO_SIG54_IN_SEL_V
GPIO_SIG54_IN_SEL_S
GPIO_SIG55_IN_SEL_V
GPIO_SIG55_IN_SEL_S
GPIO_SIG56_IN_SEL_V
GPIO_SIG56_IN_SEL_S
GPIO_SIG57_IN_SEL_V
GPIO_SIG57_IN_SEL_S
GPIO_SIG58_IN_SEL_V
GPIO_SIG58_IN_SEL_S
GPIO_SIG59_IN_SEL_V
GPIO_SIG59_IN_SEL_S
GPIO_SIG60_IN_SEL_V
GPIO_SIG60_IN_SEL_S
GPIO_SIG61_IN_SEL_V
GPIO_SIG61_IN_SEL_S
GPIO_SIG62_IN_SEL_V
GPIO_SIG62_IN_SEL_S
GPIO_SIG63_IN_SEL_V
GPIO_SIG63_IN_SEL_S
GPIO_SIG64_IN_SEL_V
GPIO_SIG64_IN_SEL_S
GPIO_SIG65_IN_SEL_V
GPIO_SIG65_IN_SEL_S
GPIO_SIG66_IN_SEL_V
GPIO_SIG66_IN_SEL_S
GPIO_SIG67_IN_SEL_V
GPIO_SIG67_IN_SEL_S
GPIO_SIG68_IN_SEL_V
GPIO_SIG68_IN_SEL_S
GPIO_SIG69_IN_SEL_V
GPIO_SIG69_IN_SEL_S
GPIO_SIG70_IN_SEL_V
GPIO_SIG70_IN_SEL_S
GPIO_SIG71_IN_SEL_V
GPIO_SIG71_IN_SEL_S
GPIO_SIG72_IN_SEL_V
GPIO_SIG72_IN_SEL_S
GPIO_SIG73_IN_SEL_V
GPIO_SIG73_IN_SEL_S
GPIO_SIG74_IN_SEL_V
GPIO_SIG74_IN_SEL_S
GPIO_SIG75_IN_SEL_V
GPIO_SIG75_IN_SEL_S
GPIO_SIG76_IN_SEL_V
GPIO_SIG76_IN_SEL_S
GPIO_SIG77_IN_SEL_V
GPIO_SIG77_IN_SEL_S
GPIO_SIG78_IN_SEL_V
GPIO_SIG78_IN_SEL_S
GPIO_SIG79_IN_SEL_V
GPIO_SIG79_IN_SEL_S
GPIO_SIG80_IN_SEL_V
GPIO_SIG80_IN_SEL_S
GPIO_SIG81_IN_SEL_V
GPIO_SIG81_IN_SEL_S
GPIO_SIG82_IN_SEL_V
GPIO_SIG82_IN_SEL_S
GPIO_SIG83_IN_SEL_V
GPIO_SIG83_IN_SEL_S
GPIO_SIG84_IN_SEL_V
GPIO_SIG84_IN_SEL_S
GPIO_SIG85_IN_SEL_V
GPIO_SIG85_IN_SEL_S
GPIO_SIG86_IN_SEL_V
GPIO_SIG86_IN_SEL_S
GPIO_SIG87_IN_SEL_V
GPIO_SIG87_IN_SEL_S
GPIO_SIG88_IN_SEL_V
GPIO_SIG88_IN_SEL_S
GPIO_SIG89_IN_SEL_V
GPIO_SIG89_IN_SEL_S
GPIO_SIG90_IN_SEL_V
GPIO_SIG90_IN_SEL_S
GPIO_SIG91_IN_SEL_V
GPIO_SIG91_IN_SEL_S
GPIO_SIG92_IN_SEL_V
GPIO_SIG92_IN_SEL_S
GPIO_SIG93_IN_SEL_V
GPIO_SIG93_IN_SEL_S
GPIO_SIG94_IN_SEL_V
GPIO_SIG94_IN_SEL_S
GPIO_SIG95_IN_SEL_V
GPIO_SIG95_IN_SEL_S
GPIO_SIG96_IN_SEL_V
GPIO_SIG96_IN_SEL_S
GPIO_SIG97_IN_SEL_V
GPIO_SIG97_IN_SEL_S
GPIO_SIG98_IN_SEL_V
GPIO_SIG98_IN_SEL_S
GPIO_SIG99_IN_SEL_V
GPIO_SIG99_IN_SEL_S
GPIO_SIG100_IN_SEL_V
GPIO_SIG100_IN_SEL_S
GPIO_SIG101_IN_SEL_V
GPIO_SIG101_IN_SEL_S
GPIO_SIG102_IN_SEL_V
GPIO_SIG102_IN_SEL_S
GPIO_SIG103_IN_SEL_V
GPIO_SIG103_IN_SEL_S
GPIO_SIG104_IN_SEL_V
GPIO_SIG104_IN_SEL_S
GPIO_SIG105_IN_SEL_V
GPIO_SIG105_IN_SEL_S
GPIO_SIG106_IN_SEL_V
GPIO_SIG106_IN_SEL_S
GPIO_SIG107_IN_SEL_V
GPIO_SIG107_IN_SEL_S
GPIO_SIG108_IN_SEL_V
GPIO_SIG108_IN_SEL_S
GPIO_SIG109_IN_SEL_V
GPIO_SIG109_IN_SEL_S
GPIO_SIG110_IN_SEL_V
GPIO_SIG110_IN_SEL_S
GPIO_SIG111_IN_SEL_V
GPIO_SIG111_IN_SEL_S
GPIO_SIG112_IN_SEL_V
GPIO_SIG112_IN_SEL_S
GPIO_SIG113_IN_SEL_V
GPIO_SIG113_IN_SEL_S
GPIO_SIG114_IN_SEL_V
GPIO_SIG114_IN_SEL_S
GPIO_SIG115_IN_SEL_V
GPIO_SIG115_IN_SEL_S
GPIO_SIG116_IN_SEL_V
GPIO_SIG116_IN_SEL_S
GPIO_SIG117_IN_SEL_V
GPIO_SIG117_IN_SEL_S
GPIO_SIG118_IN_SEL_V
GPIO_SIG118_IN_SEL_S
GPIO_SIG119_IN_SEL_V
GPIO_SIG119_IN_SEL_S
GPIO_SIG120_IN_SEL_V
GPIO_SIG120_IN_SEL_S
GPIO_SIG121_IN_SEL_V
GPIO_SIG121_IN_SEL_S
GPIO_SIG122_IN_SEL_V
GPIO_SIG122_IN_SEL_S
GPIO_SIG123_IN_SEL_V
GPIO_SIG123_IN_SEL_S
GPIO_SIG124_IN_SEL_V
GPIO_SIG124_IN_SEL_S
GPIO_SIG125_IN_SEL_V
GPIO_SIG125_IN_SEL_S
GPIO_SIG126_IN_SEL_V
GPIO_SIG126_IN_SEL_S
GPIO_SIG127_IN_SEL_V
GPIO_SIG127_IN_SEL_S
GPIO_SIG128_IN_SEL_V
GPIO_SIG128_IN_SEL_S
GPIO_SIG129_IN_SEL_V
GPIO_SIG129_IN_SEL_S
GPIO_SIG130_IN_SEL_V
GPIO_SIG130_IN_SEL_S
GPIO_SIG131_IN_SEL_V
GPIO_SIG131_IN_SEL_S
GPIO_SIG132_IN_SEL_V
GPIO_SIG132_IN_SEL_S
GPIO_SIG133_IN_SEL_V
GPIO_SIG133_IN_SEL_S
GPIO_SIG134_IN_SEL_V
GPIO_SIG134_IN_SEL_S
GPIO_SIG135_IN_SEL_V
GPIO_SIG135_IN_SEL_S
GPIO_SIG136_IN_SEL_V
GPIO_SIG136_IN_SEL_S
GPIO_SIG137_IN_SEL_V
GPIO_SIG137_IN_SEL_S
GPIO_SIG138_IN_SEL_V
GPIO_SIG138_IN_SEL_S
GPIO_SIG139_IN_SEL_V
GPIO_SIG139_IN_SEL_S
GPIO_SIG140_IN_SEL_V
GPIO_SIG140_IN_SEL_S
GPIO_SIG141_IN_SEL_V
GPIO_SIG141_IN_SEL_S
GPIO_SIG142_IN_SEL_V
GPIO_SIG142_IN_SEL_S
GPIO_SIG143_IN_SEL_V
GPIO_SIG143_IN_SEL_S
GPIO_SIG144_IN_SEL_V
GPIO_SIG144_IN_SEL_S
GPIO_SIG145_IN_SEL_V
GPIO_SIG145_IN_SEL_S
GPIO_SIG146_IN_SEL_V
GPIO_SIG146_IN_SEL_S
GPIO_SIG147_IN_SEL_V
GPIO_SIG147_IN_SEL_S
GPIO_SIG148_IN_SEL_V
GPIO_SIG148_IN_SEL_S
GPIO_SIG149_IN_SEL_V
GPIO_SIG149_IN_SEL_S
GPIO_SIG150_IN_SEL_V
GPIO_SIG150_IN_SEL_S
GPIO_SIG151_IN_SEL_V
GPIO_SIG151_IN_SEL_S
GPIO_SIG152_IN_SEL_V
GPIO_SIG152_IN_SEL_S
GPIO_SIG153_IN_SEL_V
GPIO_SIG153_IN_SEL_S
GPIO_SIG154_IN_SEL_V
GPIO_SIG154_IN_SEL_S
GPIO_SIG155_IN_SEL_V
GPIO_SIG155_IN_SEL_S
GPIO_SIG156_IN_SEL_V
GPIO_SIG156_IN_SEL_S
GPIO_SIG157_IN_SEL_V
GPIO_SIG157_IN_SEL_S
GPIO_SIG158_IN_SEL_V
GPIO_SIG158_IN_SEL_S
GPIO_SIG159_IN_SEL_V
GPIO_SIG159_IN_SEL_S
GPIO_SIG160_IN_SEL_V
GPIO_SIG160_IN_SEL_S
GPIO_SIG161_IN_SEL_V
GPIO_SIG161_IN_SEL_S
GPIO_SIG162_IN_SEL_V
GPIO_SIG162_IN_SEL_S
GPIO_SIG163_IN_SEL_V
GPIO_SIG163_IN_SEL_S
GPIO_SIG164_IN_SEL_V
GPIO_SIG164_IN_SEL_S
GPIO_SIG165_IN_SEL_V
GPIO_SIG165_IN_SEL_S
GPIO_SIG166_IN_SEL_V
GPIO_SIG166_IN_SEL_S
GPIO_SIG167_IN_SEL_V
GPIO_SIG167_IN_SEL_S
GPIO_SIG168_IN_SEL_V
GPIO_SIG168_IN_SEL_S
GPIO_SIG169_IN_SEL_V
GPIO_SIG169_IN_SEL_S
GPIO_SIG170_IN_SEL_V
GPIO_SIG170_IN_SEL_S
GPIO_SIG171_IN_SEL_V
GPIO_SIG171_IN_SEL_S
GPIO_SIG172_IN_SEL_V
GPIO_SIG172_IN_SEL_S
GPIO_SIG173_IN_SEL_V
GPIO_SIG173_IN_SEL_S
GPIO_SIG174_IN_SEL_V
GPIO_SIG174_IN_SEL_S
GPIO_SIG175_IN_SEL_V
GPIO_SIG175_IN_SEL_S
GPIO_SIG176_IN_SEL_V
GPIO_SIG176_IN_SEL_S
GPIO_SIG177_IN_SEL_V
GPIO_SIG177_IN_SEL_S
GPIO_SIG178_IN_SEL_V
GPIO_SIG178_IN_SEL_S
GPIO_SIG179_IN_SEL_V
GPIO_SIG179_IN_SEL_S
GPIO_SIG180_IN_SEL_V
GPIO_SIG180_IN_SEL_S
GPIO_SIG181_IN_SEL_V
GPIO_SIG181_IN_SEL_S
GPIO_SIG182_IN_SEL_V
GPIO_SIG182_IN_SEL_S
GPIO_SIG183_IN_SEL_V
GPIO_SIG183_IN_SEL_S
GPIO_SIG184_IN_SEL_V
GPIO_SIG184_IN_SEL_S
GPIO_SIG185_IN_SEL_V
GPIO_SIG185_IN_SEL_S
GPIO_SIG186_IN_SEL_V
GPIO_SIG186_IN_SEL_S
GPIO_SIG187_IN_SEL_V
GPIO_SIG187_IN_SEL_S
GPIO_SIG188_IN_SEL_V
GPIO_SIG188_IN_SEL_S
GPIO_SIG189_IN_SEL_V
GPIO_SIG189_IN_SEL_S
GPIO_SIG190_IN_SEL_V
GPIO_SIG190_IN_SEL_S
GPIO_SIG191_IN_SEL_V
GPIO_SIG191_IN_SEL_S
GPIO_SIG192_IN_SEL_V
GPIO_SIG192_IN_SEL_S
GPIO_SIG193_IN_SEL_V
GPIO_SIG193_IN_SEL_S
GPIO_SIG194_IN_SEL_V
GPIO_SIG194_IN_SEL_S
GPIO_SIG195_IN_SEL_V
GPIO_SIG195_IN_SEL_S
GPIO_SIG196_IN_SEL_V
GPIO_SIG196_IN_SEL_S
GPIO_SIG197_IN_SEL_V
GPIO_SIG197_IN_SEL_S
GPIO_SIG198_IN_SEL_V
GPIO_SIG198_IN_SEL_S
GPIO_SIG199_IN_SEL_V
GPIO_SIG199_IN_SEL_S
GPIO_SIG200_IN_SEL_V
GPIO_SIG200_IN_SEL_S
GPIO_SIG201_IN_SEL_V
GPIO_SIG201_IN_SEL_S
GPIO_SIG202_IN_SEL_V
GPIO_SIG202_IN_SEL_S
GPIO_SIG203_IN_SEL_V
GPIO_SIG203_IN_SEL_S
GPIO_SIG204_IN_SEL_V
GPIO_SIG204_IN_SEL_S
GPIO_SIG205_IN_SEL_V
GPIO_SIG205_IN_SEL_S
GPIO_SIG206_IN_SEL_V
GPIO_SIG206_IN_SEL_S
GPIO_SIG207_IN_SEL_V
GPIO_SIG207_IN_SEL_S
GPIO_SIG208_IN_SEL_V
GPIO_SIG208_IN_SEL_S
GPIO_SIG209_IN_SEL_V
GPIO_SIG209_IN_SEL_S
GPIO_SIG210_IN_SEL_V
GPIO_SIG210_IN_SEL_S
GPIO_SIG211_IN_SEL_V
GPIO_SIG211_IN_SEL_S
GPIO_SIG212_IN_SEL_V
GPIO_SIG212_IN_SEL_S
GPIO_SIG213_IN_SEL_V
GPIO_SIG213_IN_SEL_S
GPIO_SIG214_IN_SEL_V
GPIO_SIG214_IN_SEL_S
GPIO_SIG215_IN_SEL_V
GPIO_SIG215_IN_SEL_S
GPIO_SIG216_IN_SEL_V
GPIO_SIG216_IN_SEL_S
GPIO_SIG217_IN_SEL_V
GPIO_SIG217_IN_SEL_S
GPIO_SIG218_IN_SEL_V
GPIO_SIG218_IN_SEL_S
GPIO_SIG219_IN_SEL_V
GPIO_SIG219_IN_SEL_S
GPIO_SIG220_IN_SEL_V
GPIO_SIG220_IN_SEL_S
GPIO_SIG221_IN_SEL_V
GPIO_SIG221_IN_SEL_S
GPIO_SIG222_IN_SEL_V
GPIO_SIG222_IN_SEL_S
GPIO_SIG223_IN_SEL_V
GPIO_SIG223_IN_SEL_S
GPIO_SIG224_IN_SEL_V
GPIO_SIG224_IN_SEL_S
GPIO_SIG225_IN_SEL_V
GPIO_SIG225_IN_SEL_S
GPIO_SIG226_IN_SEL_V
GPIO_SIG226_IN_SEL_S
GPIO_SIG227_IN_SEL_V
GPIO_SIG227_IN_SEL_S
GPIO_SIG228_IN_SEL_V
GPIO_SIG228_IN_SEL_S
GPIO_SIG229_IN_SEL_V
GPIO_SIG229_IN_SEL_S
GPIO_SIG230_IN_SEL_V
GPIO_SIG230_IN_SEL_S
GPIO_SIG231_IN_SEL_V
GPIO_SIG231_IN_SEL_S
GPIO_SIG232_IN_SEL_V
GPIO_SIG232_IN_SEL_S
GPIO_SIG233_IN_SEL_V
GPIO_SIG233_IN_SEL_S
GPIO_SIG234_IN_SEL_V
GPIO_SIG234_IN_SEL_S
GPIO_SIG235_IN_SEL_V
GPIO_SIG235_IN_SEL_S
GPIO_SIG236_IN_SEL_V
GPIO_SIG236_IN_SEL_S
GPIO_SIG237_IN_SEL_V
GPIO_SIG237_IN_SEL_S
GPIO_SIG238_IN_SEL_V
GPIO_SIG238_IN_SEL_S
GPIO_SIG239_IN_SEL_V
GPIO_SIG239_IN_SEL_S
GPIO_SIG240_IN_SEL_V
GPIO_SIG240_IN_SEL_S
GPIO_SIG241_IN_SEL_V
GPIO_SIG241_IN_SEL_S
GPIO_SIG242_IN_SEL_V
GPIO_SIG242_IN_SEL_S
GPIO_SIG243_IN_SEL_V
GPIO_SIG243_IN_SEL_S
GPIO_SIG244_IN_SEL_V
GPIO_SIG244_IN_SEL_S
GPIO_SIG245_IN_SEL_V
GPIO_SIG245_IN_SEL_S
GPIO_SIG246_IN_SEL_V
GPIO_SIG246_IN_SEL_S
GPIO_SIG247_IN_SEL_V
GPIO_SIG247_IN_SEL_S
GPIO_SIG248_IN_SEL_V
GPIO_SIG248_IN_SEL_S
GPIO_SIG249_IN_SEL_V
GPIO_SIG249_IN_SEL_S
GPIO_SIG250_IN_SEL_V
GPIO_SIG250_IN_SEL_S
GPIO_SIG251_IN_SEL_V
GPIO_SIG251_IN_SEL_S
GPIO_SIG252_IN_SEL_V
GPIO_SIG252_IN_SEL_S
GPIO_SIG253_IN_SEL_V
GPIO_SIG253_IN_SEL_S
GPIO_SIG254_IN_SEL_V
GPIO_SIG254_IN_SEL_S
GPIO_SIG255_IN_SEL_V
GPIO_SIG255_IN_SEL_S
GPIO_STATUS1_REG
GPIO_STATUS1_INT
GPIO_STATUS1_INT_V
GPIO_STATUS1_INT_S
GPIO_STATUS1_INT_W1TS
GPIO_STATUS1_INT_W1TS_V
GPIO_STATUS1_INT_W1TS_S
GPIO_STATUS1_INT_W1TC
GPIO_STATUS1_INT_W1TC_V
GPIO_STATUS1_INT_W1TC_S
GPIO_STATUS1_W1TS_REG
GPIO_STATUS1_W1TC_REG
GPIO_STATUS_INT
GPIO_STATUS_INT_S
GPIO_STATUS_INT_V
GPIO_STATUS_INT_W1TS
GPIO_STATUS_INT_W1TS_V
GPIO_STATUS_INT_W1TS_S
GPIO_STATUS_INT_W1TC
GPIO_STATUS_INT_W1TC_V
GPIO_STATUS_INT_W1TC_S
GPIO_STATUS_REG
GPIO_STATUS_W1TS_REG
GPIO_STATUS_W1TC_REG
GPIO_STRAPPING
GPIO_STRAPPING_S
GPIO_STRAPPING_V
GPIO_STRAP_REG
GPIO_SUPPORTS_FORCE_HOLD
GPIO_SUPPORTS_RTC_INDEPENDENT
GPIO_WLAN_ACTIVE_IDX
GPIO_cali_conf_REG
GPIO_cali_data_REG
HAVE_INITFINI_ARRAY
HOST_CARD_DETECT_N_1_IDX
HOST_CARD_DETECT_N_2_IDX
HOST_CARD_INT_N_1_IDX
HOST_CARD_INT_N_2_IDX
HOST_CARD_WRITE_PRT_1_IDX
HOST_CARD_WRITE_PRT_2_IDX
HOST_CCMD_OD_PULLUP_EN_N_IDX
HOST_NOT_FOUND
HOST_RST_N_1_IDX
HOST_RST_N_2_IDX
HSPICLK_IN_IDX
HSPICLK_OUT_IDX
HSPICS0_IN_IDX
HSPICS0_OUT_IDX
HSPICS1_IN_IDX
HSPICS1_OUT_IDX
HSPICS2_IN_IDX
HSPICS2_OUT_IDX
HSPID4_IN_IDX
HSPID4_OUT_IDX
HSPID5_IN_IDX
HSPID5_OUT_IDX
HSPID6_IN_IDX
HSPID6_OUT_IDX
HSPID7_IN_IDX
HSPID7_OUT_IDX
HSPID_IN_IDX
HSPID_OUT_IDX
HSPIHD_IN_IDX
HSPIHD_OUT_IDX
HSPIQ_IN_IDX
HSPIQ_OUT_IDX
HSPIWP_IN_IDX
HSPIWP_OUT_IDX
I2CM_SCL_O_IDX
I2CM_SDA_I_IDX
I2CM_SDA_O_IDX
I2C_INTR_MASK
I2C_SUPPORT_HW_FSM_RST
I2C_SUPPORT_HW_CLR_BUS
I2C_APB_CLK_FREQ
I2C_NUM_MAX
I2S_SIG_LOOPBACK_V
I2S_SIG_LOOPBACK_S
I2S_RX_MSB_RIGHT_V
I2S_RX_MSB_RIGHT_S
I2S_TX_MSB_RIGHT_V
I2S_TX_MSB_RIGHT_S
I2S_RX_MONO_V
I2S_RX_MONO_S
I2S_TX_MONO_V
I2S_TX_MONO_S
I2S_RX_SHORT_SYNC_V
I2S_RX_SHORT_SYNC_S
I2S_TX_SHORT_SYNC_V
I2S_TX_SHORT_SYNC_S
I2S_RX_MSB_SHIFT_V
I2S_RX_MSB_SHIFT_S
I2S_TX_MSB_SHIFT_V
I2S_TX_MSB_SHIFT_S
I2S_RX_RIGHT_FIRST_V
I2S_RX_RIGHT_FIRST_S
I2S_TX_RIGHT_FIRST_V
I2S_TX_RIGHT_FIRST_S
I2S_RX_SLAVE_MOD_V
I2S_RX_SLAVE_MOD_S
I2S_TX_SLAVE_MOD_V
I2S_TX_SLAVE_MOD_S
I2S_RX_START_V
I2S_RX_START_S
I2S_TX_START_V
I2S_TX_START_S
I2S_RX_FIFO_RESET_V
I2S_RX_FIFO_RESET_S
I2S_TX_FIFO_RESET_V
I2S_TX_FIFO_RESET_S
I2S_RX_RESET_V
I2S_RX_RESET_S
I2S_TX_RESET_V
I2S_TX_RESET_S
I2S_OUT_TOTAL_EOF_INT_RAW_V
I2S_OUT_TOTAL_EOF_INT_RAW_S
I2S_IN_DSCR_EMPTY_INT_RAW_V
I2S_IN_DSCR_EMPTY_INT_RAW_S
I2S_OUT_DSCR_ERR_INT_RAW_V
I2S_OUT_DSCR_ERR_INT_RAW_S
I2S_IN_DSCR_ERR_INT_RAW_V
I2S_IN_DSCR_ERR_INT_RAW_S
I2S_OUT_EOF_INT_RAW_V
I2S_OUT_EOF_INT_RAW_S
I2S_OUT_DONE_INT_RAW_V
I2S_OUT_DONE_INT_RAW_S
I2S_IN_ERR_EOF_INT_RAW_V
I2S_IN_ERR_EOF_INT_RAW_S
I2S_IN_SUC_EOF_INT_RAW_V
I2S_IN_SUC_EOF_INT_RAW_S
I2S_IN_DONE_INT_RAW_V
I2S_IN_DONE_INT_RAW_S
I2S_TX_HUNG_INT_RAW_V
I2S_TX_HUNG_INT_RAW_S
I2S_RX_HUNG_INT_RAW_V
I2S_RX_HUNG_INT_RAW_S
I2S_TX_REMPTY_INT_RAW_V
I2S_TX_REMPTY_INT_RAW_S
I2S_TX_WFULL_INT_RAW_V
I2S_TX_WFULL_INT_RAW_S
I2S_RX_REMPTY_INT_RAW_V
I2S_RX_REMPTY_INT_RAW_S
I2S_RX_WFULL_INT_RAW_V
I2S_RX_WFULL_INT_RAW_S
I2S_TX_PUT_DATA_INT_RAW_V
I2S_TX_PUT_DATA_INT_RAW_S
I2S_RX_TAKE_DATA_INT_RAW_V
I2S_RX_TAKE_DATA_INT_RAW_S
I2S_OUT_TOTAL_EOF_INT_ST_V
I2S_OUT_TOTAL_EOF_INT_ST_S
I2S_IN_DSCR_EMPTY_INT_ST_V
I2S_IN_DSCR_EMPTY_INT_ST_S
I2S_OUT_DSCR_ERR_INT_ST_V
I2S_OUT_DSCR_ERR_INT_ST_S
I2S_IN_DSCR_ERR_INT_ST_V
I2S_IN_DSCR_ERR_INT_ST_S
I2S_OUT_EOF_INT_ST_V
I2S_OUT_EOF_INT_ST_S
I2S_OUT_DONE_INT_ST_V
I2S_OUT_DONE_INT_ST_S
I2S_IN_ERR_EOF_INT_ST_V
I2S_IN_ERR_EOF_INT_ST_S
I2S_IN_SUC_EOF_INT_ST_V
I2S_IN_SUC_EOF_INT_ST_S
I2S_IN_DONE_INT_ST_V
I2S_IN_DONE_INT_ST_S
I2S_TX_HUNG_INT_ST_V
I2S_TX_HUNG_INT_ST_S
I2S_RX_HUNG_INT_ST_V
I2S_RX_HUNG_INT_ST_S
I2S_TX_REMPTY_INT_ST_V
I2S_TX_REMPTY_INT_ST_S
I2S_TX_WFULL_INT_ST_V
I2S_TX_WFULL_INT_ST_S
I2S_RX_REMPTY_INT_ST_V
I2S_RX_REMPTY_INT_ST_S
I2S_RX_WFULL_INT_ST_V
I2S_RX_WFULL_INT_ST_S
I2S_TX_PUT_DATA_INT_ST_V
I2S_TX_PUT_DATA_INT_ST_S
I2S_RX_TAKE_DATA_INT_ST_V
I2S_RX_TAKE_DATA_INT_ST_S
I2S_OUT_TOTAL_EOF_INT_ENA_V
I2S_OUT_TOTAL_EOF_INT_ENA_S
I2S_IN_DSCR_EMPTY_INT_ENA_V
I2S_IN_DSCR_EMPTY_INT_ENA_S
I2S_OUT_DSCR_ERR_INT_ENA_V
I2S_OUT_DSCR_ERR_INT_ENA_S
I2S_IN_DSCR_ERR_INT_ENA_V
I2S_IN_DSCR_ERR_INT_ENA_S
I2S_OUT_EOF_INT_ENA_V
I2S_OUT_EOF_INT_ENA_S
I2S_OUT_DONE_INT_ENA_V
I2S_OUT_DONE_INT_ENA_S
I2S_IN_ERR_EOF_INT_ENA_V
I2S_IN_ERR_EOF_INT_ENA_S
I2S_IN_SUC_EOF_INT_ENA_V
I2S_IN_SUC_EOF_INT_ENA_S
I2S_IN_DONE_INT_ENA_V
I2S_IN_DONE_INT_ENA_S
I2S_TX_HUNG_INT_ENA_V
I2S_TX_HUNG_INT_ENA_S
I2S_RX_HUNG_INT_ENA_V
I2S_RX_HUNG_INT_ENA_S
I2S_TX_REMPTY_INT_ENA_V
I2S_TX_REMPTY_INT_ENA_S
I2S_TX_WFULL_INT_ENA_V
I2S_TX_WFULL_INT_ENA_S
I2S_RX_REMPTY_INT_ENA_V
I2S_RX_REMPTY_INT_ENA_S
I2S_RX_WFULL_INT_ENA_V
I2S_RX_WFULL_INT_ENA_S
I2S_TX_PUT_DATA_INT_ENA_V
I2S_TX_PUT_DATA_INT_ENA_S
I2S_RX_TAKE_DATA_INT_ENA_V
I2S_RX_TAKE_DATA_INT_ENA_S
I2S_OUT_TOTAL_EOF_INT_CLR_V
I2S_OUT_TOTAL_EOF_INT_CLR_S
I2S_IN_DSCR_EMPTY_INT_CLR_V
I2S_IN_DSCR_EMPTY_INT_CLR_S
I2S_OUT_DSCR_ERR_INT_CLR_V
I2S_OUT_DSCR_ERR_INT_CLR_S
I2S_IN_DSCR_ERR_INT_CLR_V
I2S_IN_DSCR_ERR_INT_CLR_S
I2S_OUT_EOF_INT_CLR_V
I2S_OUT_EOF_INT_CLR_S
I2S_OUT_DONE_INT_CLR_V
I2S_OUT_DONE_INT_CLR_S
I2S_IN_ERR_EOF_INT_CLR_V
I2S_IN_ERR_EOF_INT_CLR_S
I2S_IN_SUC_EOF_INT_CLR_V
I2S_IN_SUC_EOF_INT_CLR_S
I2S_IN_DONE_INT_CLR_V
I2S_IN_DONE_INT_CLR_S
I2S_TX_HUNG_INT_CLR_V
I2S_TX_HUNG_INT_CLR_S
I2S_RX_HUNG_INT_CLR_V
I2S_RX_HUNG_INT_CLR_S
I2S_TX_REMPTY_INT_CLR_V
I2S_TX_REMPTY_INT_CLR_S
I2S_TX_WFULL_INT_CLR_V
I2S_TX_WFULL_INT_CLR_S
I2S_RX_REMPTY_INT_CLR_V
I2S_RX_REMPTY_INT_CLR_S
I2S_RX_WFULL_INT_CLR_V
I2S_RX_WFULL_INT_CLR_S
I2S_PUT_DATA_INT_CLR_V
I2S_PUT_DATA_INT_CLR_S
I2S_TAKE_DATA_INT_CLR_V
I2S_TAKE_DATA_INT_CLR_S
I2S_TX_BCK_IN_INV_V
I2S_TX_BCK_IN_INV_S
I2S_DATA_ENABLE_DELAY
I2S_DATA_ENABLE_DELAY_V
I2S_DATA_ENABLE_DELAY_S
I2S_RX_DSYNC_SW_V
I2S_RX_DSYNC_SW_S
I2S_TX_DSYNC_SW_V
I2S_TX_DSYNC_SW_S
I2S_RX_BCK_OUT_DELAY
I2S_RX_BCK_OUT_DELAY_V
I2S_RX_BCK_OUT_DELAY_S
I2S_RX_WS_OUT_DELAY
I2S_RX_WS_OUT_DELAY_V
I2S_RX_WS_OUT_DELAY_S
I2S_TX_SD_OUT_DELAY
I2S_TX_SD_OUT_DELAY_V
I2S_TX_SD_OUT_DELAY_S
I2S_TX_WS_OUT_DELAY
I2S_TX_WS_OUT_DELAY_V
I2S_TX_WS_OUT_DELAY_S
I2S_TX_BCK_OUT_DELAY
I2S_TX_BCK_OUT_DELAY_V
I2S_TX_BCK_OUT_DELAY_S
I2S_RX_SD_IN_DELAY
I2S_RX_SD_IN_DELAY_V
I2S_RX_SD_IN_DELAY_S
I2S_RX_WS_IN_DELAY
I2S_RX_WS_IN_DELAY_V
I2S_RX_WS_IN_DELAY_S
I2S_RX_BCK_IN_DELAY
I2S_RX_BCK_IN_DELAY_V
I2S_RX_BCK_IN_DELAY_S
I2S_TX_WS_IN_DELAY
I2S_TX_WS_IN_DELAY_V
I2S_TX_WS_IN_DELAY_S
I2S_TX_BCK_IN_DELAY
I2S_TX_BCK_IN_DELAY_V
I2S_TX_BCK_IN_DELAY_S
I2S_RX_FIFO_MOD_FORCE_EN_V
I2S_RX_FIFO_MOD_FORCE_EN_S
I2S_TX_FIFO_MOD_FORCE_EN_V
I2S_TX_FIFO_MOD_FORCE_EN_S
I2S_RX_FIFO_MOD
I2S_RX_FIFO_MOD_V
I2S_RX_FIFO_MOD_S
I2S_TX_FIFO_MOD
I2S_TX_FIFO_MOD_V
I2S_TX_FIFO_MOD_S
I2S_DSCR_EN_V
I2S_DSCR_EN_S
I2S_TX_DATA_NUM
I2S_TX_DATA_NUM_V
I2S_TX_DATA_NUM_S
I2S_RX_DATA_NUM
I2S_RX_DATA_NUM_V
I2S_RX_DATA_NUM_S
I2S_RX_EOF_NUM
I2S_RX_EOF_NUM_V
I2S_RX_EOF_NUM_S
I2S_SIGLE_DATA
I2S_SIGLE_DATA_V
I2S_SIGLE_DATA_S
I2S_RX_CHAN_MOD
I2S_RX_CHAN_MOD_V
I2S_RX_CHAN_MOD_S
I2S_TX_CHAN_MOD
I2S_TX_CHAN_MOD_V
I2S_TX_CHAN_MOD_S
I2S_OUTLINK_PARK_V
I2S_OUTLINK_PARK_S
I2S_OUTLINK_RESTART_V
I2S_OUTLINK_RESTART_S
I2S_OUTLINK_START_V
I2S_OUTLINK_START_S
I2S_OUTLINK_STOP_V
I2S_OUTLINK_STOP_S
I2S_OUTLINK_ADDR
I2S_OUTLINK_ADDR_V
I2S_OUTLINK_ADDR_S
I2S_INLINK_PARK_V
I2S_INLINK_PARK_S
I2S_INLINK_RESTART_V
I2S_INLINK_RESTART_S
I2S_INLINK_START_V
I2S_INLINK_START_S
I2S_INLINK_STOP_V
I2S_INLINK_STOP_S
I2S_INLINK_ADDR
I2S_INLINK_ADDR_V
I2S_INLINK_ADDR_S
I2S_OUT_EOF_DES_ADDR
I2S_OUT_EOF_DES_ADDR_V
I2S_OUT_EOF_DES_ADDR_S
I2S_IN_SUC_EOF_DES_ADDR
I2S_IN_SUC_EOF_DES_ADDR_V
I2S_IN_SUC_EOF_DES_ADDR_S
I2S_OUT_EOF_BFR_DES_ADDR
I2S_OUT_EOF_BFR_DES_ADDR_V
I2S_OUT_EOF_BFR_DES_ADDR_S
I2S_AHB_TESTADDR
I2S_AHB_TESTADDR_V
I2S_AHB_TESTADDR_S
I2S_AHB_TESTMODE
I2S_AHB_TESTMODE_V
I2S_AHB_TESTMODE_S
I2S_INLINK_DSCR
I2S_INLINK_DSCR_V
I2S_INLINK_DSCR_S
I2S_OUTLINK_DSCR
I2S_OUTLINK_DSCR_V
I2S_OUTLINK_DSCR_S
I2S_MEM_TRANS_EN_V
I2S_MEM_TRANS_EN_S
I2S_CHECK_OWNER_V
I2S_CHECK_OWNER_S
I2S_OUT_DATA_BURST_EN_V
I2S_OUT_DATA_BURST_EN_S
I2S_INDSCR_BURST_EN_V
I2S_INDSCR_BURST_EN_S
I2S_OUTDSCR_BURST_EN_V
I2S_OUTDSCR_BURST_EN_S
I2S_OUT_EOF_MODE_V
I2S_OUT_EOF_MODE_S
I2S_OUT_NO_RESTART_CLR_V
I2S_OUT_NO_RESTART_CLR_S
I2S_OUT_AUTO_WRBACK_V
I2S_OUT_AUTO_WRBACK_S
I2S_IN_LOOP_TEST_V
I2S_IN_LOOP_TEST_S
I2S_OUT_LOOP_TEST_V
I2S_OUT_LOOP_TEST_S
I2S_AHBM_RST_V
I2S_AHBM_RST_S
I2S_AHBM_FIFO_RST_V
I2S_AHBM_FIFO_RST_S
I2S_OUT_RST_V
I2S_OUT_RST_S
I2S_IN_RST_V
I2S_IN_RST_S
I2S_OUTFIFO_PUSH_V
I2S_OUTFIFO_PUSH_S
I2S_OUTFIFO_WDATA
I2S_OUTFIFO_WDATA_V
I2S_OUTFIFO_WDATA_S
I2S_INFIFO_POP_V
I2S_INFIFO_POP_S
I2S_INFIFO_RDATA
I2S_INFIFO_RDATA_V
I2S_INFIFO_RDATA_S
I2S_LC_FIFO_TIMEOUT_ENA_V
I2S_LC_FIFO_TIMEOUT_ENA_S
I2S_LC_FIFO_TIMEOUT_SHIFT
I2S_LC_FIFO_TIMEOUT_SHIFT_V
I2S_LC_FIFO_TIMEOUT_SHIFT_S
I2S_LC_FIFO_TIMEOUT
I2S_LC_FIFO_TIMEOUT_V
I2S_LC_FIFO_TIMEOUT_S
I2S_CVSD_Y_MIN
I2S_CVSD_Y_MIN_V
I2S_CVSD_Y_MIN_S
I2S_CVSD_Y_MAX
I2S_CVSD_Y_MAX_V
I2S_CVSD_Y_MAX_S
I2S_CVSD_SIGMA_MIN
I2S_CVSD_SIGMA_MIN_V
I2S_CVSD_SIGMA_MIN_S
I2S_CVSD_SIGMA_MAX
I2S_CVSD_SIGMA_MAX_V
I2S_CVSD_SIGMA_MAX_S
I2S_CVSD_H
I2S_CVSD_H_V
I2S_CVSD_H_S
I2S_CVSD_BETA
I2S_CVSD_BETA_V
I2S_CVSD_BETA_S
I2S_CVSD_J
I2S_CVSD_J_V
I2S_CVSD_J_S
I2S_CVSD_K
I2S_CVSD_K_V
I2S_CVSD_K_S
I2S_N_MIN_ERR
I2S_N_MIN_ERR_V
I2S_N_MIN_ERR_S
I2S_MAX_SLIDE_SAMPLE
I2S_MAX_SLIDE_SAMPLE_V
I2S_MAX_SLIDE_SAMPLE_S
I2S_SHIFT_RATE
I2S_SHIFT_RATE_V
I2S_SHIFT_RATE_S
I2S_N_ERR_SEG
I2S_N_ERR_SEG_V
I2S_N_ERR_SEG_S
I2S_GOOD_PACK_MAX
I2S_GOOD_PACK_MAX_V
I2S_GOOD_PACK_MAX_S
I2S_SLIDE_WIN_LEN
I2S_SLIDE_WIN_LEN_V
I2S_SLIDE_WIN_LEN_S
I2S_BAD_CEF_ATTEN_PARA_SHIFT
I2S_BAD_CEF_ATTEN_PARA_SHIFT_V
I2S_BAD_CEF_ATTEN_PARA_SHIFT_S
I2S_BAD_CEF_ATTEN_PARA
I2S_BAD_CEF_ATTEN_PARA_V
I2S_BAD_CEF_ATTEN_PARA_S
I2S_MIN_PERIOD
I2S_MIN_PERIOD_V
I2S_MIN_PERIOD_S
I2S_CVSD_SEG_MOD
I2S_CVSD_SEG_MOD_V
I2S_CVSD_SEG_MOD_S
I2S_PLC_EN_V
I2S_PLC_EN_S
I2S_CVSD_DEC_RESET_V
I2S_CVSD_DEC_RESET_S
I2S_CVSD_DEC_START_V
I2S_CVSD_DEC_START_S
I2S_ESCO_CVSD_INF_EN_V
I2S_ESCO_CVSD_INF_EN_S
I2S_ESCO_CVSD_DEC_PACK_ERR_V
I2S_ESCO_CVSD_DEC_PACK_ERR_S
I2S_ESCO_CHAN_MOD_V
I2S_ESCO_CHAN_MOD_S
I2S_ESCO_EN_V
I2S_ESCO_EN_S
I2S_CVSD_ENC_RESET_V
I2S_CVSD_ENC_RESET_S
I2S_CVSD_ENC_START_V
I2S_CVSD_ENC_START_S
I2S_TX_ZEROS_RM_EN_V
I2S_TX_ZEROS_RM_EN_S
I2S_TX_STOP_EN_V
I2S_TX_STOP_EN_S
I2S_RX_PCM_BYPASS_V
I2S_RX_PCM_BYPASS_S
I2S_RX_PCM_CONF
I2S_RX_PCM_CONF_V
I2S_RX_PCM_CONF_S
I2S_TX_PCM_BYPASS_V
I2S_TX_PCM_BYPASS_S
I2S_TX_PCM_CONF
I2S_TX_PCM_CONF_V
I2S_TX_PCM_CONF_S
I2S_PLC_MEM_FORCE_PU_V
I2S_PLC_MEM_FORCE_PU_S
I2S_PLC_MEM_FORCE_PD_V
I2S_PLC_MEM_FORCE_PD_S
I2S_FIFO_FORCE_PU_V
I2S_FIFO_FORCE_PU_S
I2S_FIFO_FORCE_PD_V
I2S_FIFO_FORCE_PD_S
I2S_INTER_VALID_EN_V
I2S_INTER_VALID_EN_S
I2S_EXT_ADC_START_EN_V
I2S_EXT_ADC_START_EN_S
I2S_LCD_EN_V
I2S_LCD_EN_S
I2S_DATA_ENABLE_V
I2S_DATA_ENABLE_S
I2S_DATA_ENABLE_TEST_EN_V
I2S_DATA_ENABLE_TEST_EN_S
I2S_CAMERA_EN_V
I2S_CAMERA_EN_S
I2S_CLKA_ENA_V
I2S_CLKA_ENA_S
I2S_CLK_EN_V
I2S_CLK_EN_S
I2S_CLKM_DIV_A
I2S_CLKM_DIV_A_V
I2S_CLKM_DIV_A_S
I2S_CLKM_DIV_B
I2S_CLKM_DIV_B_V
I2S_CLKM_DIV_B_S
I2S_CLKM_DIV_NUM
I2S_CLKM_DIV_NUM_V
I2S_CLKM_DIV_NUM_S
I2S_RX_BITS_MOD
I2S_RX_BITS_MOD_V
I2S_RX_BITS_MOD_S
I2S_TX_BITS_MOD
I2S_TX_BITS_MOD_V
I2S_TX_BITS_MOD_S
I2S_RX_BCK_DIV_NUM
I2S_RX_BCK_DIV_NUM_V
I2S_RX_BCK_DIV_NUM_S
I2S_TX_BCK_DIV_NUM
I2S_TX_BCK_DIV_NUM_V
I2S_TX_BCK_DIV_NUM_S
I2S_TX_PDM_HP_BYPASS_V
I2S_TX_PDM_HP_BYPASS_S
I2S_TX_PDM_SIGMADELTA_IN_SHIFT
I2S_TX_PDM_SIGMADELTA_IN_SHIFT_V
I2S_TX_PDM_SIGMADELTA_IN_SHIFT_S
I2S_TX_PDM_SINC_IN_SHIFT
I2S_TX_PDM_SINC_IN_SHIFT_V
I2S_TX_PDM_SINC_IN_SHIFT_S
I2S_TX_PDM_LP_IN_SHIFT
I2S_TX_PDM_LP_IN_SHIFT_V
I2S_TX_PDM_LP_IN_SHIFT_S
I2S_TX_PDM_HP_IN_SHIFT
I2S_TX_PDM_HP_IN_SHIFT_V
I2S_TX_PDM_HP_IN_SHIFT_S
I2S_TX_PDM_PRESCALE
I2S_TX_PDM_PRESCALE_V
I2S_TX_PDM_PRESCALE_S
I2S_RX_PDM_EN_V
I2S_RX_PDM_EN_S
I2S_TX_PDM_EN_V
I2S_TX_PDM_EN_S
I2S_TX_PDM_FP
I2S_TX_PDM_FP_V
I2S_TX_PDM_FP_S
I2S_TX_PDM_FS
I2S_TX_PDM_FS_V
I2S_TX_PDM_FS_S
I2S_RX_FIFO_RESET_BACK_V
I2S_RX_FIFO_RESET_BACK_S
I2S_TX_FIFO_RESET_BACK_V
I2S_TX_FIFO_RESET_BACK_S
I2S_TX_IDLE_V
I2S_TX_IDLE_S
I2S_AD_BCK_FACTOR
I2S_PDM_BCK_FACTOR
I2S_MAX_BUFFER_SIZE
I2S_BASE_CLK
I2S_INTR_MAX
I2S_PIN_NO_CHANGE
I2CEXT0_SCL_IN_IDX
I2CEXT0_SDA_IN_IDX
I2CEXT0_SCL_OUT_IDX
I2CEXT0_SDA_OUT_IDX
I2CEXT1_SCL_IN_IDX
I2CEXT1_SCL_OUT_IDX
I2CEXT1_SDA_IN_IDX
I2CEXT1_SDA_OUT_IDX
I2C_NUM_0
I2C_NUM_1
I2S0O_WS_IN_IDX
I2S0I_WS_IN_IDX
I2S0O_BCK_IN_IDX
I2S0O_WS_OUT_IDX
I2S0I_BCK_IN_IDX
I2S0I_WS_OUT_IDX
I2S0I_H_SYNC_IDX
I2S0I_V_SYNC_IDX
I2S0O_BCK_OUT_IDX
I2S0I_BCK_OUT_IDX
I2S0I_H_ENABLE_IDX
I2S1O_BCK_IN_IDX
I2S1O_BCK_OUT_IDX
I2S1O_WS_IN_IDX
I2S1O_WS_OUT_IDX
I2S1I_BCK_IN_IDX
I2S1I_BCK_OUT_IDX
I2S1I_WS_IN_IDX
I2S1I_WS_OUT_IDX
I2S1I_H_SYNC_IDX
I2S1I_V_SYNC_IDX
I2S1I_H_ENABLE_IDX
I2S0I_DATA_IN0_IDX
I2S0I_DATA_IN1_IDX
I2S0I_DATA_IN2_IDX
I2S0I_DATA_IN3_IDX
I2S0I_DATA_IN4_IDX
I2S0I_DATA_IN5_IDX
I2S0I_DATA_IN6_IDX
I2S0I_DATA_IN7_IDX
I2S0I_DATA_IN8_IDX
I2S0I_DATA_IN9_IDX
I2S0I_DATA_IN10_IDX
I2S0I_DATA_IN11_IDX
I2S0I_DATA_IN12_IDX
I2S0I_DATA_IN13_IDX
I2S0I_DATA_IN14_IDX
I2S0I_DATA_IN15_IDX
I2S0O_DATA_OUT0_IDX
I2S0O_DATA_OUT1_IDX
I2S0O_DATA_OUT2_IDX
I2S0O_DATA_OUT3_IDX
I2S0O_DATA_OUT4_IDX
I2S0O_DATA_OUT5_IDX
I2S0O_DATA_OUT6_IDX
I2S0O_DATA_OUT7_IDX
I2S0O_DATA_OUT8_IDX
I2S0O_DATA_OUT9_IDX
I2S0O_DATA_OUT10_IDX
I2S0O_DATA_OUT11_IDX
I2S0O_DATA_OUT12_IDX
I2S0O_DATA_OUT13_IDX
I2S0O_DATA_OUT14_IDX
I2S0O_DATA_OUT15_IDX
I2S0O_DATA_OUT16_IDX
I2S0O_DATA_OUT17_IDX
I2S0O_DATA_OUT18_IDX
I2S0O_DATA_OUT19_IDX
I2S0O_DATA_OUT20_IDX
I2S0O_DATA_OUT21_IDX
I2S0O_DATA_OUT22_IDX
I2S0O_DATA_OUT23_IDX
I2S1I_DATA_IN0_IDX
I2S1I_DATA_IN1_IDX
I2S1I_DATA_IN2_IDX
I2S1I_DATA_IN3_IDX
I2S1I_DATA_IN4_IDX
I2S1I_DATA_IN5_IDX
I2S1I_DATA_IN6_IDX
I2S1I_DATA_IN7_IDX
I2S1I_DATA_IN8_IDX
I2S1I_DATA_IN9_IDX
I2S1I_DATA_IN10_IDX
I2S1I_DATA_IN11_IDX
I2S1I_DATA_IN12_IDX
I2S1I_DATA_IN13_IDX
I2S1I_DATA_IN14_IDX
I2S1I_DATA_IN15_IDX
I2S1O_DATA_OUT0_IDX
I2S1O_DATA_OUT1_IDX
I2S1O_DATA_OUT2_IDX
I2S1O_DATA_OUT3_IDX
I2S1O_DATA_OUT4_IDX
I2S1O_DATA_OUT5_IDX
I2S1O_DATA_OUT6_IDX
I2S1O_DATA_OUT7_IDX
I2S1O_DATA_OUT8_IDX
I2S1O_DATA_OUT9_IDX
I2S1O_DATA_OUT10_IDX
I2S1O_DATA_OUT11_IDX
I2S1O_DATA_OUT12_IDX
I2S1O_DATA_OUT13_IDX
I2S1O_DATA_OUT14_IDX
I2S1O_DATA_OUT15_IDX
I2S1O_DATA_OUT16_IDX
I2S1O_DATA_OUT17_IDX
I2S1O_DATA_OUT18_IDX
I2S1O_DATA_OUT19_IDX
I2S1O_DATA_OUT20_IDX
I2S1O_DATA_OUT21_IDX
I2S1O_DATA_OUT22_IDX
I2S1O_DATA_OUT23_IDX
I2S_BAD_OLA_WIN2_PARA
I2S_BAD_OLA_WIN2_PARA_V
I2S_BAD_OLA_WIN2_PARA_S
I2S_BAD_OLA_WIN2_PARA_SHIFT
I2S_BAD_OLA_WIN2_PARA_SHIFT_V
I2S_BAD_OLA_WIN2_PARA_SHIFT_S
I2S_ESCO_CVSD_PACK_LEN_8K
I2S_ESCO_CVSD_PACK_LEN_8K_V
I2S_ESCO_CVSD_PACK_LEN_8K_S
I2S_I2SDATE
I2S_I2SDATE_V
I2S_I2SDATE_S
I2S_INLINK_DSCR_BF0
I2S_INLINK_DSCR_BF0_V
I2S_INLINK_DSCR_BF0_S
I2S_INLINK_DSCR_BF1
I2S_INLINK_DSCR_BF1_V
I2S_INLINK_DSCR_BF1_S
I2S_LCD_TX_SDX2_EN_V
I2S_LCD_TX_SDX2_EN_S
I2S_LCD_TX_WRX2_EN_V
I2S_LCD_TX_WRX2_EN_S
I2S_LC_STATE0
I2S_LC_STATE0_V
I2S_LC_STATE0_S
I2S_LC_STATE1
I2S_LC_STATE1_V
I2S_LC_STATE1_S
I2S_OUTLINK_DSCR_BF0
I2S_OUTLINK_DSCR_BF0_V
I2S_OUTLINK_DSCR_BF0_S
I2S_OUTLINK_DSCR_BF1
I2S_OUTLINK_DSCR_BF1_V
I2S_OUTLINK_DSCR_BF1_S
I2S_PACK_LEN_8K
I2S_PACK_LEN_8K_V
I2S_PACK_LEN_8K_S
I2S_PCM2PDM_CONV_EN_V
I2S_PCM2PDM_CONV_EN_S
I2S_PDM2PCM_CONV_EN_V
I2S_PDM2PCM_CONV_EN_S
I2S_PLC2DMA_EN_V
I2S_PLC2DMA_EN_S
I2S_RX_PDM_SINC_DSR_16_EN_V
I2S_RX_PDM_SINC_DSR_16_EN_S
I2S_SCO_NO_I2S_EN_V
I2S_SCO_NO_I2S_EN_S
I2S_SCO_WITH_I2S_EN_V
I2S_SCO_WITH_I2S_EN_S
I2S_TX_PDM_SINC_OSR2
I2S_TX_PDM_SINC_OSR2_V
I2S_TX_PDM_SINC_OSR2_S
IBREAKA
IBREAKA_0
IBREAKA_1
IBREAKENABLE
ICMP6_STATS
ICMP_STATS
ICMP_TTL
ICOUNT
ICOUNTLEVEL
IFNAMSIZ
IGMP_DEBUG
IGMP_STATS
INCLUDE_eTaskGetState
INCLUDE_pcTaskGetTaskName
INCLUDE_pxTaskGetStackStart
INCLUDE_uxTaskGetStackHighWaterMark
INCLUDE_uxTaskPriorityGet
INCLUDE_vTaskCleanUpResources
INCLUDE_vTaskDelay
INCLUDE_vTaskDelayUntil
INCLUDE_vTaskDelete
INCLUDE_vTaskPrioritySet
INCLUDE_vTaskSuspend
INCLUDE_xEventGroupSetBitFromISR
INCLUDE_xQueueGetMutexHolder
INCLUDE_xSemaphoreGetMutexHolder
INCLUDE_xTaskGetCurrentTaskHandle
INCLUDE_xTaskGetIdleTaskHandle
INCLUDE_xTaskGetSchedulerState
INCLUDE_xTaskResumeFromISR
INCLUDE_xTimerGetTimerDaemonTaskHandle
INCLUDE_xTimerPendFunctionCall
INET6_ADDRSTRLEN
INET_ADDRSTRLEN
INET_DEBUG
INTCLEAR
INTENABLE
INTERRUPT
INTREAD
INTSET
IN_CLASSA_HOST
IN_CLASSA_MAX
IN_CLASSA_NET
IN_CLASSA_NSHIFT
IN_CLASSB_HOST
IN_CLASSB_MAX
IN_CLASSB_NET
IN_CLASSB_NSHIFT
IN_CLASSC_HOST
IN_CLASSC_NET
IN_CLASSC_NSHIFT
IN_CLASSD_HOST
IN_CLASSD_NET
IN_CLASSD_NSHIFT
IN_LOOPBACKNET
IOCPARM_MASK
IOC_IN
IOC_INOUT
IOC_OUT
IOC_VOID
IOV_MAX
IO_MUX_GPIO0_REG
IO_MUX_GPIO1_REG
IO_MUX_GPIO2_REG
IO_MUX_GPIO3_REG
IO_MUX_GPIO4_REG
IO_MUX_GPIO5_REG
IO_MUX_GPIO6_REG
IO_MUX_GPIO7_REG
IO_MUX_GPIO8_REG
IO_MUX_GPIO9_REG
IO_MUX_GPIO10_REG
IO_MUX_GPIO11_REG
IO_MUX_GPIO12_REG
IO_MUX_GPIO13_REG
IO_MUX_GPIO14_REG
IO_MUX_GPIO15_REG
IO_MUX_GPIO16_REG
IO_MUX_GPIO17_REG
IO_MUX_GPIO18_REG
IO_MUX_GPIO19_REG
IO_MUX_GPIO20_REG
IO_MUX_GPIO21_REG
IO_MUX_GPIO22_REG
IO_MUX_GPIO23_REG
IO_MUX_GPIO24_REG
IO_MUX_GPIO25_REG
IO_MUX_GPIO26_REG
IO_MUX_GPIO27_REG
IO_MUX_GPIO32_REG
IO_MUX_GPIO33_REG
IO_MUX_GPIO34_REG
IO_MUX_GPIO35_REG
IO_MUX_GPIO36_REG
IO_MUX_GPIO37_REG
IO_MUX_GPIO38_REG
IO_MUX_GPIO39_REG
IP4ADDR_STRLEN_MAX
IP6_STATS
IP6_FRAG_STATS
IP6_DEBUG
IP6_NO_ZONE
IP6_MULTICAST_SCOPE_RESERVED
IP6_MULTICAST_SCOPE_INTERFACE_LOCAL
IP6_MULTICAST_SCOPE_LINK_LOCAL
IP6_MULTICAST_SCOPE_ADMIN_LOCAL
IP6_MULTICAST_SCOPE_SITE_LOCAL
IP6_MULTICAST_SCOPE_ORGANIZATION_LOCAL
IP6_MULTICAST_SCOPE_GLOBAL
IP6_MULTICAST_SCOPE_RESERVEDF
IP6_ADDR_INVALID
IP6_ADDR_TENTATIVE
IP6_ADDR_VALID
IP6_ADDR_PREFERRED
IP6_ADDR_DEPRECATED
IP6_ADDR_DUPLICATED
IP6_ADDR_TENTATIVE_COUNT_MASK
IP6_ADDR_LIFE_STATIC
IP6_ADDR_LIFE_INFINITE
IP6ADDR_STRLEN_MAX
IP6_ADDR_TENTATIVE_1
IP6_ADDR_TENTATIVE_2
IP6_ADDR_TENTATIVE_3
IP6_ADDR_TENTATIVE_4
IP6_ADDR_TENTATIVE_5
IP6_ADDR_TENTATIVE_6
IP6_ADDR_TENTATIVE_7
IP6_MULTICAST_SCOPE_RESERVED0
IP6_MULTICAST_SCOPE_RESERVED3
IPADDR_STRLEN_MAX
IPFRAG_STATS
IPPROTO_ICMP
IPPROTO_ICMPV6
IPPROTO_IP
IPPROTO_IPV6
IPPROTO_RAW
IPPROTO_TCP
IPPROTO_UDP
IPPROTO_UDPLITE
IPSTR
IPTOS_LOWCOST
IPTOS_LOWDELAY
IPTOS_MINCOST
IPTOS_PREC_CRITIC_ECP
IPTOS_PREC_FLASH
IPTOS_PREC_FLASHOVERRIDE
IPTOS_PREC_IMMEDIATE
IPTOS_PREC_INTERNETCONTROL
IPTOS_PREC_MASK
IPTOS_PREC_NETCONTROL
IPTOS_PREC_PRIORITY
IPTOS_PREC_ROUTINE
IPTOS_RELIABILITY
IPTOS_THROUGHPUT
IPTOS_TOS_MASK
IPV6STR
IPV6_REASS_MAXAGE
IPV6_CUSTOM_SCOPES
IPV6_CHECKSUM
IPV6_JOIN_GROUP
IPV6_ADD_MEMBERSHIP
IPV6_LEAVE_GROUP
IPV6_DROP_MEMBERSHIP
IPV6_MULTICAST_IF
IPV6_MULTICAST_HOPS
IPV6_MULTICAST_LOOP
IPV6_V6ONLY
IP_ADD_MEMBERSHIP
IP_CLASSA_HOST
IP_CLASSA_MAX
IP_CLASSA_NET
IP_CLASSA_NSHIFT
IP_CLASSB_HOST
IP_CLASSB_MAX
IP_CLASSB_NET
IP_CLASSB_NSHIFT
IP_CLASSC_HOST
IP_CLASSC_NET
IP_CLASSC_NSHIFT
IP_CLASSD_HOST
IP_CLASSD_NET
IP_CLASSD_NSHIFT
IP_DEFAULT_TTL
IP_DROP_MEMBERSHIP
IP_FORWARD_ALLOW_TX_ON_RX_NETIF
IP_LOOPBACKNET
IP_MULTICAST_IF
IP_MULTICAST_LOOP
IP_MULTICAST_TTL
IP_OPTIONS_ALLOWED
IP_PKTINFO
IP_REASS_DEBUG
IP_REASS_MAXAGE
IP_REASS_MAX_PBUFS
IP_SOF_BROADCAST
IP_SOF_BROADCAST_RECV
IP_STATS
IP_TOS
IP_TTL
ITIMER_PROF
ITIMER_REAL
ITIMER_VIRTUAL
KERNELSTACKSIZE
LBEG
LCOUNT
LEDC_HS_SIG_OUT0_IDX
LEDC_HS_SIG_OUT1_IDX
LEDC_HS_SIG_OUT2_IDX
LEDC_HS_SIG_OUT3_IDX
LEDC_HS_SIG_OUT4_IDX
LEDC_HS_SIG_OUT5_IDX
LEDC_HS_SIG_OUT6_IDX
LEDC_HS_SIG_OUT7_IDX
LEDC_LS_SIG_OUT0_IDX
LEDC_LS_SIG_OUT1_IDX
LEDC_LS_SIG_OUT2_IDX
LEDC_LS_SIG_OUT3_IDX
LEDC_LS_SIG_OUT4_IDX
LEDC_LS_SIG_OUT5_IDX
LEDC_LS_SIG_OUT6_IDX
LEDC_LS_SIG_OUT7_IDX
LEND
LINK_STATS
LITTLE_ENDIAN
LOCK_EX
LOCK_NB
LOCK_SH
LOCK_UN
LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
LWIP_ALTCP
LWIP_ALTCP_TLS
LWIP_ARP
LWIP_AUTOIP
LWIP_CALLBACK_API
LWIP_CHECKSUM_CTRL_PER_NETIF
LWIP_CHECKSUM_ON_COPY
LWIP_COMPAT_MUTEX
LWIP_COMPAT_SOCKETS
LWIP_DBG_FRESH
LWIP_DBG_HALT
LWIP_DBG_LEVEL_ALL
LWIP_DBG_LEVEL_OFF
LWIP_DBG_LEVEL_SERIOUS
LWIP_DBG_LEVEL_SEVERE
LWIP_DBG_LEVEL_WARNING
LWIP_DBG_MASK_LEVEL
LWIP_DBG_MIN_LEVEL
LWIP_DBG_OFF
LWIP_DBG_ON
LWIP_DBG_STATE
LWIP_DBG_TRACE
LWIP_DBG_TYPES_ON
LWIP_DHCP
LWIP_DHCP6_GET_NTP_SRV
LWIP_DHCP6_MAX_NTP_SERVERS
LWIP_DHCP6_MAX_DNS_SERVERS
LWIP_DHCP_AUTOIP_COOP
LWIP_DHCP_AUTOIP_COOP_TRIES
LWIP_DHCP_BOOTP_FILE
LWIP_DHCP_GET_NTP_SRV
LWIP_DHCP_MAX_DNS_SERVERS
LWIP_DHCP_MAX_NTP_SERVERS
LWIP_DNS
LWIP_DNS_API_DECLARE_H_ERRNO
LWIP_DNS_API_DECLARE_STRUCTS
LWIP_DNS_API_DEFINE_ERRORS
LWIP_DNS_API_DEFINE_FLAGS
LWIP_DNS_SECURE_NO_MULTIPLE_OUTSTANDING
LWIP_DNS_SECURE_RAND_SRC_PORT
LWIP_DNS_SECURE_RAND_XID
LWIP_ETHERNET
LWIP_EVENT_API
LWIP_FIONREAD_LINUXMODE
LWIP_HAVE_INT64
LWIP_ICMP
LWIP_ICMP6
LWIP_ICMP6_DATASIZE
LWIP_ICMP6_HL
LWIP_IGMP
LWIP_IPV4
LWIP_IPV6
LWIP_IPV6_SCOPES_DEBUG
LWIP_IPV6_NUM_ADDRESSES
LWIP_IPV6_FORWARD
LWIP_IPV6_FRAG
LWIP_IPV6_REASS
LWIP_IPV6_SEND_ROUTER_SOLICIT
LWIP_IPV6_AUTOCONFIG
LWIP_IPV6_ADDRESS_LIFETIMES
LWIP_IPV6_DUP_DETECT_ATTEMPTS
LWIP_IPV6_MLD
LWIP_IPV6_DHCP6
LWIP_IPV6_DHCP6_STATEFUL
LWIP_IPV6_DHCP6_STATELESS
LWIP_LOOPBACK_MAX_PBUFS
LWIP_LOOPIF_MULTICAST
LWIP_MIB2_CALLBACKS
LWIP_MPU_COMPATIBLE
LWIP_ND6_QUEUEING
LWIP_ND6_NUM_NEIGHBORS
LWIP_ND6_NUM_DESTINATIONS
LWIP_ND6_NUM_PREFIXES
LWIP_ND6_NUM_ROUTERS
LWIP_ND6_MAX_MULTICAST_SOLICIT
LWIP_ND6_MAX_UNICAST_SOLICIT
LWIP_ND6_MAX_ANYCAST_DELAY_TIME
LWIP_ND6_MAX_NEIGHBOR_ADVERTISEMENT
LWIP_ND6_REACHABLE_TIME
LWIP_ND6_RETRANS_TIMER
LWIP_ND6_DELAY_FIRST_PROBE_TIME
LWIP_ND6_ALLOW_RA_UPDATES
LWIP_ND6_TCP_REACHABILITY_HINTS
LWIP_ND6_RDNSS_MAX_DNS_SERVERS
LWIP_NETCONN
LWIP_NETCONN_FULLDUPLEX
LWIP_NETCONN_SEM_PER_THREAD
LWIP_NETIF_API
LWIP_NETIF_EXT_STATUS_CALLBACK
LWIP_NETIF_HOSTNAME
LWIP_NETIF_HWADDRHINT
LWIP_NETIF_LINK_CALLBACK
LWIP_NETIF_LOOPBACK
LWIP_NETIF_REMOVE_CALLBACK
LWIP_NETIF_STATUS_CALLBACK
LWIP_NETIF_TX_SINGLE_PBUF
LWIP_NETIF_USE_HINTS
LWIP_NOASSERT
LWIP_NO_CTYPE_H
LWIP_NO_INTTYPES_H
LWIP_NO_LIMITS_H
LWIP_NO_STDDEF_H
LWIP_NO_STDINT_H
LWIP_NSC_IPV4_ADDRESS_CHANGED
LWIP_NSC_IPV4_GATEWAY_CHANGED
LWIP_NSC_IPV4_NETMASK_CHANGED
LWIP_NSC_IPV4_SETTINGS_CHANGED
LWIP_NSC_IPV6_SET
LWIP_NSC_IPV6_ADDR_STATE_CHANGED
LWIP_NSC_LINK_CHANGED
LWIP_NSC_NETIF_ADDED
LWIP_NSC_NETIF_REMOVED
LWIP_NSC_NONE
LWIP_NSC_STATUS_CHANGED
LWIP_NUM_NETIF_CLIENT_DATA
LWIP_PERF
LWIP_POSIX_SOCKETS_IO_NAMES
LWIP_RAW
LWIP_SELECT_MAXNFDS
LWIP_SINGLE_NETIF
LWIP_SOCKET
LWIP_SOCKET_OFFSET
LWIP_SOCKET_POLL
LWIP_SOCKET_SELECT
LWIP_SO_RCVTIMEO
LWIP_SO_SNDRCVTIMEO_NONSTANDARD
LWIP_SO_SNDTIMEO
LWIP_STATS_DISPLAY
LWIP_TCP
LWIP_TCPIP_CORE_LOCKING
LWIP_TCPIP_CORE_LOCKING_INPUT
LWIP_TCPIP_TIMEOUT
LWIP_TCP_CLOSE_TIMEOUT_MS_DEFAULT
LWIP_TCP_KEEPALIVE
LWIP_TCP_MAX_SACK_NUM
LWIP_TCP_PCB_NUM_EXT_ARGS
LWIP_TCP_TIMESTAMPS
LWIP_TESTMODE
LWIP_TIMERS
LWIP_TIMERS_CUSTOM
LWIP_TIMEVAL_PRIVATE
LWIP_UDP
LWIP_UDPLITE
LWIP_UINT32_MAX
LWIP_WND_SCALE
L_INCR
L_SET
L_XTND
L_ctermid
L_tmpnam
MACSTR
MALLOC_CAP_8BIT
MALLOC_CAP_32BIT
MALLOC_CAP_DEFAULT
MALLOC_CAP_DMA
MALLOC_CAP_EXEC
MALLOC_CAP_INTERNAL
MALLOC_CAP_INVALID
MALLOC_CAP_IRAM_8BIT
MALLOC_CAP_PID2
MALLOC_CAP_PID3
MALLOC_CAP_PID4
MALLOC_CAP_PID5
MALLOC_CAP_PID6
MALLOC_CAP_PID7
MALLOC_CAP_SPIRAM
MB_LEN_MAX
MCU_SEL
MCU_SEL_S
MCU_SEL_V
MEMCTL
MEMCTL_DCWA_BITS
MEMCTL_DCWA_CLR_MASK
MEMCTL_DCWA_MASK
MEMCTL_DCWA_SHIFT
MEMCTL_DCWU_BITS
MEMCTL_DCWU_CLR_MASK
MEMCTL_DCWU_MASK
MEMCTL_DCWU_SHIFT
MEMCTL_DCW_CLR_MASK
MEMCTL_ICWU_BITS
MEMCTL_ICWU_CLR_MASK
MEMCTL_ICWU_MASK
MEMCTL_ICWU_SHIFT
MEMCTL_IDCW_CLR_MASK
MEMCTL_INV_EN
MEMCTL_INV_EN_SHIFT
MEMCTL_L0IBUF_EN
MEMCTL_L0IBUF_EN_SHIFT
MEMCTL_SNOOP_EN
MEMCTL_SNOOP_EN_SHIFT
MEMP_MEM_INIT
MEMP_MEM_MALLOC
MEMP_NUM_ALTCP_PCB
MEMP_NUM_API_MSG
MEMP_NUM_ARP_QUEUE
MEMP_NUM_DNS_API_MSG
MEMP_NUM_FRAG_PBUF
MEMP_NUM_IGMP_GROUP
MEMP_NUM_LOCALHOSTLIST
MEMP_NUM_MLD6_GROUP
MEMP_NUM_ND6_QUEUE
MEMP_NUM_NETBUF
MEMP_NUM_NETCONN
MEMP_NUM_NETDB
MEMP_NUM_NETIFAPI_MSG
MEMP_NUM_PBUF
MEMP_NUM_RAW_PCB
MEMP_NUM_REASSDATA
MEMP_NUM_SELECT_CB
MEMP_NUM_SOCKET_SETGETSOCKOPT_DATA
MEMP_NUM_TCPIP_MSG_API
MEMP_NUM_TCPIP_MSG_INPKT
MEMP_NUM_TCP_PCB
MEMP_NUM_TCP_PCB_LISTEN
MEMP_NUM_TCP_SEG
MEMP_NUM_UDP_PCB
MEMP_OVERFLOW_CHECK
MEMP_SANITY_CHECK
MEMP_SIZE
MEMP_STATS
MEMP_USE_CUSTOM_POOLS
MEM_ALIGNMENT
MEM_DEBUG
MEM_LIBC_MALLOC
MEM_OVERFLOW_CHECK
MEM_SANITY_CHECK
MEM_SIZE
MEM_STATS
MEM_USE_POOLS
MEM_USE_POOLS_TRY_BIGGER_POOL
MESR_ACCTYPE_SHIFT
MESR_DATEXC
MESR_DATEXC_SHIFT
MESR_DME
MESR_DME_SHIFT
MESR_ERRENAB
MESR_ERRENAB_SHIFT
MESR_ERRTEST
MESR_ERRTEST_SHIFT
MESR_ERRTYPE_SHIFT
MESR_INSEXC
MESR_INSEXC_SHIFT
MESR_MEME
MESR_MEME_SHIFT
MESR_MEMTYPE_SHIFT
MESR_RCE
MESR_RCE_SHIFT
MESR_WAYNUM_SHIFT
MIB2_STATS
MINSIGSTKSZ
MISC_REG_0
MISC_REG_1
MISC_REG_2
MISC_REG_3
MLD6_STATS
MR
MR_0
MR_1
MR_2
MR_3
MSG_CTRUNC
MSG_DONTWAIT
MSG_MORE
MSG_NOSIGNAL
MSG_OOB
MSG_PEEK
MSG_TRUNC
MSG_WAITALL
NAPT_DEBUG
ND6_STATS
NETIF_ADDR_IDX_MAX
NETIF_FLAG_BROADCAST
NETIF_FLAG_ETHARP
NETIF_FLAG_ETHERNET
NETIF_FLAG_IGMP
NETIF_FLAG_LINK_UP
NETIF_FLAG_MLD6
NETIF_FLAG_UP
NETIF_MAX_HWADDR_LEN
NETIF_NAMESIZE
NETIF_NO_INDEX
NL_ARGMAX
NO_DATA
NO_RECOVERY
NO_SYS
NSIG
NVS_DEFAULT_PART_NAME
NVS_KEY_SIZE
NVS_PART_NAME_MAX_SIZE
OSI_FUNCS_TIME_BLOCKING
OSI_QUEUE_SEND_BACK
OSI_QUEUE_SEND_FRONT
OSI_QUEUE_SEND_OVERWRITE
OTA_SIZE_UNKNOWN
O_APPEND
O_CREAT
O_EXCL
O_NDELAY
O_NOCTTY
O_NONBLOCK
O_RDONLY
O_RDWR
O_SYNC
O_TRUNC
O_WRONLY
PART_FLAG_ENCRYPTED
PART_SUBTYPE_DATA_EFUSE_EM
PART_SUBTYPE_DATA_NVS_KEYS
PART_SUBTYPE_DATA_OTA
PART_SUBTYPE_DATA_RF
PART_SUBTYPE_DATA_WIFI
PART_SUBTYPE_END
PART_SUBTYPE_FACTORY
PART_SUBTYPE_OTA_FLAG
PART_SUBTYPE_OTA_MASK
PART_SUBTYPE_TEST
PART_TYPE_APP
PART_TYPE_DATA
PART_TYPE_END
PATH_MAX
PBUF_ALLOC_FLAG_DATA_CONTIGUOUS
PBUF_ALLOC_FLAG_RX
PBUF_FLAG_IS_CUSTOM
PBUF_FLAG_LLBCAST
PBUF_FLAG_LLMCAST
PBUF_FLAG_MCASTLOOP
PBUF_FLAG_PUSH
PBUF_FLAG_TCP_FIN
PBUF_IP_HLEN
PBUF_LINK_ENCAPSULATION_HLEN
PBUF_LINK_HLEN
PBUF_POOL_FREE_OOSEQ
PBUF_POOL_SIZE
PBUF_TRANSPORT_HLEN
PBUF_TYPE_ALLOC_SRC_MASK
PBUF_TYPE_ALLOC_SRC_MASK_APP_MAX
PBUF_TYPE_ALLOC_SRC_MASK_APP_MIN
PBUF_TYPE_ALLOC_SRC_MASK_STD_HEAP
PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF
PBUF_TYPE_ALLOC_SRC_MASK_STD_MEMP_PBUF_POOL
PBUF_TYPE_FLAG_DATA_VOLATILE
PBUF_TYPE_FLAG_STRUCT_DATA_CONTIGUOUS
PCMCLK_IN_IDX
PCMCLK_OUT_IDX
PCMDIN_IDX
PCMDOUT_IDX
PCMFSYNC_IN_IDX
PCMFSYNC_OUT_IDX
PCNT_CTRL_CH0_IN0_IDX
PCNT_CTRL_CH0_IN1_IDX
PCNT_CTRL_CH0_IN2_IDX
PCNT_CTRL_CH0_IN3_IDX
PCNT_CTRL_CH0_IN4_IDX
PCNT_CTRL_CH0_IN5_IDX
PCNT_CTRL_CH0_IN6_IDX
PCNT_CTRL_CH0_IN7_IDX
PCNT_CTRL_CH1_IN0_IDX
PCNT_CTRL_CH1_IN1_IDX
PCNT_CTRL_CH1_IN2_IDX
PCNT_CTRL_CH1_IN3_IDX
PCNT_CTRL_CH1_IN4_IDX
PCNT_CTRL_CH1_IN5_IDX
PCNT_CTRL_CH1_IN6_IDX
PCNT_CTRL_CH1_IN7_IDX
PCNT_SIG_CH0_IN0_IDX
PCNT_SIG_CH0_IN1_IDX
PCNT_SIG_CH0_IN2_IDX
PCNT_SIG_CH0_IN3_IDX
PCNT_SIG_CH0_IN4_IDX
PCNT_SIG_CH0_IN5_IDX
PCNT_SIG_CH0_IN6_IDX
PCNT_SIG_CH0_IN7_IDX
PCNT_SIG_CH1_IN0_IDX
PCNT_SIG_CH1_IN1_IDX
PCNT_SIG_CH1_IN2_IDX
PCNT_SIG_CH1_IN3_IDX
PCNT_SIG_CH1_IN4_IDX
PCNT_SIG_CH1_IN5_IDX
PCNT_SIG_CH1_IN6_IDX
PCNT_SIG_CH1_IN7_IDX
PDP_ENDIAN
PERIPHS_IO_MUX_GPIO0_U
PERIPHS_IO_MUX_GPIO2_U
PERIPHS_IO_MUX_GPIO4_U
PERIPHS_IO_MUX_GPIO5_U
PERIPHS_IO_MUX_GPIO16_U
PERIPHS_IO_MUX_GPIO17_U
PERIPHS_IO_MUX_GPIO18_U
PERIPHS_IO_MUX_GPIO19_U
PERIPHS_IO_MUX_GPIO20_U
PERIPHS_IO_MUX_GPIO21_U
PERIPHS_IO_MUX_GPIO22_U
PERIPHS_IO_MUX_GPIO23_U
PERIPHS_IO_MUX_GPIO24_U
PERIPHS_IO_MUX_GPIO25_U
PERIPHS_IO_MUX_GPIO26_U
PERIPHS_IO_MUX_GPIO27_U
PERIPHS_IO_MUX_GPIO32_U
PERIPHS_IO_MUX_GPIO33_U
PERIPHS_IO_MUX_GPIO34_U
PERIPHS_IO_MUX_GPIO35_U
PERIPHS_IO_MUX_GPIO36_U
PERIPHS_IO_MUX_GPIO37_U
PERIPHS_IO_MUX_GPIO38_U
PERIPHS_IO_MUX_GPIO39_U
PERIPHS_IO_MUX_MTCK_U
PERIPHS_IO_MUX_MTDI_U
PERIPHS_IO_MUX_MTDO_U
PERIPHS_IO_MUX_MTMS_U
PERIPHS_IO_MUX_SD_CLK_U
PERIPHS_IO_MUX_SD_CMD_U
PERIPHS_IO_MUX_SD_DATA0_U
PERIPHS_IO_MUX_SD_DATA1_U
PERIPHS_IO_MUX_SD_DATA2_U
PERIPHS_IO_MUX_SD_DATA3_U
PERIPHS_IO_MUX_U0TXD_U
PERIPHS_IO_MUX_U0RXD_U
PERIPHS_SPI_ENCRYPT_BASEADDR
PF_INET
PF_INET6
PF_UNSPEC
PIN_CTRL
PIN_FUNC_GPIO
POLLERR
POLLHUP
POLLIN
POLLNVAL
POLLOUT
POLLPRI
POLLRDBAND
POLLRDNORM
POLLWRBAND
POLLWRNORM
PRID
PRO_CPU_NUM
PS
PS_CALLINC_MASK
PS_CALLINC_SHIFT
PS_EXCM
PS_EXCM_MASK
PS_EXCM_SHIFT
PS_INTLEVEL_MASK
PS_INTLEVEL_SHIFT
PS_OWB_MASK
PS_OWB_SHIFT
PS_PROG
PS_PROGSTACK_MASK
PS_PROGSTACK_SHIFT
PS_PROG_MASK
PS_PROG_SHIFT
PS_RING_MASK
PS_RING_SHIFT
PS_UM
PS_UM_MASK
PS_UM_SHIFT
PS_WOE
PS_WOE_ABI
PS_WOE_MASK
PS_WOE_SHIFT
PTHREAD_CREATE_DETACHED
PTHREAD_CREATE_JOINABLE
PTHREAD_EXPLICIT_SCHED
PTHREAD_INHERIT_SCHED
PTHREAD_MUTEX_DEFAULT
PTHREAD_MUTEX_ERRORCHECK
PTHREAD_MUTEX_NORMAL
PTHREAD_MUTEX_RECURSIVE
PTHREAD_SCOPE_PROCESS
PTHREAD_SCOPE_SYSTEM
PWM2_FLTA_IDX
PWM2_FLTB_IDX
PWM3_FLTA_IDX
PWM3_FLTB_IDX
PWM0_CAP0_IN_IDX
PWM0_CAP1_IN_IDX
PWM0_CAP2_IN_IDX
PWM0_F0_IN_IDX
PWM0_F1_IN_IDX
PWM0_F2_IN_IDX
PWM0_OUT0A_IDX
PWM0_OUT0B_IDX
PWM0_OUT1A_IDX
PWM0_OUT1B_IDX
PWM0_OUT2A_IDX
PWM0_OUT2B_IDX
PWM0_SYNC0_IN_IDX
PWM0_SYNC1_IN_IDX
PWM0_SYNC2_IN_IDX
PWM1_CAP0_IN_IDX
PWM1_CAP1_IN_IDX
PWM1_CAP2_IN_IDX
PWM1_F0_IN_IDX
PWM1_F1_IN_IDX
PWM1_F2_IN_IDX
PWM1_OUT0A_IDX
PWM1_OUT0B_IDX
PWM1_OUT1A_IDX
PWM1_OUT1B_IDX
PWM1_OUT2A_IDX
PWM1_OUT2B_IDX
PWM1_SYNC0_IN_IDX
PWM1_SYNC1_IN_IDX
PWM1_SYNC2_IN_IDX
PWM2_CAP1_IN_IDX
PWM2_CAP2_IN_IDX
PWM2_CAP3_IN_IDX
PWM2_OUT1H_IDX
PWM2_OUT1L_IDX
PWM2_OUT2H_IDX
PWM2_OUT2L_IDX
PWM2_OUT3H_IDX
PWM2_OUT3L_IDX
PWM2_OUT4H_IDX
PWM2_OUT4L_IDX
PWM3_CAP1_IN_IDX
PWM3_CAP2_IN_IDX
PWM3_CAP3_IN_IDX
PWM3_OUT1H_IDX
PWM3_OUT1L_IDX
PWM3_OUT2H_IDX
PWM3_OUT2L_IDX
PWM3_OUT3H_IDX
PWM3_OUT3L_IDX
PWM3_OUT4H_IDX
PWM3_OUT4L_IDX
P_tmpdir
RAND_MAX
RAW_DEBUG
RAW_TTL
REF_CLK_FREQ
RMT_SIG_IN0_IDX
RMT_SIG_IN1_IDX
RMT_SIG_IN2_IDX
RMT_SIG_IN3_IDX
RMT_SIG_IN4_IDX
RMT_SIG_IN5_IDX
RMT_SIG_IN6_IDX
RMT_SIG_IN7_IDX
RMT_SIG_OUT0_IDX
RMT_SIG_OUT1_IDX
RMT_SIG_OUT2_IDX
RMT_SIG_OUT3_IDX
RMT_SIG_OUT4_IDX
RMT_SIG_OUT5_IDX
RMT_SIG_OUT6_IDX
RMT_SIG_OUT7_IDX
RTCIO_CHANNEL_0_GPIO_NUM
RTCIO_CHANNEL_1_GPIO_NUM
RTCIO_CHANNEL_2_GPIO_NUM
RTCIO_CHANNEL_3_GPIO_NUM
RTCIO_CHANNEL_4_GPIO_NUM
RTCIO_CHANNEL_5_GPIO_NUM
RTCIO_CHANNEL_6_GPIO_NUM
RTCIO_CHANNEL_7_GPIO_NUM
RTCIO_CHANNEL_8_GPIO_NUM
RTCIO_CHANNEL_9_GPIO_NUM
RTCIO_CHANNEL_10_GPIO_NUM
RTCIO_CHANNEL_11_GPIO_NUM
RTCIO_CHANNEL_12_GPIO_NUM
RTCIO_CHANNEL_13_GPIO_NUM
RTCIO_CHANNEL_14_GPIO_NUM
RTCIO_CHANNEL_15_GPIO_NUM
RTCIO_CHANNEL_16_GPIO_NUM
RTCIO_CHANNEL_17_GPIO_NUM
RTCIO_GPIO0_CHANNEL
RTCIO_GPIO2_CHANNEL
RTCIO_GPIO4_CHANNEL
RTCIO_GPIO12_CHANNEL
RTCIO_GPIO13_CHANNEL
RTCIO_GPIO14_CHANNEL
RTCIO_GPIO15_CHANNEL
RTCIO_GPIO25_CHANNEL
RTCIO_GPIO26_CHANNEL
RTCIO_GPIO27_CHANNEL
RTCIO_GPIO32_CHANNEL
RTCIO_GPIO33_CHANNEL
RTCIO_GPIO34_CHANNEL
RTCIO_GPIO35_CHANNEL
RTCIO_GPIO36_CHANNEL
RTCIO_GPIO37_CHANNEL
RTCIO_GPIO38_CHANNEL
RTCIO_GPIO39_CHANNEL
RTC_CLK_CAL_FRACT
RTC_CNTL_ADC1_HOLD_FORCE_V
RTC_CNTL_ADC1_HOLD_FORCE_S
RTC_CNTL_ADC2_HOLD_FORCE_V
RTC_CNTL_ADC2_HOLD_FORCE_S
RTC_CNTL_ANALOG_FORCE_ISO_S
RTC_CNTL_ANALOG_FORCE_ISO_V
RTC_CNTL_ANALOG_FORCE_NOISO_S
RTC_CNTL_ANALOG_FORCE_NOISO_V
RTC_CNTL_ANA_CLK_RTC_SEL
RTC_CNTL_ANA_CLK_RTC_SEL_S
RTC_CNTL_ANA_CLK_RTC_SEL_V
RTC_CNTL_ANA_CONF_REG
RTC_CNTL_APB2RTC_BRIDGE_SEL_V
RTC_CNTL_APB2RTC_BRIDGE_SEL_S
RTC_CNTL_APPCPU_STAT_VECTOR_SEL_S
RTC_CNTL_APPCPU_STAT_VECTOR_SEL_V
RTC_CNTL_BBPLL_CAL_SLP_START_S
RTC_CNTL_BBPLL_CAL_SLP_START_V
RTC_CNTL_BBPLL_FORCE_PD_S
RTC_CNTL_BBPLL_FORCE_PD_V
RTC_CNTL_BBPLL_FORCE_PU_S
RTC_CNTL_BBPLL_FORCE_PU_V
RTC_CNTL_BBPLL_I2C_FORCE_PU_V
RTC_CNTL_BBPLL_I2C_FORCE_PU_S
RTC_CNTL_BBPLL_I2C_FORCE_PD_V
RTC_CNTL_BBPLL_I2C_FORCE_PD_S
RTC_CNTL_BB_I2C_FORCE_PU_V
RTC_CNTL_BB_I2C_FORCE_PU_S
RTC_CNTL_BB_I2C_FORCE_PD_V
RTC_CNTL_BB_I2C_FORCE_PD_S
RTC_CNTL_BIAS_CONF_REG
RTC_CNTL_BIAS_CORE_FOLW_8M_V
RTC_CNTL_BIAS_CORE_FOLW_8M_S
RTC_CNTL_BIAS_CORE_FORCE_PD_S
RTC_CNTL_BIAS_CORE_FORCE_PD_V
RTC_CNTL_BIAS_CORE_FORCE_PU_S
RTC_CNTL_BIAS_CORE_FORCE_PU_V
RTC_CNTL_BIAS_FORCE_NOSLEEP_S
RTC_CNTL_BIAS_FORCE_NOSLEEP_V
RTC_CNTL_BIAS_FORCE_SLEEP_S
RTC_CNTL_BIAS_FORCE_SLEEP_V
RTC_CNTL_BIAS_I2C_FORCE_PU_V
RTC_CNTL_BIAS_I2C_FORCE_PU_S
RTC_CNTL_BIAS_I2C_FORCE_PD_V
RTC_CNTL_BIAS_I2C_FORCE_PD_S
RTC_CNTL_BIAS_I2C_FOLW_8M_V
RTC_CNTL_BIAS_I2C_FOLW_8M_S
RTC_CNTL_BIAS_SLEEP_FOLW_8M_V
RTC_CNTL_BIAS_SLEEP_FOLW_8M_S
RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_S
RTC_CNTL_BROWN_OUT_CLOSE_FLASH_ENA_V
RTC_CNTL_BROWN_OUT_DET_S
RTC_CNTL_BROWN_OUT_DET_V
RTC_CNTL_BROWN_OUT_ENA_S
RTC_CNTL_BROWN_OUT_ENA_V
RTC_CNTL_BROWN_OUT_INT_CLR_S
RTC_CNTL_BROWN_OUT_INT_CLR_V
RTC_CNTL_BROWN_OUT_INT_ENA_S
RTC_CNTL_BROWN_OUT_INT_ENA_V
RTC_CNTL_BROWN_OUT_INT_RAW_S
RTC_CNTL_BROWN_OUT_INT_RAW_V
RTC_CNTL_BROWN_OUT_INT_ST_S
RTC_CNTL_BROWN_OUT_INT_ST_V
RTC_CNTL_BROWN_OUT_PD_RF_ENA_S
RTC_CNTL_BROWN_OUT_PD_RF_ENA_V
RTC_CNTL_BROWN_OUT_REG
RTC_CNTL_BROWN_OUT_RST_ENA_S
RTC_CNTL_BROWN_OUT_RST_ENA_V
RTC_CNTL_BROWN_OUT_RST_WAIT
RTC_CNTL_BROWN_OUT_RST_WAIT_S
RTC_CNTL_BROWN_OUT_RST_WAIT_V
RTC_CNTL_CK8M_WAIT
RTC_CNTL_CK8M_WAIT_V
RTC_CNTL_CK8M_WAIT_S
RTC_CNTL_CK8M_WAIT_DEFAULT
RTC_CNTL_CK8M_FORCE_PU_V
RTC_CNTL_CK8M_FORCE_PU_S
RTC_CNTL_CK8M_FORCE_PD_V
RTC_CNTL_CK8M_FORCE_PD_S
RTC_CNTL_CK8M_DFREQ
RTC_CNTL_CK8M_DFREQ_V
RTC_CNTL_CK8M_DFREQ_S
RTC_CNTL_CK8M_DFREQ_DEFAULT
RTC_CNTL_CK8M_FORCE_NOGATING_V
RTC_CNTL_CK8M_FORCE_NOGATING_S
RTC_CNTL_CK8M_DIV_SEL
RTC_CNTL_CK8M_DIV_SEL_V
RTC_CNTL_CK8M_DIV_SEL_S
RTC_CNTL_CK8M_DFREQ_FORCE_V
RTC_CNTL_CK8M_DFREQ_FORCE_S
RTC_CNTL_CK8M_DIV
RTC_CNTL_CK8M_DIV_V
RTC_CNTL_CK8M_DIV_S
RTC_CNTL_CKGEN_I2C_PU_V
RTC_CNTL_CKGEN_I2C_PU_S
RTC_CNTL_CLK_CONF_REG
RTC_CNTL_CLR_DG_PAD_AUTOHOLD_S
RTC_CNTL_CLR_DG_PAD_AUTOHOLD_V
RTC_CNTL_CNTL_DATE
RTC_CNTL_CNTL_DATE_S
RTC_CNTL_CNTL_DATE_V
RTC_CNTL_CPUPERIOD_SEL
RTC_CNTL_CPUPERIOD_SEL_S
RTC_CNTL_CPUPERIOD_SEL_V
RTC_CNTL_CPUSEL_CONF_S
RTC_CNTL_CPUSEL_CONF_V
RTC_CNTL_CPU_PERIOD_CONF_REG
RTC_CNTL_CPU_STALL_EN_S
RTC_CNTL_CPU_STALL_EN_V
RTC_CNTL_CPU_STALL_WAIT
RTC_CNTL_CPU_STALL_WAIT_S
RTC_CNTL_CPU_STALL_WAIT_V
RTC_CNTL_DATE_REG
RTC_CNTL_DBG_ATTEN
RTC_CNTL_DBG_ATTEN_DEFAULT
RTC_CNTL_DBG_ATTEN_S
RTC_CNTL_DBG_ATTEN_V
RTC_CNTL_DBIAS_0V90
RTC_CNTL_DBIAS_0V95
RTC_CNTL_DBIAS_1V00
RTC_CNTL_DBIAS_1V05
RTC_CNTL_DBIAS_1V10
RTC_CNTL_DBIAS_1V15
RTC_CNTL_DBIAS_1V20
RTC_CNTL_DBIAS_1V25
RTC_CNTL_DBIAS_SLP
RTC_CNTL_DBIAS_SLP_S
RTC_CNTL_DBIAS_SLP_V
RTC_CNTL_DBIAS_WAK
RTC_CNTL_DBIAS_WAK_S
RTC_CNTL_DBIAS_WAK_V
RTC_CNTL_DBOOST_FORCE_PD_S
RTC_CNTL_DBOOST_FORCE_PD_V
RTC_CNTL_DBOOST_FORCE_PU_S
RTC_CNTL_DBOOST_FORCE_PU_V
RTC_CNTL_DBROWN_OUT_THRES
RTC_CNTL_DBROWN_OUT_THRES_S
RTC_CNTL_DBROWN_OUT_THRES_V
RTC_CNTL_DEC_HEARTBEAT_PERIOD_S
RTC_CNTL_DEC_HEARTBEAT_PERIOD_V
RTC_CNTL_DEC_HEARTBEAT_WIDTH_S
RTC_CNTL_DEC_HEARTBEAT_WIDTH_V
RTC_CNTL_DEEP_SLP_REJECT_EN_S
RTC_CNTL_DEEP_SLP_REJECT_EN_V
RTC_CNTL_DG_PAD_AUTOHOLD_EN_S
RTC_CNTL_DG_PAD_AUTOHOLD_EN_V
RTC_CNTL_DG_PAD_AUTOHOLD_S
RTC_CNTL_DG_PAD_AUTOHOLD_V
RTC_CNTL_DG_PAD_FORCE_HOLD_S
RTC_CNTL_DG_PAD_FORCE_HOLD_V
RTC_CNTL_DG_PAD_FORCE_ISO_S
RTC_CNTL_DG_PAD_FORCE_ISO_V
RTC_CNTL_DG_PAD_FORCE_NOISO_S
RTC_CNTL_DG_PAD_FORCE_NOISO_V
RTC_CNTL_DG_PAD_FORCE_UNHOLD_S
RTC_CNTL_DG_PAD_FORCE_UNHOLD_V
RTC_CNTL_DG_WRAP_FORCE_ISO_S
RTC_CNTL_DG_WRAP_FORCE_ISO_V
RTC_CNTL_DG_WRAP_FORCE_NOISO_S
RTC_CNTL_DG_WRAP_FORCE_NOISO_V
RTC_CNTL_DG_WRAP_FORCE_NORST_S
RTC_CNTL_DG_WRAP_FORCE_NORST_V
RTC_CNTL_DG_WRAP_FORCE_PD_S
RTC_CNTL_DG_WRAP_FORCE_PD_V
RTC_CNTL_DG_WRAP_FORCE_PU_S
RTC_CNTL_DG_WRAP_FORCE_PU_V
RTC_CNTL_DG_WRAP_FORCE_RST_S
RTC_CNTL_DG_WRAP_FORCE_RST_V
RTC_CNTL_DG_WRAP_PD_EN_S
RTC_CNTL_DG_WRAP_PD_EN_V
RTC_CNTL_DG_WRAP_POWERUP_TIMER
RTC_CNTL_DG_WRAP_POWERUP_TIMER_S
RTC_CNTL_DG_WRAP_POWERUP_TIMER_V
RTC_CNTL_DG_WRAP_WAIT_TIMER
RTC_CNTL_DG_WRAP_WAIT_TIMER_S
RTC_CNTL_DG_WRAP_WAIT_TIMER_V
RTC_CNTL_DIAG0_REG
RTC_CNTL_DIAG1_REG
RTC_CNTL_DIG_CLK8M_EN_V
RTC_CNTL_DIG_CLK8M_EN_S
RTC_CNTL_DIG_CLK8M_D256_EN_V
RTC_CNTL_DIG_CLK8M_D256_EN_S
RTC_CNTL_DIG_DBIAS_SLP
RTC_CNTL_DIG_DBIAS_SLP_S
RTC_CNTL_DIG_DBIAS_SLP_V
RTC_CNTL_DIG_DBIAS_WAK
RTC_CNTL_DIG_DBIAS_WAK_S
RTC_CNTL_DIG_DBIAS_WAK_V
RTC_CNTL_DIG_ISO_FORCE_OFF_S
RTC_CNTL_DIG_ISO_FORCE_OFF_V
RTC_CNTL_DIG_ISO_FORCE_ON_S
RTC_CNTL_DIG_ISO_FORCE_ON_V
RTC_CNTL_DIG_ISO_REG
RTC_CNTL_DIG_PWC_REG
RTC_CNTL_DIG_XTAL32K_EN_V
RTC_CNTL_DIG_XTAL32K_EN_S
RTC_CNTL_DREFH_SDIO
RTC_CNTL_DREFH_SDIO_S
RTC_CNTL_DREFH_SDIO_V
RTC_CNTL_DREFL_SDIO
RTC_CNTL_DREFL_SDIO_S
RTC_CNTL_DREFL_SDIO_V
RTC_CNTL_DREFM_SDIO
RTC_CNTL_DREFM_SDIO_S
RTC_CNTL_DREFM_SDIO_V
RTC_CNTL_DTEST_RTC
RTC_CNTL_DTEST_RTC_S
RTC_CNTL_DTEST_RTC_V
RTC_CNTL_ENB_CK8M_DIV_V
RTC_CNTL_ENB_CK8M_DIV_S
RTC_CNTL_ENB_CK8M_V
RTC_CNTL_ENB_CK8M_S
RTC_CNTL_ENB_SCK_XTAL_S
RTC_CNTL_ENB_SCK_XTAL_V
RTC_CNTL_ENT_RTC_S
RTC_CNTL_ENT_RTC_V
RTC_CNTL_EXT_WAKEUP0_LV_V
RTC_CNTL_EXT_WAKEUP0_LV_S
RTC_CNTL_EXT_WAKEUP1_LV_V
RTC_CNTL_EXT_WAKEUP1_LV_S
RTC_CNTL_EXT_WAKEUP1_REG
RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_V
RTC_CNTL_EXT_WAKEUP1_STATUS_CLR_S
RTC_CNTL_EXT_WAKEUP1_SEL
RTC_CNTL_EXT_WAKEUP1_SEL_V
RTC_CNTL_EXT_WAKEUP1_SEL_S
RTC_CNTL_EXT_WAKEUP1_STATUS_REG
RTC_CNTL_EXT_WAKEUP1_STATUS
RTC_CNTL_EXT_WAKEUP1_STATUS_V
RTC_CNTL_EXT_WAKEUP1_STATUS_S
RTC_CNTL_EXT_WAKEUP_CONF_REG
RTC_CNTL_EXT_XTL_CONF_REG
RTC_CNTL_FASTMEM_FOLW_CPU_S
RTC_CNTL_FASTMEM_FOLW_CPU_V
RTC_CNTL_FASTMEM_FORCE_ISO_S
RTC_CNTL_FASTMEM_FORCE_ISO_V
RTC_CNTL_FASTMEM_FORCE_LPD_S
RTC_CNTL_FASTMEM_FORCE_LPD_V
RTC_CNTL_FASTMEM_FORCE_LPU_S
RTC_CNTL_FASTMEM_FORCE_LPU_V
RTC_CNTL_FASTMEM_FORCE_NOISO_S
RTC_CNTL_FASTMEM_FORCE_NOISO_V
RTC_CNTL_FASTMEM_FORCE_PD_S
RTC_CNTL_FASTMEM_FORCE_PD_V
RTC_CNTL_FASTMEM_FORCE_PU_S
RTC_CNTL_FASTMEM_FORCE_PU_V
RTC_CNTL_FASTMEM_PD_EN_S
RTC_CNTL_FASTMEM_PD_EN_V
RTC_CNTL_FAST_CLK_RTC_SEL_S
RTC_CNTL_FAST_CLK_RTC_SEL_V
RTC_CNTL_FORCE_ISO_S
RTC_CNTL_FORCE_ISO_V
RTC_CNTL_FORCE_NOISO_S
RTC_CNTL_FORCE_NOISO_V
RTC_CNTL_FORCE_PD_S
RTC_CNTL_FORCE_PD_V
RTC_CNTL_FORCE_PU_S
RTC_CNTL_FORCE_PU_V
RTC_CNTL_GPIO_REJECT_EN_S
RTC_CNTL_GPIO_REJECT_EN_V
RTC_CNTL_GPIO_WAKEUP_FILTER_S
RTC_CNTL_GPIO_WAKEUP_FILTER_V
RTC_CNTL_HOLD_FORCE_REG
RTC_CNTL_INC_HEARTBEAT_PERIOD_S
RTC_CNTL_INC_HEARTBEAT_PERIOD_V
RTC_CNTL_INC_HEARTBEAT_REFRESH_S
RTC_CNTL_INC_HEARTBEAT_REFRESH_V
RTC_CNTL_INTER_RAM0_PD_EN_V
RTC_CNTL_INTER_RAM0_PD_EN_S
RTC_CNTL_INTER_RAM0_FORCE_PU_V
RTC_CNTL_INTER_RAM0_FORCE_PU_S
RTC_CNTL_INTER_RAM0_FORCE_PD_V
RTC_CNTL_INTER_RAM0_FORCE_PD_S
RTC_CNTL_INTER_RAM0_FORCE_ISO_V
RTC_CNTL_INTER_RAM0_FORCE_ISO_S
RTC_CNTL_INTER_RAM0_FORCE_NOISO_V
RTC_CNTL_INTER_RAM0_FORCE_NOISO_S
RTC_CNTL_INTER_RAM1_PD_EN_V
RTC_CNTL_INTER_RAM1_PD_EN_S
RTC_CNTL_INTER_RAM1_FORCE_PU_V
RTC_CNTL_INTER_RAM1_FORCE_PU_S
RTC_CNTL_INTER_RAM1_FORCE_PD_V
RTC_CNTL_INTER_RAM1_FORCE_PD_S
RTC_CNTL_INTER_RAM1_FORCE_NOISO_V
RTC_CNTL_INTER_RAM1_FORCE_NOISO_S
RTC_CNTL_INTER_RAM1_FORCE_ISO_V
RTC_CNTL_INTER_RAM1_FORCE_ISO_S
RTC_CNTL_INTER_RAM2_PD_EN_V
RTC_CNTL_INTER_RAM2_PD_EN_S
RTC_CNTL_INTER_RAM2_FORCE_PU_V
RTC_CNTL_INTER_RAM2_FORCE_PU_S
RTC_CNTL_INTER_RAM2_FORCE_PD_V
RTC_CNTL_INTER_RAM2_FORCE_PD_S
RTC_CNTL_INTER_RAM2_FORCE_NOISO_V
RTC_CNTL_INTER_RAM2_FORCE_NOISO_S
RTC_CNTL_INTER_RAM2_FORCE_ISO_V
RTC_CNTL_INTER_RAM2_FORCE_ISO_S
RTC_CNTL_INTER_RAM3_PD_EN_V
RTC_CNTL_INTER_RAM3_PD_EN_S
RTC_CNTL_INTER_RAM3_FORCE_PU_V
RTC_CNTL_INTER_RAM3_FORCE_PU_S
RTC_CNTL_INTER_RAM3_FORCE_PD_V
RTC_CNTL_INTER_RAM3_FORCE_PD_S
RTC_CNTL_INTER_RAM3_FORCE_NOISO_V
RTC_CNTL_INTER_RAM3_FORCE_NOISO_S
RTC_CNTL_INTER_RAM3_FORCE_ISO_V
RTC_CNTL_INTER_RAM3_FORCE_ISO_S
RTC_CNTL_INTER_RAM4_PD_EN_V
RTC_CNTL_INTER_RAM4_PD_EN_S
RTC_CNTL_INTER_RAM4_FORCE_PU_V
RTC_CNTL_INTER_RAM4_FORCE_PU_S
RTC_CNTL_INTER_RAM4_FORCE_PD_V
RTC_CNTL_INTER_RAM4_FORCE_PD_S
RTC_CNTL_INTER_RAM4_FORCE_NOISO_V
RTC_CNTL_INTER_RAM4_FORCE_NOISO_S
RTC_CNTL_INTER_RAM4_FORCE_ISO_V
RTC_CNTL_INTER_RAM4_FORCE_ISO_S
RTC_CNTL_INT_CLR_REG
RTC_CNTL_INT_ENA_REG
RTC_CNTL_INT_RAW_REG
RTC_CNTL_INT_ST_REG
RTC_CNTL_LIGHT_SLP_REJECT_EN_S
RTC_CNTL_LIGHT_SLP_REJECT_EN_V
RTC_CNTL_LOW_POWER_DIAG0
RTC_CNTL_LOW_POWER_DIAG0_V
RTC_CNTL_LOW_POWER_DIAG0_S
RTC_CNTL_LOW_POWER_DIAG1
RTC_CNTL_LOW_POWER_DIAG1_V
RTC_CNTL_LOW_POWER_DIAG1_S
RTC_CNTL_LOW_POWER_ST_REG
RTC_CNTL_LSLP_MEM_FORCE_PD_S
RTC_CNTL_LSLP_MEM_FORCE_PD_V
RTC_CNTL_LSLP_MEM_FORCE_PU_S
RTC_CNTL_LSLP_MEM_FORCE_PU_V
RTC_CNTL_MAIN_TIMER_ALARM_EN_S
RTC_CNTL_MAIN_TIMER_ALARM_EN_V
RTC_CNTL_MAIN_TIMER_INT_CLR_S
RTC_CNTL_MAIN_TIMER_INT_CLR_V
RTC_CNTL_MAIN_TIMER_INT_ENA_S
RTC_CNTL_MAIN_TIMER_INT_ENA_V
RTC_CNTL_MAIN_TIMER_INT_RAW_S
RTC_CNTL_MAIN_TIMER_INT_RAW_V
RTC_CNTL_MAIN_TIMER_INT_ST_S
RTC_CNTL_MAIN_TIMER_INT_ST_V
RTC_CNTL_MIN_SLP_VAL
RTC_CNTL_MIN_SLP_VAL_MIN
RTC_CNTL_MIN_SLP_VAL_S
RTC_CNTL_MIN_SLP_VAL_V
RTC_CNTL_MIN_TIME_CK8M_OFF
RTC_CNTL_MIN_TIME_CK8M_OFF_V
RTC_CNTL_MIN_TIME_CK8M_OFF_S
RTC_CNTL_OPTIONS0_REG
RTC_CNTL_PDAC1_HOLD_FORCE_V
RTC_CNTL_PDAC1_HOLD_FORCE_S
RTC_CNTL_PDAC2_HOLD_FORCE_V
RTC_CNTL_PDAC2_HOLD_FORCE_S
RTC_CNTL_PD_EN_S
RTC_CNTL_PD_EN_V
RTC_CNTL_PLLA_FORCE_PD_S
RTC_CNTL_PLLA_FORCE_PD_V
RTC_CNTL_PLLA_FORCE_PU_S
RTC_CNTL_PLLA_FORCE_PU_V
RTC_CNTL_PLL_BUF_WAIT
RTC_CNTL_PLL_BUF_WAIT_DEFAULT
RTC_CNTL_PLL_BUF_WAIT_S
RTC_CNTL_PLL_BUF_WAIT_V
RTC_CNTL_PLL_FORCE_ISO_S
RTC_CNTL_PLL_FORCE_ISO_V
RTC_CNTL_PLL_FORCE_NOISO_S
RTC_CNTL_PLL_FORCE_NOISO_V
RTC_CNTL_PLL_I2C_PU_V
RTC_CNTL_PLL_I2C_PU_S
RTC_CNTL_POWERUP_TIMER
RTC_CNTL_POWERUP_TIMER_S
RTC_CNTL_POWERUP_TIMER_V
RTC_CNTL_PROCPU_STAT_VECTOR_SEL_S
RTC_CNTL_PROCPU_STAT_VECTOR_SEL_V
RTC_CNTL_PVTMON_PU_S
RTC_CNTL_PVTMON_PU_V
RTC_CNTL_PWC_FORCE_PD_S
RTC_CNTL_PWC_FORCE_PD_V
RTC_CNTL_PWC_FORCE_PU_S
RTC_CNTL_PWC_FORCE_PU_V
RTC_CNTL_PWC_REG
RTC_CNTL_RDY_FOR_WAKEUP_S
RTC_CNTL_RDY_FOR_WAKEUP_V
RTC_CNTL_REG
RTC_CNTL_REG1P8_READY_V
RTC_CNTL_REG1P8_READY_S
RTC_CNTL_REJECT_CAUSE
RTC_CNTL_REJECT_CAUSE_S
RTC_CNTL_REJECT_CAUSE_V
RTC_CNTL_RESET_CAUSE_APPCPU
RTC_CNTL_RESET_CAUSE_APPCPU_S
RTC_CNTL_RESET_CAUSE_APPCPU_V
RTC_CNTL_RESET_CAUSE_PROCPU
RTC_CNTL_RESET_CAUSE_PROCPU_S
RTC_CNTL_RESET_CAUSE_PROCPU_V
RTC_CNTL_RESET_STATE_REG
RTC_CNTL_RFRX_PBUS_PU_S
RTC_CNTL_RFRX_PBUS_PU_V
RTC_CNTL_ROM0_PD_EN_V
RTC_CNTL_ROM0_PD_EN_S
RTC_CNTL_ROM0_FORCE_PU_V
RTC_CNTL_ROM0_FORCE_PU_S
RTC_CNTL_ROM0_FORCE_PD_V
RTC_CNTL_ROM0_FORCE_PD_S
RTC_CNTL_ROM0_FORCE_ISO_V
RTC_CNTL_ROM0_FORCE_ISO_S
RTC_CNTL_ROM0_FORCE_NOISO_V
RTC_CNTL_ROM0_FORCE_NOISO_S
RTC_CNTL_ROM_RAM_POWERUP_TIMER
RTC_CNTL_ROM_RAM_POWERUP_TIMER_S
RTC_CNTL_ROM_RAM_POWERUP_TIMER_V
RTC_CNTL_ROM_RAM_WAIT_TIMER
RTC_CNTL_ROM_RAM_WAIT_TIMER_S
RTC_CNTL_ROM_RAM_WAIT_TIMER_V
RTC_CNTL_RST_BIAS_I2C_V
RTC_CNTL_RST_BIAS_I2C_S
RTC_CNTL_RTCMEM_POWERUP_TIMER
RTC_CNTL_RTCMEM_POWERUP_TIMER_S
RTC_CNTL_RTCMEM_POWERUP_TIMER_V
RTC_CNTL_RTCMEM_WAIT_TIMER
RTC_CNTL_RTCMEM_WAIT_TIMER_S
RTC_CNTL_RTCMEM_WAIT_TIMER_V
RTC_CNTL_RTC_CNTL_DATE_VERSION
RTC_CNTL_SAR_INT_CLR_S
RTC_CNTL_SAR_INT_CLR_V
RTC_CNTL_SAR_INT_ST_S
RTC_CNTL_SAR_INT_ST_V
RTC_CNTL_SCK_DCAP
RTC_CNTL_SCK_DCAP_DEFAULT
RTC_CNTL_SCK_DCAP_FORCE_S
RTC_CNTL_SCK_DCAP_FORCE_V
RTC_CNTL_SCK_DCAP_S
RTC_CNTL_SCK_DCAP_V
RTC_CNTL_SCRATCH0
RTC_CNTL_SCRATCH0_V
RTC_CNTL_SCRATCH0_S
RTC_CNTL_SCRATCH1
RTC_CNTL_SCRATCH1_V
RTC_CNTL_SCRATCH1_S
RTC_CNTL_SCRATCH2
RTC_CNTL_SCRATCH2_V
RTC_CNTL_SCRATCH2_S
RTC_CNTL_SCRATCH3
RTC_CNTL_SCRATCH3_V
RTC_CNTL_SCRATCH3_S
RTC_CNTL_SCRATCH4
RTC_CNTL_SCRATCH4_V
RTC_CNTL_SCRATCH4_S
RTC_CNTL_SCRATCH5
RTC_CNTL_SCRATCH5_V
RTC_CNTL_SCRATCH5_S
RTC_CNTL_SCRATCH6
RTC_CNTL_SCRATCH6_V
RTC_CNTL_SCRATCH6_S
RTC_CNTL_SCRATCH7
RTC_CNTL_SCRATCH7_V
RTC_CNTL_SCRATCH7_S
RTC_CNTL_SDIO_ACTIVE_IND_S
RTC_CNTL_SDIO_ACTIVE_IND_V
RTC_CNTL_SDIO_ACT_CONF_REG
RTC_CNTL_SDIO_ACT_DNUM
RTC_CNTL_SDIO_ACT_DNUM_S
RTC_CNTL_SDIO_ACT_DNUM_V
RTC_CNTL_SDIO_CONF_REG
RTC_CNTL_SDIO_FORCE_S
RTC_CNTL_SDIO_FORCE_V
RTC_CNTL_SDIO_IDLE_INT_CLR_S
RTC_CNTL_SDIO_IDLE_INT_CLR_V
RTC_CNTL_SDIO_IDLE_INT_ENA_S
RTC_CNTL_SDIO_IDLE_INT_ENA_V
RTC_CNTL_SDIO_IDLE_INT_RAW_S
RTC_CNTL_SDIO_IDLE_INT_RAW_V
RTC_CNTL_SDIO_IDLE_INT_ST_S
RTC_CNTL_SDIO_IDLE_INT_ST_V
RTC_CNTL_SDIO_PD_EN_S
RTC_CNTL_SDIO_PD_EN_V
RTC_CNTL_SDIO_REJECT_EN_S
RTC_CNTL_SDIO_REJECT_EN_V
RTC_CNTL_SDIO_TIEH_S
RTC_CNTL_SDIO_TIEH_V
RTC_CNTL_SENSE1_HOLD_FORCE_V
RTC_CNTL_SENSE1_HOLD_FORCE_S
RTC_CNTL_SENSE2_HOLD_FORCE_V
RTC_CNTL_SENSE2_HOLD_FORCE_S
RTC_CNTL_SENSE3_HOLD_FORCE_V
RTC_CNTL_SENSE3_HOLD_FORCE_S
RTC_CNTL_SENSE4_HOLD_FORCE_V
RTC_CNTL_SENSE4_HOLD_FORCE_S
RTC_CNTL_SLEEP_EN_S
RTC_CNTL_SLEEP_EN_V
RTC_CNTL_SLOWMEM_FOLW_CPU_S
RTC_CNTL_SLOWMEM_FOLW_CPU_V
RTC_CNTL_SLOWMEM_FORCE_ISO_S
RTC_CNTL_SLOWMEM_FORCE_ISO_V
RTC_CNTL_SLOWMEM_FORCE_LPD_S
RTC_CNTL_SLOWMEM_FORCE_LPD_V
RTC_CNTL_SLOWMEM_FORCE_LPU_S
RTC_CNTL_SLOWMEM_FORCE_LPU_V
RTC_CNTL_SLOWMEM_FORCE_NOISO_S
RTC_CNTL_SLOWMEM_FORCE_NOISO_V
RTC_CNTL_SLOWMEM_FORCE_PD_S
RTC_CNTL_SLOWMEM_FORCE_PD_V
RTC_CNTL_SLOWMEM_FORCE_PU_S
RTC_CNTL_SLOWMEM_FORCE_PU_V
RTC_CNTL_SLOWMEM_PD_EN_S
RTC_CNTL_SLOWMEM_PD_EN_V
RTC_CNTL_SLP_REJECT_CONF_REG
RTC_CNTL_SLP_REJECT_INT_CLR_S
RTC_CNTL_SLP_REJECT_INT_CLR_V
RTC_CNTL_SLP_REJECT_INT_ENA_S
RTC_CNTL_SLP_REJECT_INT_ENA_V
RTC_CNTL_SLP_REJECT_INT_RAW_S
RTC_CNTL_SLP_REJECT_INT_RAW_V
RTC_CNTL_SLP_REJECT_INT_ST_S
RTC_CNTL_SLP_REJECT_INT_ST_V
RTC_CNTL_SLP_REJECT_S
RTC_CNTL_SLP_REJECT_V
RTC_CNTL_SLP_TIMER0_REG
RTC_CNTL_SLP_TIMER1_REG
RTC_CNTL_SLP_VAL_HI
RTC_CNTL_SLP_VAL_HI_S
RTC_CNTL_SLP_VAL_HI_V
RTC_CNTL_SLP_VAL_LO
RTC_CNTL_SLP_VAL_LO_S
RTC_CNTL_SLP_VAL_LO_V
RTC_CNTL_SLP_WAKEUP_INT_CLR_S
RTC_CNTL_SLP_WAKEUP_INT_CLR_V
RTC_CNTL_SLP_WAKEUP_INT_ENA_S
RTC_CNTL_SLP_WAKEUP_INT_ENA_V
RTC_CNTL_SLP_WAKEUP_INT_RAW_S
RTC_CNTL_SLP_WAKEUP_INT_RAW_V
RTC_CNTL_SLP_WAKEUP_INT_ST_S
RTC_CNTL_SLP_WAKEUP_INT_ST_V
RTC_CNTL_SLP_WAKEUP_S
RTC_CNTL_SLP_WAKEUP_V
RTC_CNTL_SOC_CLK_SEL
RTC_CNTL_SOC_CLK_SEL_8M
RTC_CNTL_SOC_CLK_SEL_APLL
RTC_CNTL_SOC_CLK_SEL_PLL
RTC_CNTL_SOC_CLK_SEL_S
RTC_CNTL_SOC_CLK_SEL_V
RTC_CNTL_SOC_CLK_SEL_XTL
RTC_CNTL_STATE0_REG
RTC_CNTL_STORE0_REG
RTC_CNTL_STORE1_REG
RTC_CNTL_STORE2_REG
RTC_CNTL_STORE3_REG
RTC_CNTL_STORE4_REG
RTC_CNTL_STORE5_REG
RTC_CNTL_STORE6_REG
RTC_CNTL_STORE7_REG
RTC_CNTL_SW_APPCPU_RST_S
RTC_CNTL_SW_APPCPU_RST_V
RTC_CNTL_SW_CPU_STALL_REG
RTC_CNTL_SW_PROCPU_RST_S
RTC_CNTL_SW_PROCPU_RST_V
RTC_CNTL_SW_STALL_APPCPU_C0
RTC_CNTL_SW_STALL_APPCPU_C0_V
RTC_CNTL_SW_STALL_APPCPU_C0_S
RTC_CNTL_SW_STALL_APPCPU_C1
RTC_CNTL_SW_STALL_APPCPU_C1_V
RTC_CNTL_SW_STALL_APPCPU_C1_S
RTC_CNTL_SW_STALL_PROCPU_C0
RTC_CNTL_SW_STALL_PROCPU_C0_V
RTC_CNTL_SW_STALL_PROCPU_C0_S
RTC_CNTL_SW_STALL_PROCPU_C1
RTC_CNTL_SW_STALL_PROCPU_C1_V
RTC_CNTL_SW_STALL_PROCPU_C1_S
RTC_CNTL_SW_SYS_RST_S
RTC_CNTL_SW_SYS_RST_V
RTC_CNTL_TEST_MUX_REG
RTC_CNTL_TIME0_REG
RTC_CNTL_TIME1_REG
RTC_CNTL_TIMER1_REG
RTC_CNTL_TIMER2_REG
RTC_CNTL_TIMER3_REG
RTC_CNTL_TIMER4_REG
RTC_CNTL_TIMER5_REG
RTC_CNTL_TIME_HI
RTC_CNTL_TIME_HI_S
RTC_CNTL_TIME_HI_V
RTC_CNTL_TIME_LO
RTC_CNTL_TIME_LO_S
RTC_CNTL_TIME_LO_V
RTC_CNTL_TIME_UPDATE_REG
RTC_CNTL_TIME_UPDATE_S
RTC_CNTL_TIME_UPDATE_V
RTC_CNTL_TIME_VALID_INT_CLR_S
RTC_CNTL_TIME_VALID_INT_CLR_V
RTC_CNTL_TIME_VALID_INT_ENA_S
RTC_CNTL_TIME_VALID_INT_ENA_V
RTC_CNTL_TIME_VALID_INT_RAW_S
RTC_CNTL_TIME_VALID_INT_RAW_V
RTC_CNTL_TIME_VALID_INT_ST_S
RTC_CNTL_TIME_VALID_INT_ST_V
RTC_CNTL_TIME_VALID_S
RTC_CNTL_TIME_VALID_V
RTC_CNTL_TOUCH_INT_CLR_S
RTC_CNTL_TOUCH_INT_CLR_V
RTC_CNTL_TOUCH_INT_ENA_S
RTC_CNTL_TOUCH_INT_ENA_V
RTC_CNTL_TOUCH_INT_RAW_S
RTC_CNTL_TOUCH_INT_RAW_V
RTC_CNTL_TOUCH_INT_ST_S
RTC_CNTL_TOUCH_INT_ST_V
RTC_CNTL_TOUCH_PAD0_HOLD_FORCE_V
RTC_CNTL_TOUCH_PAD0_HOLD_FORCE_S
RTC_CNTL_TOUCH_PAD1_HOLD_FORCE_V
RTC_CNTL_TOUCH_PAD1_HOLD_FORCE_S
RTC_CNTL_TOUCH_PAD2_HOLD_FORCE_V
RTC_CNTL_TOUCH_PAD2_HOLD_FORCE_S
RTC_CNTL_TOUCH_PAD3_HOLD_FORCE_V
RTC_CNTL_TOUCH_PAD3_HOLD_FORCE_S
RTC_CNTL_TOUCH_PAD4_HOLD_FORCE_V
RTC_CNTL_TOUCH_PAD4_HOLD_FORCE_S
RTC_CNTL_TOUCH_PAD5_HOLD_FORCE_V
RTC_CNTL_TOUCH_PAD5_HOLD_FORCE_S
RTC_CNTL_TOUCH_PAD6_HOLD_FORCE_V
RTC_CNTL_TOUCH_PAD6_HOLD_FORCE_S
RTC_CNTL_TOUCH_PAD7_HOLD_FORCE_V
RTC_CNTL_TOUCH_PAD7_HOLD_FORCE_S
RTC_CNTL_TOUCH_SLP_TIMER_EN_S
RTC_CNTL_TOUCH_SLP_TIMER_EN_V
RTC_CNTL_TOUCH_WAKEUP_FORCE_EN_S
RTC_CNTL_TOUCH_WAKEUP_FORCE_EN_V
RTC_CNTL_TXRF_I2C_PU_V
RTC_CNTL_TXRF_I2C_PU_S
RTC_CNTL_ULPCP_TOUCH_START_WAIT
RTC_CNTL_ULPCP_TOUCH_START_WAIT_S
RTC_CNTL_ULPCP_TOUCH_START_WAIT_V
RTC_CNTL_ULP_CP_INT_ENA_S
RTC_CNTL_ULP_CP_INT_ENA_V
RTC_CNTL_ULP_CP_INT_RAW_S
RTC_CNTL_ULP_CP_INT_RAW_V
RTC_CNTL_ULP_CP_SLP_TIMER_EN_S
RTC_CNTL_ULP_CP_SLP_TIMER_EN_V
RTC_CNTL_ULP_CP_SUBTIMER_PREDIV
RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_S
RTC_CNTL_ULP_CP_SUBTIMER_PREDIV_V
RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN_S
RTC_CNTL_ULP_CP_WAKEUP_FORCE_EN_V
RTC_CNTL_WAIT_TIMER
RTC_CNTL_WAIT_TIMER_S
RTC_CNTL_WAIT_TIMER_V
RTC_CNTL_WAKEUP_CAUSE
RTC_CNTL_WAKEUP_CAUSE_S
RTC_CNTL_WAKEUP_CAUSE_V
RTC_CNTL_WAKEUP_ENA
RTC_CNTL_WAKEUP_ENA_S
RTC_CNTL_WAKEUP_ENA_V
RTC_CNTL_WAKEUP_STATE_REG
RTC_CNTL_WDTCONFIG0_REG
RTC_CNTL_WDTCONFIG1_REG
RTC_CNTL_WDTCONFIG2_REG
RTC_CNTL_WDTCONFIG3_REG
RTC_CNTL_WDTCONFIG4_REG
RTC_CNTL_WDTFEED_REG
RTC_CNTL_WDTWPROTECT_REG
RTC_CNTL_WDT_APPCPU_RESET_EN_S
RTC_CNTL_WDT_APPCPU_RESET_EN_V
RTC_CNTL_WDT_CPU_RESET_LENGTH
RTC_CNTL_WDT_CPU_RESET_LENGTH_S
RTC_CNTL_WDT_CPU_RESET_LENGTH_V
RTC_CNTL_WDT_EDGE_INT_EN_S
RTC_CNTL_WDT_EDGE_INT_EN_V
RTC_CNTL_WDT_EN_S
RTC_CNTL_WDT_EN_V
RTC_CNTL_WDT_FEED_S
RTC_CNTL_WDT_FEED_V
RTC_CNTL_WDT_FLASHBOOT_MOD_EN_S
RTC_CNTL_WDT_FLASHBOOT_MOD_EN_V
RTC_CNTL_WDT_INT_CLR_S
RTC_CNTL_WDT_INT_CLR_V
RTC_CNTL_WDT_INT_ENA_S
RTC_CNTL_WDT_INT_ENA_V
RTC_CNTL_WDT_INT_RAW_S
RTC_CNTL_WDT_INT_RAW_V
RTC_CNTL_WDT_INT_ST_S
RTC_CNTL_WDT_INT_ST_V
RTC_CNTL_WDT_LEVEL_INT_EN_S
RTC_CNTL_WDT_LEVEL_INT_EN_V
RTC_CNTL_WDT_PAUSE_IN_SLP_S
RTC_CNTL_WDT_PAUSE_IN_SLP_V
RTC_CNTL_WDT_PROCPU_RESET_EN_S
RTC_CNTL_WDT_PROCPU_RESET_EN_V
RTC_CNTL_WDT_STG0
RTC_CNTL_WDT_STG0_V
RTC_CNTL_WDT_STG0_S
RTC_CNTL_WDT_STG0_HOLD
RTC_CNTL_WDT_STG0_HOLD_V
RTC_CNTL_WDT_STG0_HOLD_S
RTC_CNTL_WDT_STG1
RTC_CNTL_WDT_STG1_V
RTC_CNTL_WDT_STG1_S
RTC_CNTL_WDT_STG1_HOLD
RTC_CNTL_WDT_STG1_HOLD_V
RTC_CNTL_WDT_STG1_HOLD_S
RTC_CNTL_WDT_STG2
RTC_CNTL_WDT_STG2_V
RTC_CNTL_WDT_STG2_S
RTC_CNTL_WDT_STG2_HOLD
RTC_CNTL_WDT_STG2_HOLD_V
RTC_CNTL_WDT_STG2_HOLD_S
RTC_CNTL_WDT_STG3
RTC_CNTL_WDT_STG3_V
RTC_CNTL_WDT_STG3_S
RTC_CNTL_WDT_STG3_HOLD
RTC_CNTL_WDT_STG3_HOLD_V
RTC_CNTL_WDT_STG3_HOLD_S
RTC_CNTL_WDT_SYS_RESET_LENGTH
RTC_CNTL_WDT_SYS_RESET_LENGTH_S
RTC_CNTL_WDT_SYS_RESET_LENGTH_V
RTC_CNTL_WDT_WKEY
RTC_CNTL_WDT_WKEY_S
RTC_CNTL_WDT_WKEY_V
RTC_CNTL_WDT_WKEY_VALUE
RTC_CNTL_WIFI_FORCE_ISO_S
RTC_CNTL_WIFI_FORCE_ISO_V
RTC_CNTL_WIFI_FORCE_NOISO_S
RTC_CNTL_WIFI_FORCE_NOISO_V
RTC_CNTL_WIFI_FORCE_PD_S
RTC_CNTL_WIFI_FORCE_PD_V
RTC_CNTL_WIFI_FORCE_PU_S
RTC_CNTL_WIFI_FORCE_PU_V
RTC_CNTL_WIFI_PD_EN_S
RTC_CNTL_WIFI_PD_EN_V
RTC_CNTL_WIFI_POWERUP_TIMER
RTC_CNTL_WIFI_POWERUP_TIMER_S
RTC_CNTL_WIFI_POWERUP_TIMER_V
RTC_CNTL_WIFI_WAIT_TIMER
RTC_CNTL_WIFI_WAIT_TIMER_S
RTC_CNTL_WIFI_WAIT_TIMER_V
RTC_CNTL_X32N_HOLD_FORCE_V
RTC_CNTL_X32N_HOLD_FORCE_S
RTC_CNTL_X32P_HOLD_FORCE_V
RTC_CNTL_X32P_HOLD_FORCE_S
RTC_CNTL_XPD_SDIO_REG_S
RTC_CNTL_XPD_SDIO_REG_V
RTC_CNTL_XTAL_FORCE_NOGATING_S
RTC_CNTL_XTAL_FORCE_NOGATING_V
RTC_CNTL_XTL_BUF_WAIT
RTC_CNTL_XTL_BUF_WAIT_DEFAULT
RTC_CNTL_XTL_BUF_WAIT_S
RTC_CNTL_XTL_BUF_WAIT_V
RTC_CNTL_XTL_EXT_CTR_EN_S
RTC_CNTL_XTL_EXT_CTR_EN_V
RTC_CNTL_XTL_EXT_CTR_LV_S
RTC_CNTL_XTL_EXT_CTR_LV_V
RTC_CNTL_XTL_FORCE_ISO_S
RTC_CNTL_XTL_FORCE_ISO_V
RTC_CNTL_XTL_FORCE_NOISO_S
RTC_CNTL_XTL_FORCE_NOISO_V
RTC_CNTL_XTL_FORCE_PD_S
RTC_CNTL_XTL_FORCE_PD_V
RTC_CNTL_XTL_FORCE_PU_S
RTC_CNTL_XTL_FORCE_PU_V
RTC_FAST_CLK_FREQ_APPROX
RTC_GPIO_ENABLE
RTC_GPIO_ENABLE_REG
RTC_GPIO_ENABLE_S
RTC_GPIO_ENABLE_V
RTC_GPIO_ENABLE_W1TS_REG
RTC_GPIO_ENABLE_W1TS
RTC_GPIO_ENABLE_W1TS_V
RTC_GPIO_ENABLE_W1TS_S
RTC_GPIO_ENABLE_W1TC_REG
RTC_GPIO_ENABLE_W1TC
RTC_GPIO_ENABLE_W1TC_V
RTC_GPIO_ENABLE_W1TC_S
RTC_GPIO_IN_NEXT
RTC_GPIO_IN_NEXT_S
RTC_GPIO_IN_NEXT_V
RTC_GPIO_IN_REG
RTC_GPIO_NUMBER
RTC_GPIO_OUT_DATA
RTC_GPIO_OUT_DATA_S
RTC_GPIO_OUT_DATA_V
RTC_GPIO_OUT_DATA_W1TS
RTC_GPIO_OUT_DATA_W1TS_V
RTC_GPIO_OUT_DATA_W1TS_S
RTC_GPIO_OUT_DATA_W1TC
RTC_GPIO_OUT_DATA_W1TC_V
RTC_GPIO_OUT_DATA_W1TC_S
RTC_GPIO_OUT_REG
RTC_GPIO_OUT_W1TS_REG
RTC_GPIO_OUT_W1TC_REG
RTC_GPIO_PIN0_REG
RTC_GPIO_PIN0_INT_TYPE
RTC_GPIO_PIN0_INT_TYPE_V
RTC_GPIO_PIN0_INT_TYPE_S
RTC_GPIO_PIN0_PAD_DRIVER_V
RTC_GPIO_PIN0_PAD_DRIVER_S
RTC_GPIO_PIN0_WAKEUP_ENABLE_V
RTC_GPIO_PIN0_WAKEUP_ENABLE_S
RTC_GPIO_PIN1_REG
RTC_GPIO_PIN1_WAKEUP_ENABLE_V
RTC_GPIO_PIN1_WAKEUP_ENABLE_S
RTC_GPIO_PIN1_INT_TYPE
RTC_GPIO_PIN1_INT_TYPE_V
RTC_GPIO_PIN1_INT_TYPE_S
RTC_GPIO_PIN1_PAD_DRIVER_V
RTC_GPIO_PIN1_PAD_DRIVER_S
RTC_GPIO_PIN2_REG
RTC_GPIO_PIN2_WAKEUP_ENABLE_V
RTC_GPIO_PIN2_WAKEUP_ENABLE_S
RTC_GPIO_PIN2_INT_TYPE
RTC_GPIO_PIN2_INT_TYPE_V
RTC_GPIO_PIN2_INT_TYPE_S
RTC_GPIO_PIN2_PAD_DRIVER_V
RTC_GPIO_PIN2_PAD_DRIVER_S
RTC_GPIO_PIN3_REG
RTC_GPIO_PIN3_WAKEUP_ENABLE_V
RTC_GPIO_PIN3_WAKEUP_ENABLE_S
RTC_GPIO_PIN3_INT_TYPE
RTC_GPIO_PIN3_INT_TYPE_V
RTC_GPIO_PIN3_INT_TYPE_S
RTC_GPIO_PIN3_PAD_DRIVER_V
RTC_GPIO_PIN3_PAD_DRIVER_S
RTC_GPIO_PIN4_REG
RTC_GPIO_PIN4_WAKEUP_ENABLE_V
RTC_GPIO_PIN4_WAKEUP_ENABLE_S
RTC_GPIO_PIN4_INT_TYPE
RTC_GPIO_PIN4_INT_TYPE_V
RTC_GPIO_PIN4_INT_TYPE_S
RTC_GPIO_PIN4_PAD_DRIVER_V
RTC_GPIO_PIN4_PAD_DRIVER_S
RTC_GPIO_PIN5_REG
RTC_GPIO_PIN5_WAKEUP_ENABLE_V
RTC_GPIO_PIN5_WAKEUP_ENABLE_S
RTC_GPIO_PIN5_INT_TYPE
RTC_GPIO_PIN5_INT_TYPE_V
RTC_GPIO_PIN5_INT_TYPE_S
RTC_GPIO_PIN5_PAD_DRIVER_V
RTC_GPIO_PIN5_PAD_DRIVER_S
RTC_GPIO_PIN6_REG
RTC_GPIO_PIN6_WAKEUP_ENABLE_V
RTC_GPIO_PIN6_WAKEUP_ENABLE_S
RTC_GPIO_PIN6_INT_TYPE
RTC_GPIO_PIN6_INT_TYPE_V
RTC_GPIO_PIN6_INT_TYPE_S
RTC_GPIO_PIN6_PAD_DRIVER_V
RTC_GPIO_PIN6_PAD_DRIVER_S
RTC_GPIO_PIN7_REG
RTC_GPIO_PIN7_WAKEUP_ENABLE_V
RTC_GPIO_PIN7_WAKEUP_ENABLE_S
RTC_GPIO_PIN7_INT_TYPE
RTC_GPIO_PIN7_INT_TYPE_V
RTC_GPIO_PIN7_INT_TYPE_S
RTC_GPIO_PIN7_PAD_DRIVER_V
RTC_GPIO_PIN7_PAD_DRIVER_S
RTC_GPIO_PIN8_REG
RTC_GPIO_PIN8_WAKEUP_ENABLE_V
RTC_GPIO_PIN8_WAKEUP_ENABLE_S
RTC_GPIO_PIN8_INT_TYPE
RTC_GPIO_PIN8_INT_TYPE_V
RTC_GPIO_PIN8_INT_TYPE_S
RTC_GPIO_PIN8_PAD_DRIVER_V
RTC_GPIO_PIN8_PAD_DRIVER_S
RTC_GPIO_PIN9_REG
RTC_GPIO_PIN9_WAKEUP_ENABLE_V
RTC_GPIO_PIN9_WAKEUP_ENABLE_S
RTC_GPIO_PIN9_INT_TYPE
RTC_GPIO_PIN9_INT_TYPE_V
RTC_GPIO_PIN9_INT_TYPE_S
RTC_GPIO_PIN9_PAD_DRIVER_V
RTC_GPIO_PIN9_PAD_DRIVER_S
RTC_GPIO_PIN10_REG
RTC_GPIO_PIN10_WAKEUP_ENABLE_V
RTC_GPIO_PIN10_WAKEUP_ENABLE_S
RTC_GPIO_PIN10_INT_TYPE
RTC_GPIO_PIN10_INT_TYPE_V
RTC_GPIO_PIN10_INT_TYPE_S
RTC_GPIO_PIN10_PAD_DRIVER_V
RTC_GPIO_PIN10_PAD_DRIVER_S
RTC_GPIO_PIN11_REG
RTC_GPIO_PIN11_WAKEUP_ENABLE_V
RTC_GPIO_PIN11_WAKEUP_ENABLE_S
RTC_GPIO_PIN11_INT_TYPE
RTC_GPIO_PIN11_INT_TYPE_V
RTC_GPIO_PIN11_INT_TYPE_S
RTC_GPIO_PIN11_PAD_DRIVER_V
RTC_GPIO_PIN11_PAD_DRIVER_S
RTC_GPIO_PIN12_REG
RTC_GPIO_PIN12_WAKEUP_ENABLE_V
RTC_GPIO_PIN12_WAKEUP_ENABLE_S
RTC_GPIO_PIN12_INT_TYPE
RTC_GPIO_PIN12_INT_TYPE_V
RTC_GPIO_PIN12_INT_TYPE_S
RTC_GPIO_PIN12_PAD_DRIVER_V
RTC_GPIO_PIN12_PAD_DRIVER_S
RTC_GPIO_PIN13_REG
RTC_GPIO_PIN13_WAKEUP_ENABLE_V
RTC_GPIO_PIN13_WAKEUP_ENABLE_S
RTC_GPIO_PIN13_INT_TYPE
RTC_GPIO_PIN13_INT_TYPE_V
RTC_GPIO_PIN13_INT_TYPE_S
RTC_GPIO_PIN13_PAD_DRIVER_V
RTC_GPIO_PIN13_PAD_DRIVER_S
RTC_GPIO_PIN14_REG
RTC_GPIO_PIN14_WAKEUP_ENABLE_V
RTC_GPIO_PIN14_WAKEUP_ENABLE_S
RTC_GPIO_PIN14_INT_TYPE
RTC_GPIO_PIN14_INT_TYPE_V
RTC_GPIO_PIN14_INT_TYPE_S
RTC_GPIO_PIN14_PAD_DRIVER_V
RTC_GPIO_PIN14_PAD_DRIVER_S
RTC_GPIO_PIN15_REG
RTC_GPIO_PIN15_WAKEUP_ENABLE_V
RTC_GPIO_PIN15_WAKEUP_ENABLE_S
RTC_GPIO_PIN15_INT_TYPE
RTC_GPIO_PIN15_INT_TYPE_V
RTC_GPIO_PIN15_INT_TYPE_S
RTC_GPIO_PIN15_PAD_DRIVER_V
RTC_GPIO_PIN15_PAD_DRIVER_S
RTC_GPIO_PIN16_REG
RTC_GPIO_PIN16_WAKEUP_ENABLE_V
RTC_GPIO_PIN16_WAKEUP_ENABLE_S
RTC_GPIO_PIN16_INT_TYPE
RTC_GPIO_PIN16_INT_TYPE_V
RTC_GPIO_PIN16_INT_TYPE_S
RTC_GPIO_PIN16_PAD_DRIVER_V
RTC_GPIO_PIN16_PAD_DRIVER_S
RTC_GPIO_PIN17_REG
RTC_GPIO_PIN17_WAKEUP_ENABLE_V
RTC_GPIO_PIN17_WAKEUP_ENABLE_S
RTC_GPIO_PIN17_INT_TYPE
RTC_GPIO_PIN17_INT_TYPE_V
RTC_GPIO_PIN17_INT_TYPE_S
RTC_GPIO_PIN17_PAD_DRIVER_V
RTC_GPIO_PIN17_PAD_DRIVER_S
RTC_GPIO_STATUS_INT
RTC_GPIO_STATUS_INT_S
RTC_GPIO_STATUS_INT_V
RTC_GPIO_STATUS_INT_W1TS
RTC_GPIO_STATUS_INT_W1TS_V
RTC_GPIO_STATUS_INT_W1TS_S
RTC_GPIO_STATUS_INT_W1TC
RTC_GPIO_STATUS_INT_W1TC_V
RTC_GPIO_STATUS_INT_W1TC_S
RTC_GPIO_STATUS_REG
RTC_GPIO_STATUS_W1TS_REG
RTC_GPIO_STATUS_W1TC_REG
RTC_IO_ADC1_HOLD_V
RTC_IO_ADC1_HOLD_S
RTC_IO_ADC1_MUX_SEL_V
RTC_IO_ADC1_MUX_SEL_S
RTC_IO_ADC1_FUN_SEL
RTC_IO_ADC1_FUN_SEL_V
RTC_IO_ADC1_FUN_SEL_S
RTC_IO_ADC1_SLP_SEL_V
RTC_IO_ADC1_SLP_SEL_S
RTC_IO_ADC1_SLP_IE_V
RTC_IO_ADC1_SLP_IE_S
RTC_IO_ADC1_FUN_IE_V
RTC_IO_ADC1_FUN_IE_S
RTC_IO_ADC2_HOLD_V
RTC_IO_ADC2_HOLD_S
RTC_IO_ADC2_MUX_SEL_V
RTC_IO_ADC2_MUX_SEL_S
RTC_IO_ADC2_FUN_SEL
RTC_IO_ADC2_FUN_SEL_V
RTC_IO_ADC2_FUN_SEL_S
RTC_IO_ADC2_SLP_SEL_V
RTC_IO_ADC2_SLP_SEL_S
RTC_IO_ADC2_SLP_IE_V
RTC_IO_ADC2_SLP_IE_S
RTC_IO_ADC2_FUN_IE_V
RTC_IO_ADC2_FUN_IE_S
RTC_IO_ADC_PAD_REG
RTC_IO_DAC_XTAL_32K
RTC_IO_DAC_XTAL_32K_V
RTC_IO_DAC_XTAL_32K_S
RTC_IO_DATE_REG
RTC_IO_DBIAS_XTAL_32K
RTC_IO_DBIAS_XTAL_32K_V
RTC_IO_DBIAS_XTAL_32K_S
RTC_IO_DEBUG_12M_NO_GATING_V
RTC_IO_DEBUG_12M_NO_GATING_S
RTC_IO_DEBUG_SEL0
RTC_IO_DEBUG_SEL0_V
RTC_IO_DEBUG_SEL0_S
RTC_IO_DEBUG_SEL1
RTC_IO_DEBUG_SEL1_V
RTC_IO_DEBUG_SEL1_S
RTC_IO_DEBUG_SEL2
RTC_IO_DEBUG_SEL2_V
RTC_IO_DEBUG_SEL2_S
RTC_IO_DEBUG_SEL3
RTC_IO_DEBUG_SEL3_V
RTC_IO_DEBUG_SEL3_S
RTC_IO_DEBUG_SEL4
RTC_IO_DEBUG_SEL4_V
RTC_IO_DEBUG_SEL4_S
RTC_IO_DEBUG_SEL0_8M
RTC_IO_DEBUG_SEL0_32K_XTAL
RTC_IO_DEBUG_SEL0_150K_OSC
RTC_IO_DIG_PAD_HOLD
RTC_IO_DIG_PAD_HOLD_REG
RTC_IO_DIG_PAD_HOLD_S
RTC_IO_DIG_PAD_HOLD_V
RTC_IO_DRES_XTAL_32K
RTC_IO_DRES_XTAL_32K_V
RTC_IO_DRES_XTAL_32K_S
RTC_IO_EXT_WAKEUP0_REG
RTC_IO_EXT_WAKEUP0_SEL
RTC_IO_EXT_WAKEUP0_SEL_V
RTC_IO_EXT_WAKEUP0_SEL_S
RTC_IO_HALL_PHASE_S
RTC_IO_HALL_PHASE_V
RTC_IO_HALL_SENS_REG
RTC_IO_IO_DATE
RTC_IO_IO_DATE_S
RTC_IO_IO_DATE_V
RTC_IO_PAD_DAC1_REG
RTC_IO_PAD_DAC2_REG
RTC_IO_PDAC1_DRV
RTC_IO_PDAC1_DRV_V
RTC_IO_PDAC1_DRV_S
RTC_IO_PDAC1_HOLD_V
RTC_IO_PDAC1_HOLD_S
RTC_IO_PDAC1_RDE_V
RTC_IO_PDAC1_RDE_S
RTC_IO_PDAC1_RUE_V
RTC_IO_PDAC1_RUE_S
RTC_IO_PDAC1_DAC
RTC_IO_PDAC1_DAC_V
RTC_IO_PDAC1_DAC_S
RTC_IO_PDAC1_XPD_DAC_V
RTC_IO_PDAC1_XPD_DAC_S
RTC_IO_PDAC1_MUX_SEL_V
RTC_IO_PDAC1_MUX_SEL_S
RTC_IO_PDAC1_FUN_SEL
RTC_IO_PDAC1_FUN_SEL_V
RTC_IO_PDAC1_FUN_SEL_S
RTC_IO_PDAC1_SLP_SEL_V
RTC_IO_PDAC1_SLP_SEL_S
RTC_IO_PDAC1_SLP_IE_V
RTC_IO_PDAC1_SLP_IE_S
RTC_IO_PDAC1_SLP_OE_V
RTC_IO_PDAC1_SLP_OE_S
RTC_IO_PDAC1_FUN_IE_V
RTC_IO_PDAC1_FUN_IE_S
RTC_IO_PDAC1_DAC_XPD_FORCE_V
RTC_IO_PDAC1_DAC_XPD_FORCE_S
RTC_IO_PDAC2_DRV
RTC_IO_PDAC2_DRV_V
RTC_IO_PDAC2_DRV_S
RTC_IO_PDAC2_HOLD_V
RTC_IO_PDAC2_HOLD_S
RTC_IO_PDAC2_RDE_V
RTC_IO_PDAC2_RDE_S
RTC_IO_PDAC2_RUE_V
RTC_IO_PDAC2_RUE_S
RTC_IO_PDAC2_DAC
RTC_IO_PDAC2_DAC_V
RTC_IO_PDAC2_DAC_S
RTC_IO_PDAC2_XPD_DAC_V
RTC_IO_PDAC2_XPD_DAC_S
RTC_IO_PDAC2_MUX_SEL_V
RTC_IO_PDAC2_MUX_SEL_S
RTC_IO_PDAC2_FUN_SEL
RTC_IO_PDAC2_FUN_SEL_V
RTC_IO_PDAC2_FUN_SEL_S
RTC_IO_PDAC2_SLP_SEL_V
RTC_IO_PDAC2_SLP_SEL_S
RTC_IO_PDAC2_SLP_IE_V
RTC_IO_PDAC2_SLP_IE_S
RTC_IO_PDAC2_SLP_OE_V
RTC_IO_PDAC2_SLP_OE_S
RTC_IO_PDAC2_FUN_IE_V
RTC_IO_PDAC2_FUN_IE_S
RTC_IO_PDAC2_DAC_XPD_FORCE_V
RTC_IO_PDAC2_DAC_XPD_FORCE_S
RTC_IO_RTC_DEBUG_SEL_REG
RTC_IO_RTC_IO_DATE_VERSION
RTC_IO_SAR_DEBUG_BIT_SEL
RTC_IO_SAR_DEBUG_BIT_SEL_S
RTC_IO_SAR_DEBUG_BIT_SEL_V
RTC_IO_SAR_I2C_IO_REG
RTC_IO_SAR_I2C_SDA_SEL
RTC_IO_SAR_I2C_SDA_SEL_V
RTC_IO_SAR_I2C_SDA_SEL_S
RTC_IO_SAR_I2C_SCL_SEL
RTC_IO_SAR_I2C_SCL_SEL_V
RTC_IO_SAR_I2C_SCL_SEL_S
RTC_IO_SENSE1_HOLD_V
RTC_IO_SENSE1_HOLD_S
RTC_IO_SENSE1_MUX_SEL_V
RTC_IO_SENSE1_MUX_SEL_S
RTC_IO_SENSE1_FUN_SEL
RTC_IO_SENSE1_FUN_SEL_V
RTC_IO_SENSE1_FUN_SEL_S
RTC_IO_SENSE1_SLP_SEL_V
RTC_IO_SENSE1_SLP_SEL_S
RTC_IO_SENSE1_SLP_IE_V
RTC_IO_SENSE1_SLP_IE_S
RTC_IO_SENSE1_FUN_IE_V
RTC_IO_SENSE1_FUN_IE_S
RTC_IO_SENSE2_HOLD_V
RTC_IO_SENSE2_HOLD_S
RTC_IO_SENSE2_MUX_SEL_V
RTC_IO_SENSE2_MUX_SEL_S
RTC_IO_SENSE2_FUN_SEL
RTC_IO_SENSE2_FUN_SEL_V
RTC_IO_SENSE2_FUN_SEL_S
RTC_IO_SENSE2_SLP_SEL_V
RTC_IO_SENSE2_SLP_SEL_S
RTC_IO_SENSE2_SLP_IE_V
RTC_IO_SENSE2_SLP_IE_S
RTC_IO_SENSE2_FUN_IE_V
RTC_IO_SENSE2_FUN_IE_S
RTC_IO_SENSE3_HOLD_V
RTC_IO_SENSE3_HOLD_S
RTC_IO_SENSE3_MUX_SEL_V
RTC_IO_SENSE3_MUX_SEL_S
RTC_IO_SENSE3_FUN_SEL
RTC_IO_SENSE3_FUN_SEL_V
RTC_IO_SENSE3_FUN_SEL_S
RTC_IO_SENSE3_SLP_SEL_V
RTC_IO_SENSE3_SLP_SEL_S
RTC_IO_SENSE3_SLP_IE_V
RTC_IO_SENSE3_SLP_IE_S
RTC_IO_SENSE3_FUN_IE_V
RTC_IO_SENSE3_FUN_IE_S
RTC_IO_SENSE4_HOLD_V
RTC_IO_SENSE4_HOLD_S
RTC_IO_SENSE4_MUX_SEL_V
RTC_IO_SENSE4_MUX_SEL_S
RTC_IO_SENSE4_FUN_SEL
RTC_IO_SENSE4_FUN_SEL_V
RTC_IO_SENSE4_FUN_SEL_S
RTC_IO_SENSE4_SLP_SEL_V
RTC_IO_SENSE4_SLP_SEL_S
RTC_IO_SENSE4_SLP_IE_V
RTC_IO_SENSE4_SLP_IE_S
RTC_IO_SENSE4_FUN_IE_V
RTC_IO_SENSE4_FUN_IE_S
RTC_IO_SENSOR_PADS_REG
RTC_IO_TOUCH_CFG_REG
RTC_IO_TOUCH_DCUR
RTC_IO_TOUCH_DCUR_S
RTC_IO_TOUCH_DCUR_V
RTC_IO_TOUCH_DRANGE
RTC_IO_TOUCH_DRANGE_S
RTC_IO_TOUCH_DRANGE_V
RTC_IO_TOUCH_DREFH
RTC_IO_TOUCH_DREFH_S
RTC_IO_TOUCH_DREFH_V
RTC_IO_TOUCH_DREFL
RTC_IO_TOUCH_DREFL_S
RTC_IO_TOUCH_DREFL_V
RTC_IO_TOUCH_PAD0_REG
RTC_IO_TOUCH_PAD0_DRV
RTC_IO_TOUCH_PAD0_DAC
RTC_IO_TOUCH_PAD0_DRV_V
RTC_IO_TOUCH_PAD0_DRV_S
RTC_IO_TOUCH_PAD0_RDE_V
RTC_IO_TOUCH_PAD0_RDE_S
RTC_IO_TOUCH_PAD0_RUE_V
RTC_IO_TOUCH_PAD0_RUE_S
RTC_IO_TOUCH_PAD0_DAC_V
RTC_IO_TOUCH_PAD0_DAC_S
RTC_IO_TOUCH_PAD0_XPD_V
RTC_IO_TOUCH_PAD0_XPD_S
RTC_IO_TOUCH_PAD0_HOLD_V
RTC_IO_TOUCH_PAD0_HOLD_S
RTC_IO_TOUCH_PAD0_START_V
RTC_IO_TOUCH_PAD0_START_S
RTC_IO_TOUCH_PAD0_FUN_SEL
RTC_IO_TOUCH_PAD0_SLP_IE_V
RTC_IO_TOUCH_PAD0_SLP_IE_S
RTC_IO_TOUCH_PAD0_SLP_OE_V
RTC_IO_TOUCH_PAD0_SLP_OE_S
RTC_IO_TOUCH_PAD0_FUN_IE_V
RTC_IO_TOUCH_PAD0_FUN_IE_S
RTC_IO_TOUCH_PAD0_TIE_OPT_V
RTC_IO_TOUCH_PAD0_TIE_OPT_S
RTC_IO_TOUCH_PAD0_MUX_SEL_V
RTC_IO_TOUCH_PAD0_MUX_SEL_S
RTC_IO_TOUCH_PAD0_FUN_SEL_V
RTC_IO_TOUCH_PAD0_FUN_SEL_S
RTC_IO_TOUCH_PAD0_SLP_SEL_V
RTC_IO_TOUCH_PAD0_SLP_SEL_S
RTC_IO_TOUCH_PAD0_TO_GPIO_V
RTC_IO_TOUCH_PAD0_TO_GPIO_S
RTC_IO_TOUCH_PAD1_REG
RTC_IO_TOUCH_PAD1_HOLD_V
RTC_IO_TOUCH_PAD1_HOLD_S
RTC_IO_TOUCH_PAD1_DRV
RTC_IO_TOUCH_PAD1_DRV_V
RTC_IO_TOUCH_PAD1_DRV_S
RTC_IO_TOUCH_PAD1_RDE_V
RTC_IO_TOUCH_PAD1_RDE_S
RTC_IO_TOUCH_PAD1_RUE_V
RTC_IO_TOUCH_PAD1_RUE_S
RTC_IO_TOUCH_PAD1_DAC
RTC_IO_TOUCH_PAD1_DAC_V
RTC_IO_TOUCH_PAD1_DAC_S
RTC_IO_TOUCH_PAD1_START_V
RTC_IO_TOUCH_PAD1_START_S
RTC_IO_TOUCH_PAD1_TIE_OPT_V
RTC_IO_TOUCH_PAD1_TIE_OPT_S
RTC_IO_TOUCH_PAD1_XPD_V
RTC_IO_TOUCH_PAD1_XPD_S
RTC_IO_TOUCH_PAD1_MUX_SEL_V
RTC_IO_TOUCH_PAD1_MUX_SEL_S
RTC_IO_TOUCH_PAD1_FUN_SEL
RTC_IO_TOUCH_PAD1_FUN_SEL_V
RTC_IO_TOUCH_PAD1_FUN_SEL_S
RTC_IO_TOUCH_PAD1_SLP_SEL_V
RTC_IO_TOUCH_PAD1_SLP_SEL_S
RTC_IO_TOUCH_PAD1_SLP_IE_V
RTC_IO_TOUCH_PAD1_SLP_IE_S
RTC_IO_TOUCH_PAD1_SLP_OE_V
RTC_IO_TOUCH_PAD1_SLP_OE_S
RTC_IO_TOUCH_PAD1_FUN_IE_V
RTC_IO_TOUCH_PAD1_FUN_IE_S
RTC_IO_TOUCH_PAD1_TO_GPIO_V
RTC_IO_TOUCH_PAD1_TO_GPIO_S
RTC_IO_TOUCH_PAD2_REG
RTC_IO_TOUCH_PAD2_HOLD_V
RTC_IO_TOUCH_PAD2_HOLD_S
RTC_IO_TOUCH_PAD2_DRV
RTC_IO_TOUCH_PAD2_DRV_V
RTC_IO_TOUCH_PAD2_DRV_S
RTC_IO_TOUCH_PAD2_RDE_V
RTC_IO_TOUCH_PAD2_RDE_S
RTC_IO_TOUCH_PAD2_RUE_V
RTC_IO_TOUCH_PAD2_RUE_S
RTC_IO_TOUCH_PAD2_DAC
RTC_IO_TOUCH_PAD2_DAC_V
RTC_IO_TOUCH_PAD2_DAC_S
RTC_IO_TOUCH_PAD2_START_V
RTC_IO_TOUCH_PAD2_START_S
RTC_IO_TOUCH_PAD2_TIE_OPT_V
RTC_IO_TOUCH_PAD2_TIE_OPT_S
RTC_IO_TOUCH_PAD2_XPD_V
RTC_IO_TOUCH_PAD2_XPD_S
RTC_IO_TOUCH_PAD2_MUX_SEL_V
RTC_IO_TOUCH_PAD2_MUX_SEL_S
RTC_IO_TOUCH_PAD2_FUN_SEL
RTC_IO_TOUCH_PAD2_FUN_SEL_V
RTC_IO_TOUCH_PAD2_FUN_SEL_S
RTC_IO_TOUCH_PAD2_SLP_SEL_V
RTC_IO_TOUCH_PAD2_SLP_SEL_S
RTC_IO_TOUCH_PAD2_SLP_IE_V
RTC_IO_TOUCH_PAD2_SLP_IE_S
RTC_IO_TOUCH_PAD2_SLP_OE_V
RTC_IO_TOUCH_PAD2_SLP_OE_S
RTC_IO_TOUCH_PAD2_FUN_IE_V
RTC_IO_TOUCH_PAD2_FUN_IE_S
RTC_IO_TOUCH_PAD2_TO_GPIO_V
RTC_IO_TOUCH_PAD2_TO_GPIO_S
RTC_IO_TOUCH_PAD3_REG
RTC_IO_TOUCH_PAD3_HOLD_V
RTC_IO_TOUCH_PAD3_HOLD_S
RTC_IO_TOUCH_PAD3_DRV
RTC_IO_TOUCH_PAD3_DRV_V
RTC_IO_TOUCH_PAD3_DRV_S
RTC_IO_TOUCH_PAD3_RDE_V
RTC_IO_TOUCH_PAD3_RDE_S
RTC_IO_TOUCH_PAD3_RUE_V
RTC_IO_TOUCH_PAD3_RUE_S
RTC_IO_TOUCH_PAD3_DAC
RTC_IO_TOUCH_PAD3_DAC_V
RTC_IO_TOUCH_PAD3_DAC_S
RTC_IO_TOUCH_PAD3_START_V
RTC_IO_TOUCH_PAD3_START_S
RTC_IO_TOUCH_PAD3_TIE_OPT_V
RTC_IO_TOUCH_PAD3_TIE_OPT_S
RTC_IO_TOUCH_PAD3_XPD_V
RTC_IO_TOUCH_PAD3_XPD_S
RTC_IO_TOUCH_PAD3_MUX_SEL_V
RTC_IO_TOUCH_PAD3_MUX_SEL_S
RTC_IO_TOUCH_PAD3_FUN_SEL
RTC_IO_TOUCH_PAD3_FUN_SEL_V
RTC_IO_TOUCH_PAD3_FUN_SEL_S
RTC_IO_TOUCH_PAD3_SLP_SEL_V
RTC_IO_TOUCH_PAD3_SLP_SEL_S
RTC_IO_TOUCH_PAD3_SLP_IE_V
RTC_IO_TOUCH_PAD3_SLP_IE_S
RTC_IO_TOUCH_PAD3_SLP_OE_V
RTC_IO_TOUCH_PAD3_SLP_OE_S
RTC_IO_TOUCH_PAD3_FUN_IE_V
RTC_IO_TOUCH_PAD3_FUN_IE_S
RTC_IO_TOUCH_PAD3_TO_GPIO_V
RTC_IO_TOUCH_PAD3_TO_GPIO_S
RTC_IO_TOUCH_PAD4_REG
RTC_IO_TOUCH_PAD4_HOLD_V
RTC_IO_TOUCH_PAD4_HOLD_S
RTC_IO_TOUCH_PAD4_DRV
RTC_IO_TOUCH_PAD4_DRV_V
RTC_IO_TOUCH_PAD4_DRV_S
RTC_IO_TOUCH_PAD4_RDE_V
RTC_IO_TOUCH_PAD4_RDE_S
RTC_IO_TOUCH_PAD4_RUE_V
RTC_IO_TOUCH_PAD4_RUE_S
RTC_IO_TOUCH_PAD4_DAC
RTC_IO_TOUCH_PAD4_DAC_V
RTC_IO_TOUCH_PAD4_DAC_S
RTC_IO_TOUCH_PAD4_START_V
RTC_IO_TOUCH_PAD4_START_S
RTC_IO_TOUCH_PAD4_TIE_OPT_V
RTC_IO_TOUCH_PAD4_TIE_OPT_S
RTC_IO_TOUCH_PAD4_XPD_V
RTC_IO_TOUCH_PAD4_XPD_S
RTC_IO_TOUCH_PAD4_MUX_SEL_V
RTC_IO_TOUCH_PAD4_MUX_SEL_S
RTC_IO_TOUCH_PAD4_FUN_SEL
RTC_IO_TOUCH_PAD4_FUN_SEL_V
RTC_IO_TOUCH_PAD4_FUN_SEL_S
RTC_IO_TOUCH_PAD4_SLP_SEL_V
RTC_IO_TOUCH_PAD4_SLP_SEL_S
RTC_IO_TOUCH_PAD4_SLP_IE_V
RTC_IO_TOUCH_PAD4_SLP_IE_S
RTC_IO_TOUCH_PAD4_SLP_OE_V
RTC_IO_TOUCH_PAD4_SLP_OE_S
RTC_IO_TOUCH_PAD4_FUN_IE_V
RTC_IO_TOUCH_PAD4_FUN_IE_S
RTC_IO_TOUCH_PAD4_TO_GPIO_V
RTC_IO_TOUCH_PAD4_TO_GPIO_S
RTC_IO_TOUCH_PAD5_REG
RTC_IO_TOUCH_PAD5_HOLD_V
RTC_IO_TOUCH_PAD5_HOLD_S
RTC_IO_TOUCH_PAD5_DRV
RTC_IO_TOUCH_PAD5_DRV_V
RTC_IO_TOUCH_PAD5_DRV_S
RTC_IO_TOUCH_PAD5_RDE_V
RTC_IO_TOUCH_PAD5_RDE_S
RTC_IO_TOUCH_PAD5_RUE_V
RTC_IO_TOUCH_PAD5_RUE_S
RTC_IO_TOUCH_PAD5_DAC
RTC_IO_TOUCH_PAD5_DAC_V
RTC_IO_TOUCH_PAD5_DAC_S
RTC_IO_TOUCH_PAD5_START_V
RTC_IO_TOUCH_PAD5_START_S
RTC_IO_TOUCH_PAD5_TIE_OPT_V
RTC_IO_TOUCH_PAD5_TIE_OPT_S
RTC_IO_TOUCH_PAD5_XPD_V
RTC_IO_TOUCH_PAD5_XPD_S
RTC_IO_TOUCH_PAD5_MUX_SEL_V
RTC_IO_TOUCH_PAD5_MUX_SEL_S
RTC_IO_TOUCH_PAD5_FUN_SEL
RTC_IO_TOUCH_PAD5_FUN_SEL_V
RTC_IO_TOUCH_PAD5_FUN_SEL_S
RTC_IO_TOUCH_PAD5_SLP_SEL_V
RTC_IO_TOUCH_PAD5_SLP_SEL_S
RTC_IO_TOUCH_PAD5_SLP_IE_V
RTC_IO_TOUCH_PAD5_SLP_IE_S
RTC_IO_TOUCH_PAD5_SLP_OE_V
RTC_IO_TOUCH_PAD5_SLP_OE_S
RTC_IO_TOUCH_PAD5_FUN_IE_V
RTC_IO_TOUCH_PAD5_FUN_IE_S
RTC_IO_TOUCH_PAD5_TO_GPIO_V
RTC_IO_TOUCH_PAD5_TO_GPIO_S
RTC_IO_TOUCH_PAD6_REG
RTC_IO_TOUCH_PAD6_HOLD_V
RTC_IO_TOUCH_PAD6_HOLD_S
RTC_IO_TOUCH_PAD6_DRV
RTC_IO_TOUCH_PAD6_DRV_V
RTC_IO_TOUCH_PAD6_DRV_S
RTC_IO_TOUCH_PAD6_RDE_V
RTC_IO_TOUCH_PAD6_RDE_S
RTC_IO_TOUCH_PAD6_RUE_V
RTC_IO_TOUCH_PAD6_RUE_S
RTC_IO_TOUCH_PAD6_DAC
RTC_IO_TOUCH_PAD6_DAC_V
RTC_IO_TOUCH_PAD6_DAC_S
RTC_IO_TOUCH_PAD6_START_V
RTC_IO_TOUCH_PAD6_START_S
RTC_IO_TOUCH_PAD6_TIE_OPT_V
RTC_IO_TOUCH_PAD6_TIE_OPT_S
RTC_IO_TOUCH_PAD6_XPD_V
RTC_IO_TOUCH_PAD6_XPD_S
RTC_IO_TOUCH_PAD6_MUX_SEL_V
RTC_IO_TOUCH_PAD6_MUX_SEL_S
RTC_IO_TOUCH_PAD6_FUN_SEL
RTC_IO_TOUCH_PAD6_FUN_SEL_V
RTC_IO_TOUCH_PAD6_FUN_SEL_S
RTC_IO_TOUCH_PAD6_SLP_SEL_V
RTC_IO_TOUCH_PAD6_SLP_SEL_S
RTC_IO_TOUCH_PAD6_SLP_IE_V
RTC_IO_TOUCH_PAD6_SLP_IE_S
RTC_IO_TOUCH_PAD6_SLP_OE_V
RTC_IO_TOUCH_PAD6_SLP_OE_S
RTC_IO_TOUCH_PAD6_FUN_IE_V
RTC_IO_TOUCH_PAD6_FUN_IE_S
RTC_IO_TOUCH_PAD6_TO_GPIO_V
RTC_IO_TOUCH_PAD6_TO_GPIO_S
RTC_IO_TOUCH_PAD7_REG
RTC_IO_TOUCH_PAD7_HOLD_V
RTC_IO_TOUCH_PAD7_HOLD_S
RTC_IO_TOUCH_PAD7_DRV
RTC_IO_TOUCH_PAD7_DRV_V
RTC_IO_TOUCH_PAD7_DRV_S
RTC_IO_TOUCH_PAD7_RDE_V
RTC_IO_TOUCH_PAD7_RDE_S
RTC_IO_TOUCH_PAD7_RUE_V
RTC_IO_TOUCH_PAD7_RUE_S
RTC_IO_TOUCH_PAD7_DAC
RTC_IO_TOUCH_PAD7_DAC_V
RTC_IO_TOUCH_PAD7_DAC_S
RTC_IO_TOUCH_PAD7_START_V
RTC_IO_TOUCH_PAD7_START_S
RTC_IO_TOUCH_PAD7_TIE_OPT_V
RTC_IO_TOUCH_PAD7_TIE_OPT_S
RTC_IO_TOUCH_PAD7_XPD_V
RTC_IO_TOUCH_PAD7_XPD_S
RTC_IO_TOUCH_PAD7_MUX_SEL_V
RTC_IO_TOUCH_PAD7_MUX_SEL_S
RTC_IO_TOUCH_PAD7_FUN_SEL
RTC_IO_TOUCH_PAD7_FUN_SEL_V
RTC_IO_TOUCH_PAD7_FUN_SEL_S
RTC_IO_TOUCH_PAD7_SLP_SEL_V
RTC_IO_TOUCH_PAD7_SLP_SEL_S
RTC_IO_TOUCH_PAD7_SLP_IE_V
RTC_IO_TOUCH_PAD7_SLP_IE_S
RTC_IO_TOUCH_PAD7_SLP_OE_V
RTC_IO_TOUCH_PAD7_SLP_OE_S
RTC_IO_TOUCH_PAD7_FUN_IE_V
RTC_IO_TOUCH_PAD7_FUN_IE_S
RTC_IO_TOUCH_PAD7_TO_GPIO_V
RTC_IO_TOUCH_PAD7_TO_GPIO_S
RTC_IO_TOUCH_PAD8_REG
RTC_IO_TOUCH_PAD8_DAC
RTC_IO_TOUCH_PAD8_DAC_V
RTC_IO_TOUCH_PAD8_DAC_S
RTC_IO_TOUCH_PAD8_START_V
RTC_IO_TOUCH_PAD8_START_S
RTC_IO_TOUCH_PAD8_TIE_OPT_V
RTC_IO_TOUCH_PAD8_TIE_OPT_S
RTC_IO_TOUCH_PAD8_XPD_V
RTC_IO_TOUCH_PAD8_XPD_S
RTC_IO_TOUCH_PAD8_TO_GPIO_V
RTC_IO_TOUCH_PAD8_TO_GPIO_S
RTC_IO_TOUCH_PAD9_REG
RTC_IO_TOUCH_PAD9_DAC
RTC_IO_TOUCH_PAD9_DAC_V
RTC_IO_TOUCH_PAD9_DAC_S
RTC_IO_TOUCH_PAD9_START_V
RTC_IO_TOUCH_PAD9_START_S
RTC_IO_TOUCH_PAD9_TIE_OPT_V
RTC_IO_TOUCH_PAD9_TIE_OPT_S
RTC_IO_TOUCH_PAD9_XPD_V
RTC_IO_TOUCH_PAD9_XPD_S
RTC_IO_TOUCH_PAD9_TO_GPIO_V
RTC_IO_TOUCH_PAD9_TO_GPIO_S
RTC_IO_TOUCH_XPD_BIAS_S
RTC_IO_TOUCH_XPD_BIAS_V
RTC_IO_X32N_DRV
RTC_IO_X32N_DRV_V
RTC_IO_X32N_DRV_S
RTC_IO_X32N_HOLD_V
RTC_IO_X32N_HOLD_S
RTC_IO_X32N_RDE_V
RTC_IO_X32N_RDE_S
RTC_IO_X32N_RUE_V
RTC_IO_X32N_RUE_S
RTC_IO_X32P_DRV
RTC_IO_X32P_DRV_V
RTC_IO_X32P_DRV_S
RTC_IO_X32P_HOLD_V
RTC_IO_X32P_HOLD_S
RTC_IO_X32P_RDE_V
RTC_IO_X32P_RDE_S
RTC_IO_X32P_RUE_V
RTC_IO_X32P_RUE_S
RTC_IO_X32N_MUX_SEL_V
RTC_IO_X32N_MUX_SEL_S
RTC_IO_X32P_MUX_SEL_V
RTC_IO_X32P_MUX_SEL_S
RTC_IO_X32N_FUN_SEL
RTC_IO_X32N_FUN_SEL_V
RTC_IO_X32N_FUN_SEL_S
RTC_IO_X32N_SLP_SEL_V
RTC_IO_X32N_SLP_SEL_S
RTC_IO_X32N_SLP_IE_V
RTC_IO_X32N_SLP_IE_S
RTC_IO_X32N_SLP_OE_V
RTC_IO_X32N_SLP_OE_S
RTC_IO_X32N_FUN_IE_V
RTC_IO_X32N_FUN_IE_S
RTC_IO_X32P_FUN_SEL
RTC_IO_X32P_FUN_SEL_V
RTC_IO_X32P_FUN_SEL_S
RTC_IO_X32P_SLP_SEL_V
RTC_IO_X32P_SLP_SEL_S
RTC_IO_X32P_SLP_IE_V
RTC_IO_X32P_SLP_IE_S
RTC_IO_X32P_SLP_OE_V
RTC_IO_X32P_SLP_OE_S
RTC_IO_X32P_FUN_IE_V
RTC_IO_X32P_FUN_IE_S
RTC_IO_XPD_HALL_S
RTC_IO_XPD_HALL_V
RTC_IO_XPD_XTAL_32K_V
RTC_IO_XPD_XTAL_32K_S
RTC_IO_XTAL_32K_PAD_REG
RTC_IO_XTL_EXT_CTR_REG
RTC_IO_XTL_EXT_CTR_SEL
RTC_IO_XTL_EXT_CTR_SEL_S
RTC_IO_XTL_EXT_CTR_SEL_V
RTC_MEM_CONF
RTC_MEM_CRC_ADDR
RTC_MEM_CRC_ADDR_S
RTC_MEM_CRC_ADDR_V
RTC_MEM_CRC_FINISH_S
RTC_MEM_CRC_FINISH_V
RTC_MEM_CRC_LEN
RTC_MEM_CRC_LEN_S
RTC_MEM_CRC_LEN_V
RTC_MEM_CRC_RES
RTC_MEM_CRC_START_S
RTC_MEM_CRC_START_V
RTC_MEM_PID_CONF
RTC_MEM_PID_CONF_M
RTC_MEM_PID_CONF_S
RTC_MEM_PID_CONF_V
RTC_VDDSDIO_TIEH_1_8V
RTC_VDDSDIO_TIEH_3_3V
RTC_WDT_RESET_LENGTH_100_NS
RTC_WDT_RESET_LENGTH_200_NS
RTC_WDT_RESET_LENGTH_300_NS
RTC_WDT_RESET_LENGTH_400_NS
RTC_WDT_RESET_LENGTH_500_NS
RTC_WDT_RESET_LENGTH_800_NS
RTC_WDT_RESET_LENGTH_1600_NS
RTC_WDT_RESET_LENGTH_3200_NS
RTC_WDT_STG_SEL_INT
RTC_WDT_STG_SEL_OFF
RTC_WDT_STG_SEL_RESET_CPU
RTC_WDT_STG_SEL_RESET_RTC
RTC_WDT_STG_SEL_RESET_SYSTEM
R_OK
S16_F
S32_F
SAR
SA_NOCLDSTOP
SBT_MAX
SCHED_FIFO
SCHED_OTHER
SCHED_RR
SCOMPARE1
SDIO_TOHOST_INT_OUT_IDX
SEEK_CUR
SEEK_END
SEEK_SET
SHUT_RD
SHUT_RDWR
SHUT_WR
SIGABRT
SIGALRM
SIGBUS
SIGCHLD
SIGCLD
SIGCONT
SIGEMT
SIGEV_NONE
SIGEV_SIGNAL
SIGEV_THREAD
SIGFPE
SIGHUP
SIGILL
SIGINT
SIGIO
SIGIOT
SIGKILL
SIGLOST
SIGPIPE
SIGPOLL
SIGPROF
SIGQUIT
SIGSEGV
SIGSTKSZ
SIGSTOP
SIGSYS
SIGTERM
SIGTRAP
SIGTSTP
SIGTTIN
SIGTTOU
SIGURG
SIGUSR1
SIGUSR2
SIGVTALRM
SIGWINCH
SIGXCPU
SIGXFSZ
SIG_BLOCK
SIG_GPIO_OUT_IDX
SIG_IN_FUNC224_IDX
SIG_IN_FUNC225_IDX
SIG_IN_FUNC226_IDX
SIG_IN_FUNC227_IDX
SIG_IN_FUNC228_IDX
SIG_SETMASK
SIG_UNBLOCK
SIN_ZERO_LEN
SI_ASYNCIO
SI_MESGQ
SI_QUEUE
SI_TIMER
SI_USER
SLIPIF_THREAD_NAME
SLIPIF_THREAD_PRIO
SLIPIF_THREAD_STACKSIZE
SLIP_DEBUG
SLP_DRV
SLP_DRV_S
SLP_DRV_V
SLP_IE_S
SLP_IE_V
SLP_OE_S
SLP_OE_V
SLP_PD_S
SLP_PD_V
SLP_PU_S
SLP_PU_V
SLP_SEL_S
SLP_SEL_V
SNTP_SERVER_DNS
SOCK_DGRAM
SOCK_RAW
SOCK_STREAM
SOC_ADC1_DATA_INVERT_DEFAULT
SOC_ADC2_DATA_INVERT_DEFAULT
SOC_ADC_FSM_RSTB_WAIT_DEFAULT
SOC_ADC_FSM_STANDBY_WAIT_DEFAULT
SOC_ADC_FSM_START_WAIT_DEFAULT
SOC_ADC_MAX_CHANNEL_NUM
SOC_ADC_PATT_LEN_MAX
SOC_ADC_PERIPH_NUM
SOC_ADC_PWDET_CCT_DEFAULT
SOC_BYTE_ACCESSIBLE_HIGH
SOC_BYTE_ACCESSIBLE_LOW
SOC_CACHE_APP_HIGH
SOC_CACHE_APP_LOW
SOC_CACHE_PRO_HIGH
SOC_CACHE_PRO_LOW
SOC_CPU_BREAKPOINTS_NUM
SOC_CPU_WATCHPOINTS_NUM
SOC_CPU_WATCHPOINT_SIZE
SOC_DIRAM_DRAM_HIGH
SOC_DIRAM_DRAM_LOW
SOC_DIRAM_INVERTED
SOC_DIRAM_IRAM_HIGH
SOC_DIRAM_IRAM_LOW
SOC_DMA_HIGH
SOC_DMA_LOW
SOC_DRAM_HIGH
SOC_DRAM_LOW
SOC_DROM_HIGH
SOC_DROM_LOW
SOC_EXTRAM_DATA_HIGH
SOC_EXTRAM_DATA_LOW
SOC_GPIO_PORT
SOC_I2C_NUM
SOC_I2C_FIFO_LEN
SOC_I2S_NUM
SOC_I2S_SUPPORTS_PDM
SOC_I2S_SUPPORTS_DMA_EQUAL
SOC_I2S_SUPPORTS_ADC_DAC
SOC_IRAM_HIGH
SOC_IRAM_LOW
SOC_IROM_HIGH
SOC_IROM_LOW
SOC_IROM_MASK_HIGH
SOC_IROM_MASK_LOW
SOC_MAX_CONTIGUOUS_RAM_SIZE
SOC_MEMORY_TYPE_NO_PRIOS
SOC_MEM_INTERNAL_HIGH
SOC_MEM_INTERNAL_LOW
SOC_PIN_FUNC_RTC_IO
SOC_ROM_STACK_START
SOC_RTC_DATA_HIGH
SOC_RTC_DATA_LOW
SOC_RTC_DRAM_HIGH
SOC_RTC_DRAM_LOW
SOC_RTC_IO_PIN_COUNT
SOC_RTC_IRAM_HIGH
SOC_RTC_IRAM_LOW
SOC_TOUCH_PAD_MEASURE_WAIT
SOC_TOUCH_PAD_THRESHOLD_MAX
SOC_TOUCH_SENSOR_BIT_MASK_MAX
SOC_TOUCH_SENSOR_NUM
SOC_UART_MIN_WAKEUP_THRESH
SOC_UART_NUM
SOL_SOCKET
SO_ACCEPTCONN
SO_BINDTODEVICE
SO_BROADCAST
SO_CONTIMEO
SO_DEBUG
SO_DONTROUTE
SO_ERROR
SO_KEEPALIVE
SO_LINGER
SO_NO_CHECK
SO_OOBINLINE
SO_RCVBUF
SO_RCVLOWAT
SO_RCVTIMEO
SO_REUSE
SO_REUSEADDR
SO_REUSEPORT
SO_REUSE_RXTOALL
SO_SNDBUF
SO_SNDLOWAT
SO_SNDTIMEO
SO_TYPE
SO_USELOOPBACK
SPICLK_IN_IDX
SPICLK_OUT_IDX
SPICS0_IN_IDX
SPICS0_OUT_IDX
SPICS1_IN_IDX
SPICS1_OUT_IDX
SPICS2_IN_IDX
SPICS2_OUT_IDX
SPID4_IN_IDX
SPID4_OUT_IDX
SPID5_IN_IDX
SPID5_OUT_IDX
SPID6_IN_IDX
SPID6_OUT_IDX
SPID7_IN_IDX
SPID7_OUT_IDX
SPID_IN_IDX
SPID_OUT_IDX
SPIHD_IN_IDX
SPIHD_OUT_IDX
SPINLOCK_FREE
SPINLOCK_NO_WAIT
SPINLOCK_WAIT_FOREVER
SPIQ_IN_IDX
SPIQ_OUT_IDX
SPIWP_IN_IDX
SPIWP_OUT_IDX
SPI_CLK_DIV
SPI_CLK_GPIO_NUM
SPI_CS0_GPIO_NUM
SPI_D_GPIO_NUM
SPI_FLASH_MMU_PAGE_SIZE
SPI_FLASH_SEC_SIZE
SPI_HD_GPIO_NUM
SPI_Q_GPIO_NUM
SPI_WP_GPIO_NUM
SS_DISABLE
SS_ONSTACK
STDERR_FILENO
STDIN_FILENO
STDOUT_FILENO
STK_INTEXC_EXTRA
SYS_DEBUG
SYS_LIGHTWEIGHT_PROT
SYS_STATS
S_BLKSIZE
S_ENFMT
S_IEXEC
S_IFBLK
S_IFCHR
S_IFDIR
S_IFIFO
S_IFLNK
S_IFMT
S_IFREG
S_IFSOCK
S_IREAD
S_IRGRP
S_IROTH
S_IRUSR
S_ISGID
S_ISUID
S_ISVTX
S_IWGRP
S_IWOTH
S_IWRITE
S_IWUSR
S_IXGRP
S_IXOTH
S_IXUSR
TASK_EXTRA_STACK_SIZE
TCPIP_THREAD_NAME
TCPIP_THREAD_PRIO
TCP_CALCULATE_EFF_SEND_MSS
TCP_CWND_DEBUG
TCP_DEFAULT_LISTEN_BACKLOG
TCP_FR_DEBUG
TCP_KEEPALIVE
TCP_KEEPCNT
TCP_KEEPIDLE
TCP_KEEPINTVL
TCP_LISTEN_BACKLOG
TCP_NODELAY
TCP_OOSEQ_MAX_BYTES
TCP_OOSEQ_MAX_PBUFS
TCP_QLEN_DEBUG
TCP_RCV_SCALE
TCP_RST_DEBUG
TCP_RTO_DEBUG
TCP_STATS
TCP_TTL
TCP_WND_DEBUG
TICKS_PER_US_ROM
TIMERS_DEBUG
TIMER_ABSTIME
TIMER_CLK_FREQ
TMP_MAX
TOUCH_PAD_BIT_MASK_MAX
TOUCH_PAD_MEASURE_CYCLE_DEFAULT
TOUCH_PAD_SLEEP_CYCLE_DEFAULT
TOUCH_PAD_THRESHOLD_MAX
TRY_AGAIN
TWO_UNIVERSAL_MAC_ADDR
U0RXD_IN_IDX
U0CTS_IN_IDX
U0DSR_IN_IDX
U0TXD_OUT_IDX
U0RTS_OUT_IDX
U0DTR_OUT_IDX
U1RXD_IN_IDX
U1TXD_OUT_IDX
U1CTS_IN_IDX
U1RTS_OUT_IDX
U2RXD_IN_IDX
U2TXD_OUT_IDX
U2CTS_IN_IDX
U2RTS_OUT_IDX
U16_F
U32_F
UART_BITRATE_MAX
UART_CLK_FREQ
UART_FIFO_LEN
UART_INTR_MASK
UART_NUM_0
UART_NUM_1
UART_NUM_2
UART_NUM_MAX
UART_PIN_NO_CHANGE
UDP_DEBUG
UDP_STATS
UDP_TTL
VECBASE
VSPICLK_IN_IDX
VSPICLK_OUT_IDX
VSPICS0_IN_IDX
VSPICS0_OUT_IDX
VSPICS1_IN_IDX
VSPICS1_OUT_IDX
VSPICS2_IN_IDX
VSPICS2_OUT_IDX
VSPID4_IN_IDX
VSPID4_OUT_IDX
VSPID5_IN_IDX
VSPID5_OUT_IDX
VSPID6_IN_IDX
VSPID6_OUT_IDX
VSPID7_IN_IDX
VSPID7_OUT_IDX
VSPID_IN_IDX
VSPID_OUT_IDX
VSPIHD_IN_IDX
VSPIHD_OUT_IDX
VSPIQ_IN_IDX
VSPIQ_OUT_IDX
VSPIWP_IN_IDX
VSPIWP_OUT_IDX
WDT_CLK_FREQ
WIFI_AMPDU_RX_ENABLED
WIFI_AMPDU_TX_ENABLED
WIFI_CSI_ENABLED
WIFI_DEFAULT_RX_BA_WIN
WIFI_DEFAULT_TX_BA_WIN
WIFI_DYNAMIC_TX_BUFFER_NUM
WIFI_EVENT_MASK_ALL
WIFI_EVENT_MASK_NONE
WIFI_INIT_CONFIG_MAGIC
WIFI_MGMT_SBUF_NUM
WIFI_NANO_FORMAT_ENABLED
WIFI_NVS_ENABLED
WIFI_PROMIS_CTRL_FILTER_MASK_ACK
WIFI_PROMIS_CTRL_FILTER_MASK_ALL
WIFI_PROMIS_CTRL_FILTER_MASK_BA
WIFI_PROMIS_CTRL_FILTER_MASK_BAR
WIFI_PROMIS_CTRL_FILTER_MASK_CFEND
WIFI_PROMIS_CTRL_FILTER_MASK_CFENDACK
WIFI_PROMIS_CTRL_FILTER_MASK_CTS
WIFI_PROMIS_CTRL_FILTER_MASK_PSPOLL
WIFI_PROMIS_CTRL_FILTER_MASK_RTS
WIFI_PROMIS_CTRL_FILTER_MASK_WRAPPER
WIFI_PROMIS_FILTER_MASK_ALL
WIFI_PROMIS_FILTER_MASK_CTRL
WIFI_PROMIS_FILTER_MASK_DATA
WIFI_PROMIS_FILTER_MASK_DATA_AMPDU
WIFI_PROMIS_FILTER_MASK_DATA_MPDU
WIFI_PROMIS_FILTER_MASK_MGMT
WIFI_PROMIS_FILTER_MASK_MISC
WIFI_PROTOCOL_11B
WIFI_PROTOCOL_11G
WIFI_PROTOCOL_11N
WIFI_PROTOCOL_LR
WIFI_SOFTAP_BEACON_MAX_LEN
WIFI_STATIC_TX_BUFFER_NUM
WIFI_TASK_CORE_ID
WIFI_VENDOR_IE_ELEMENT_ID
WINDOWBASE
WINDOWSTART
WINT_MIN
W_OK
X8_F
X16_F
X32_F
XCHAL_ADDRESS_MISALIGNED
XCHAL_ALIGN_MAX
XCHAL_BUILD_UNIQUE_ID
XCHAL_CACHE_LINESIZE_MAX
XCHAL_CACHE_LINEWIDTH_MAX
XCHAL_CACHE_MEMCTL_DEFAULT
XCHAL_CACHE_PREFCTL_DEFAULT
XCHAL_CACHE_SETSIZE_MAX
XCHAL_CACHE_SETWIDTH_MAX
XCHAL_CA_BITS
XCHAL_CA_BYPASS
XCHAL_CA_BYPASSBUF
XCHAL_CA_BYPASS_RW
XCHAL_CA_ILLEGAL
XCHAL_CA_ISOLATE
XCHAL_CA_WRITEBACK
XCHAL_CA_WRITEBACK_NOALLOC
XCHAL_CA_WRITEBACK_NOALLOC_RW
XCHAL_CA_WRITEBACK_RW
XCHAL_CA_WRITETHRU
XCHAL_CA_WRITETHRU_RW
XCHAL_CLOCK_GATING_FUNCUNIT
XCHAL_CLOCK_GATING_GLOBAL
XCHAL_CORE_ID
XCHAL_CP0_NAME
XCHAL_CP0_SA_NUM
XCHAL_CP0_SA_SIZE
XCHAL_CP0_SA_ALIGN
XCHAL_CP1_SA_SIZE
XCHAL_CP1_SA_ALIGN
XCHAL_CP1_SA_NUM
XCHAL_CP1_NAME
XCHAL_CP1_SA_CONTENTS_LIBDB_NUM
XCHAL_CP2_SA_SIZE
XCHAL_CP2_SA_ALIGN
XCHAL_CP2_SA_NUM
XCHAL_CP2_NAME
XCHAL_CP2_SA_CONTENTS_LIBDB_NUM
XCHAL_CP3_SA_SIZE
XCHAL_CP3_SA_ALIGN
XCHAL_CP3_SA_NUM
XCHAL_CP3_NAME
XCHAL_CP3_SA_CONTENTS_LIBDB_NUM
XCHAL_CP4_SA_SIZE
XCHAL_CP4_SA_ALIGN
XCHAL_CP4_SA_NUM
XCHAL_CP4_NAME
XCHAL_CP4_SA_CONTENTS_LIBDB_NUM
XCHAL_CP5_SA_SIZE
XCHAL_CP5_SA_ALIGN
XCHAL_CP5_SA_NUM
XCHAL_CP5_NAME
XCHAL_CP5_SA_CONTENTS_LIBDB_NUM
XCHAL_CP6_SA_SIZE
XCHAL_CP6_SA_ALIGN
XCHAL_CP6_SA_NUM
XCHAL_CP6_NAME
XCHAL_CP6_SA_CONTENTS_LIBDB_NUM
XCHAL_CP7_SA_SIZE
XCHAL_CP7_SA_ALIGN
XCHAL_CP7_SA_NUM
XCHAL_CP7_NAME
XCHAL_CP7_SA_CONTENTS_LIBDB_NUM
XCHAL_CPEXTRA_SA_ALIGN
XCHAL_CPEXTRA_SA_SIZE
XCHAL_CPEXTRA_SA_SIZE_TOR2
XCHAL_CP_ID_FPU
XCHAL_CP_MASK
XCHAL_CP_MAX
XCHAL_CP_MAXCFG
XCHAL_CP_NUM
XCHAL_CP_PORT_MASK
XCHAL_DATARAM0_SIZE
XCHAL_DATARAM0_VADDR
XCHAL_DATARAM0_PADDR
XCHAL_DATARAM0_BANKS
XCHAL_DATARAM0_ECC_PARITY
XCHAL_DATARAM1_VADDR
XCHAL_DATARAM1_PADDR
XCHAL_DATARAM1_SIZE
XCHAL_DATARAM1_ECC_PARITY
XCHAL_DATARAM1_BANKS
XCHAL_DATAROM0_SIZE
XCHAL_DATAROM0_VADDR
XCHAL_DATAROM0_PADDR
XCHAL_DATAROM0_BANKS
XCHAL_DATAROM0_ECC_PARITY
XCHAL_DATA_PIPE_DELAY
XCHAL_DATA_WIDTH
XCHAL_DBREAKC_LOADBREAK_BITS
XCHAL_DBREAKC_LOADBREAK_MASK
XCHAL_DBREAKC_LOADBREAK_NUM
XCHAL_DBREAKC_LOADBREAK_SHIFT
XCHAL_DBREAKC_MASK_BITS
XCHAL_DBREAKC_MASK_MASK
XCHAL_DBREAKC_MASK_NUM
XCHAL_DBREAKC_MASK_SHIFT
XCHAL_DBREAKC_STOREBREAK_BITS
XCHAL_DBREAKC_STOREBREAK_MASK
XCHAL_DBREAKC_STOREBREAK_NUM
XCHAL_DBREAKC_STOREBREAK_SHIFT
XCHAL_DBREAKC_VALIDMASK
XCHAL_DCACHE_ACCESS_SIZE
XCHAL_DCACHE_BANKS
XCHAL_DCACHE_ECC_PARITY
XCHAL_DCACHE_IS_COHERENT
XCHAL_DCACHE_IS_WRITEBACK
XCHAL_DCACHE_LINESIZE
XCHAL_DCACHE_LINEWIDTH
XCHAL_DCACHE_LINE_LOCKABLE
XCHAL_DCACHE_SETSIZE
XCHAL_DCACHE_SETWIDTH
XCHAL_DCACHE_SIZE
XCHAL_DCACHE_TAG_D
XCHAL_DCACHE_TAG_D_SHIFT
XCHAL_DCACHE_TAG_F
XCHAL_DCACHE_TAG_F_SHIFT
XCHAL_DCACHE_TAG_L
XCHAL_DCACHE_TAG_L_SHIFT
XCHAL_DCACHE_TAG_V
XCHAL_DCACHE_TAG_V_SHIFT
XCHAL_DCACHE_WAYS
XCHAL_DEBUGCAUSE_BREAKN_BITS
XCHAL_DEBUGCAUSE_BREAKN_MASK
XCHAL_DEBUGCAUSE_BREAKN_NUM
XCHAL_DEBUGCAUSE_BREAKN_SHIFT
XCHAL_DEBUGCAUSE_BREAK_BITS
XCHAL_DEBUGCAUSE_BREAK_MASK
XCHAL_DEBUGCAUSE_BREAK_NUM
XCHAL_DEBUGCAUSE_BREAK_SHIFT
XCHAL_DEBUGCAUSE_DBREAK_BITS
XCHAL_DEBUGCAUSE_DBREAK_MASK
XCHAL_DEBUGCAUSE_DBREAK_NUM
XCHAL_DEBUGCAUSE_DBREAK_SHIFT
XCHAL_DEBUGCAUSE_DEBUGINT_BITS
XCHAL_DEBUGCAUSE_DEBUGINT_MASK
XCHAL_DEBUGCAUSE_DEBUGINT_NUM
XCHAL_DEBUGCAUSE_DEBUGINT_SHIFT
XCHAL_DEBUGCAUSE_IBREAK_BITS
XCHAL_DEBUGCAUSE_IBREAK_MASK
XCHAL_DEBUGCAUSE_IBREAK_NUM
XCHAL_DEBUGCAUSE_IBREAK_SHIFT
XCHAL_DEBUGCAUSE_ICOUNT_BITS
XCHAL_DEBUGCAUSE_ICOUNT_MASK
XCHAL_DEBUGCAUSE_ICOUNT_NUM
XCHAL_DEBUGCAUSE_ICOUNT_SHIFT
XCHAL_DEBUGCAUSE_VALIDMASK
XCHAL_DEBUGLEVEL
XCHAL_DEBUG_VECOFS
XCHAL_DEBUG_VECTOR_PADDR
XCHAL_DEBUG_VECTOR_VADDR
XCHAL_DOUBLEEXC_VECOFS
XCHAL_DOUBLEEXC_VECTOR_PADDR
XCHAL_DOUBLEEXC_VECTOR_VADDR
XCHAL_DRAM0_SIZE
XCHAL_DRAM0_VADDR
XCHAL_DRAM0_PADDR
XCHAL_DRAM1_VADDR
XCHAL_DRAM1_PADDR
XCHAL_DRAM1_SIZE
XCHAL_DROM0_SIZE
XCHAL_DROM0_VADDR
XCHAL_DROM0_PADDR
XCHAL_DTLB_ARF_SETS
XCHAL_DTLB_ARF_WAYS
XCHAL_DTLB_MINWIRED_SETS
XCHAL_DTLB_SET0_WAY
XCHAL_DTLB_SET0_ARF
XCHAL_DTLB_SET0_WAYS
XCHAL_DTLB_SET0_ENTRIES
XCHAL_DTLB_SET0_CA_RESET
XCHAL_DTLB_SET0_PAGESIZES
XCHAL_DTLB_SET0_VPN_RESET
XCHAL_DTLB_SET0_PPN_RESET
XCHAL_DTLB_SET0_ASID_RESET
XCHAL_DTLB_SET0_PAGESZ_BITS
XCHAL_DTLB_SET0_CA_CONSTMASK
XCHAL_DTLB_SET0_VPN_CONSTMASK
XCHAL_DTLB_SET0_PPN_CONSTMASK
XCHAL_DTLB_SET0_ASID_CONSTMASK
XCHAL_DTLB_SET0_E0_CA_RESET
XCHAL_DTLB_SET0_E0_VPN_CONST
XCHAL_DTLB_SET0_E0_PPN_CONST
XCHAL_DTLB_SET0_E1_VPN_CONST
XCHAL_DTLB_SET0_E1_PPN_CONST
XCHAL_DTLB_SET0_E1_CA_RESET
XCHAL_DTLB_SET0_E2_VPN_CONST
XCHAL_DTLB_SET0_E2_PPN_CONST
XCHAL_DTLB_SET0_E2_CA_RESET
XCHAL_DTLB_SET0_E3_VPN_CONST
XCHAL_DTLB_SET0_E3_PPN_CONST
XCHAL_DTLB_SET0_E3_CA_RESET
XCHAL_DTLB_SET0_E4_VPN_CONST
XCHAL_DTLB_SET0_E4_PPN_CONST
XCHAL_DTLB_SET0_E4_CA_RESET
XCHAL_DTLB_SET0_E5_VPN_CONST
XCHAL_DTLB_SET0_E5_PPN_CONST
XCHAL_DTLB_SET0_E5_CA_RESET
XCHAL_DTLB_SET0_E6_VPN_CONST
XCHAL_DTLB_SET0_E6_PPN_CONST
XCHAL_DTLB_SET0_E6_CA_RESET
XCHAL_DTLB_SET0_E7_VPN_CONST
XCHAL_DTLB_SET0_E7_PPN_CONST
XCHAL_DTLB_SET0_E7_CA_RESET
XCHAL_DTLB_SET0_ENTRIES_LOG2
XCHAL_DTLB_SET0_PAGESZ_LOG2_MIN
XCHAL_DTLB_SET0_PAGESZ_LOG2_MAX
XCHAL_DTLB_SET0_PAGESZ_LOG2_LIST
XCHAL_DTLB_SETS
XCHAL_DTLB_WAY0_SET
XCHAL_DTLB_WAYS
XCHAL_DTLB_WAY_BITS
XCHAL_ERRATUM_453
XCHAL_ERRATUM_497
XCHAL_ERRATUM_572
XCHAL_EXCCAUSE_ALLOCA
XCHAL_EXCCAUSE_BITS
XCHAL_EXCCAUSE_COPROCESSOR0_DISABLED
XCHAL_EXCCAUSE_COPROCESSOR1_DISABLED
XCHAL_EXCCAUSE_COPROCESSOR2_DISABLED
XCHAL_EXCCAUSE_COPROCESSOR3_DISABLED
XCHAL_EXCCAUSE_COPROCESSOR4_DISABLED
XCHAL_EXCCAUSE_COPROCESSOR5_DISABLED
XCHAL_EXCCAUSE_COPROCESSOR6_DISABLED
XCHAL_EXCCAUSE_COPROCESSOR7_DISABLED
XCHAL_EXCCAUSE_DTLB_MISS
XCHAL_EXCCAUSE_DTLB_MULTIHIT
XCHAL_EXCCAUSE_DTLB_PRIVILEGE
XCHAL_EXCCAUSE_DTLB_SIZE_RESTRICTION
XCHAL_EXCCAUSE_FETCH_CACHE_ATTRIBUTE
XCHAL_EXCCAUSE_ILLEGAL_INSTRUCTION
XCHAL_EXCCAUSE_INSTRUCTION_FETCH_ERROR
XCHAL_EXCCAUSE_INTEGER_DIVIDE_BY_ZERO
XCHAL_EXCCAUSE_ITLB_MISS
XCHAL_EXCCAUSE_ITLB_MULTIHIT
XCHAL_EXCCAUSE_ITLB_PRIVILEGE
XCHAL_EXCCAUSE_ITLB_SIZE_RESTRICTION
XCHAL_EXCCAUSE_LEVEL1_INTERRUPT
XCHAL_EXCCAUSE_LOAD_CACHE_ATTRIBUTE
XCHAL_EXCCAUSE_LOAD_STORE_ERROR
XCHAL_EXCCAUSE_MASK
XCHAL_EXCCAUSE_NUM
XCHAL_EXCCAUSE_PRIVILEGED
XCHAL_EXCCAUSE_SHIFT
XCHAL_EXCCAUSE_SPECULATION
XCHAL_EXCCAUSE_STORE_CACHE_ATTRIBUTE
XCHAL_EXCCAUSE_SYSTEM_CALL
XCHAL_EXCCAUSE_UNALIGNED
XCHAL_EXCCAUSE_VALIDMASK
XCHAL_EXCM_LEVEL
XCHAL_EXTINT0_NUM
XCHAL_EXTINT0_MASK
XCHAL_EXTINT1_NUM
XCHAL_EXTINT1_MASK
XCHAL_EXTINT2_NUM
XCHAL_EXTINT2_MASK
XCHAL_EXTINT3_NUM
XCHAL_EXTINT3_MASK
XCHAL_EXTINT4_NUM
XCHAL_EXTINT4_MASK
XCHAL_EXTINT5_NUM
XCHAL_EXTINT5_MASK
XCHAL_EXTINT6_NUM
XCHAL_EXTINT6_MASK
XCHAL_EXTINT7_NUM
XCHAL_EXTINT7_MASK
XCHAL_EXTINT8_NUM
XCHAL_EXTINT8_MASK
XCHAL_EXTINT9_NUM
XCHAL_EXTINT9_MASK
XCHAL_EXTINT10_NUM
XCHAL_EXTINT10_MASK
XCHAL_EXTINT11_NUM
XCHAL_EXTINT11_MASK
XCHAL_EXTINT12_NUM
XCHAL_EXTINT12_MASK
XCHAL_EXTINT13_NUM
XCHAL_EXTINT13_MASK
XCHAL_EXTINT14_NUM
XCHAL_EXTINT14_MASK
XCHAL_EXTINT15_NUM
XCHAL_EXTINT15_MASK
XCHAL_EXTINT16_NUM
XCHAL_EXTINT16_MASK
XCHAL_EXTINT17_NUM
XCHAL_EXTINT17_MASK
XCHAL_EXTINT18_NUM
XCHAL_EXTINT18_MASK
XCHAL_EXTINT19_NUM
XCHAL_EXTINT19_MASK
XCHAL_EXTINT20_NUM
XCHAL_EXTINT20_MASK
XCHAL_EXTINT21_NUM
XCHAL_EXTINT21_MASK
XCHAL_EXTINT22_NUM
XCHAL_EXTINT22_MASK
XCHAL_EXTINT23_NUM
XCHAL_EXTINT23_MASK
XCHAL_EXTINT24_NUM
XCHAL_EXTINT24_MASK
XCHAL_EXTINT25_NUM
XCHAL_EXTINT25_MASK
XCHAL_EXTRA_SA_ALIGN
XCHAL_EXTRA_SA_SIZE
XCHAL_FIRST_HIGHPRI_LEVEL
XCHAL_HAVE_ABS
XCHAL_HAVE_ABSOLUTE_LITERALS
XCHAL_HAVE_ADDX
XCHAL_HAVE_AXI
XCHAL_HAVE_BBE16
XCHAL_HAVE_BBE16_RSQRT
XCHAL_HAVE_BBE16_VECDIV
XCHAL_HAVE_BBE16_DESPREAD
XCHAL_HAVE_BBENEP
XCHAL_HAVE_BBP16
XCHAL_HAVE_BE
XCHAL_HAVE_BOOLEANS
XCHAL_HAVE_BOOTLOADER
XCHAL_HAVE_BSP3
XCHAL_HAVE_BSP3_TRANSPOSE
XCHAL_HAVE_CACHEATTR
XCHAL_HAVE_CACHE_BLOCKOPS
XCHAL_HAVE_CALL4AND12
XCHAL_HAVE_CA_WRITEBACK_NOALLOC
XCHAL_HAVE_CCOUNT
XCHAL_HAVE_CLAMPS
XCHAL_HAVE_CONNXD2
XCHAL_HAVE_CONNXD2_DUALLSFLIX
XCHAL_HAVE_CONST16
XCHAL_HAVE_CP
XCHAL_HAVE_DCACHE_DYN_WAYS
XCHAL_HAVE_DCACHE_TEST
XCHAL_HAVE_DEBUG
XCHAL_HAVE_DEBUG_APB
XCHAL_HAVE_DEBUG_ERI
XCHAL_HAVE_DEBUG_EXTERN_INT
XCHAL_HAVE_DEBUG_JTAG
XCHAL_HAVE_DENSITY
XCHAL_HAVE_DEPBITS
XCHAL_HAVE_DFP
XCHAL_HAVE_DFPU_SINGLE_DOUBLE
XCHAL_HAVE_DFPU_SINGLE_ONLY
XCHAL_HAVE_DFP_ACCEL
XCHAL_HAVE_DFP_DIV
XCHAL_HAVE_DFP_RECIP
XCHAL_HAVE_DFP_RSQRT
XCHAL_HAVE_DFP_SQRT
XCHAL_HAVE_DFP_accel
XCHAL_HAVE_DIV32
XCHAL_HAVE_EXCEPTIONS
XCHAL_HAVE_EXCM
XCHAL_HAVE_EXTERN_REGS
XCHAL_HAVE_FLIX3
XCHAL_HAVE_FP
XCHAL_HAVE_FP_DIV
XCHAL_HAVE_FP_RECIP
XCHAL_HAVE_FP_RSQRT
XCHAL_HAVE_FP_SQRT
XCHAL_HAVE_FULL_RESET
XCHAL_HAVE_FUSION
XCHAL_HAVE_FUSION_16BIT_BASEBAND
XCHAL_HAVE_FUSION_AES
XCHAL_HAVE_FUSION_AVS
XCHAL_HAVE_FUSION_BITOPS
XCHAL_HAVE_FUSION_CONVENC
XCHAL_HAVE_FUSION_FP
XCHAL_HAVE_FUSION_LFSR_CRC
XCHAL_HAVE_FUSION_LOW_POWER
XCHAL_HAVE_FUSION_SOFTDEMAP
XCHAL_HAVE_FUSION_VITERBI
XCHAL_HAVE_GRIVPEP
XCHAL_HAVE_GRIVPEP_HISTOGRAM
XCHAL_HAVE_HALT
XCHAL_HAVE_HIFI2
XCHAL_HAVE_HIFI2EP
XCHAL_HAVE_HIFI3
XCHAL_HAVE_HIFI3_VFPU
XCHAL_HAVE_HIFI4
XCHAL_HAVE_HIFI4_VFPU
XCHAL_HAVE_HIFIPRO
XCHAL_HAVE_HIFI_MINI
XCHAL_HAVE_HIGHLEVEL_INTERRUPTS
XCHAL_HAVE_HIGHPRI_INTERRUPTS
XCHAL_HAVE_ICACHE_DYN_WAYS
XCHAL_HAVE_ICACHE_TEST
XCHAL_HAVE_IDENTITY_MAP
XCHAL_HAVE_IMEM_LOADSTORE
XCHAL_HAVE_INTERRUPTS
XCHAL_HAVE_L32R
XCHAL_HAVE_LE
XCHAL_HAVE_LOOPS
XCHAL_HAVE_MAC16
XCHAL_HAVE_MEM_ECC_PARITY
XCHAL_HAVE_MIMIC_CACHEATTR
XCHAL_HAVE_MINMAX
XCHAL_HAVE_MP_INTERRUPTS
XCHAL_HAVE_MP_RUNSTALL
XCHAL_HAVE_MUL16
XCHAL_HAVE_MUL32
XCHAL_HAVE_MUL32_HIGH
XCHAL_HAVE_MX
XCHAL_HAVE_NMI
XCHAL_HAVE_NSA
XCHAL_HAVE_OCD
XCHAL_HAVE_OCD_DIR_ARRAY
XCHAL_HAVE_OCD_LS32DDR
XCHAL_HAVE_OLD_EXC_ARCH
XCHAL_HAVE_PDX4
XCHAL_HAVE_PIF
XCHAL_HAVE_PIF_REQ_ATTR
XCHAL_HAVE_PIF_WR_RESP
XCHAL_HAVE_PREDICTED_BRANCHES
XCHAL_HAVE_PREFETCH
XCHAL_HAVE_PREFETCH_L1
XCHAL_HAVE_PRID
XCHAL_HAVE_PSO
XCHAL_HAVE_PSO_CDM
XCHAL_HAVE_PSO_FULL_RETENTION
XCHAL_HAVE_PTP_MMU
XCHAL_HAVE_RELEASE_SYNC
XCHAL_HAVE_S32C1I
XCHAL_HAVE_SEXT
XCHAL_HAVE_SPANNING_WAY
XCHAL_HAVE_SPECULATION
XCHAL_HAVE_SSP16
XCHAL_HAVE_SSP16_VITERBI
XCHAL_HAVE_TAP_MASTER
XCHAL_HAVE_THREADPTR
XCHAL_HAVE_TLBS
XCHAL_HAVE_TRAX
XCHAL_HAVE_TURBO16
XCHAL_HAVE_USER_DPFPU
XCHAL_HAVE_USER_SPFPU
XCHAL_HAVE_VECBASE
XCHAL_HAVE_VECTORFPU2005
XCHAL_HAVE_VECTOR_SELECT
XCHAL_HAVE_VECTRA1
XCHAL_HAVE_VECTRALX
XCHAL_HAVE_WIDE_BRANCHES
XCHAL_HAVE_WINDOWED
XCHAL_HAVE_XEA1
XCHAL_HAVE_XEA2
XCHAL_HAVE_XEAX
XCHAL_HAVE_XLT_CACHEATTR
XCHAL_HW_CONFIGID0
XCHAL_HW_CONFIGID1
XCHAL_HW_CONFIGID_RELIABLE
XCHAL_HW_MAX_VERSION
XCHAL_HW_MAX_VERSION_MAJOR
XCHAL_HW_MAX_VERSION_MINOR
XCHAL_HW_MIN_VERSION
XCHAL_HW_MIN_VERSION_MAJOR
XCHAL_HW_MIN_VERSION_MINOR
XCHAL_HW_RELEASE_MAJOR
XCHAL_HW_RELEASE_MINOR
XCHAL_HW_RELEASE_NAME
XCHAL_HW_REL_LX6
XCHAL_HW_REL_LX6_0
XCHAL_HW_REL_LX6_0_3
XCHAL_HW_VERSION
XCHAL_HW_VERSION_MAJOR
XCHAL_HW_VERSION_MINOR
XCHAL_HW_VERSION_NAME
XCHAL_ICACHE_ACCESS_SIZE
XCHAL_ICACHE_ECC_PARITY
XCHAL_ICACHE_LINESIZE
XCHAL_ICACHE_LINEWIDTH
XCHAL_ICACHE_LINE_LOCKABLE
XCHAL_ICACHE_SETSIZE
XCHAL_ICACHE_SETWIDTH
XCHAL_ICACHE_SIZE
XCHAL_ICACHE_TAG_F
XCHAL_ICACHE_TAG_F_SHIFT
XCHAL_ICACHE_TAG_L
XCHAL_ICACHE_TAG_L_SHIFT
XCHAL_ICACHE_TAG_V
XCHAL_ICACHE_TAG_V_SHIFT
XCHAL_ICACHE_WAYS
XCHAL_INEXACT
XCHAL_INSTRAM0_SIZE
XCHAL_INSTRAM0_VADDR
XCHAL_INSTRAM0_PADDR
XCHAL_INSTRAM0_ECC_PARITY
XCHAL_INSTRAM1_VADDR
XCHAL_INSTRAM1_PADDR
XCHAL_INSTRAM1_SIZE
XCHAL_INSTRAM1_ECC_PARITY
XCHAL_INSTROM0_SIZE
XCHAL_INSTROM0_VADDR
XCHAL_INSTROM0_PADDR
XCHAL_INSTROM0_ECC_PARITY
XCHAL_INST_FETCH_WIDTH
XCHAL_INST_ILLN
XCHAL_INST_ILLN_BYTE0
XCHAL_INST_ILLN_BYTE1
XCHAL_INT0_LEVEL
XCHAL_INT0_EXTNUM
XCHAL_INT1_LEVEL
XCHAL_INT1_EXTNUM
XCHAL_INT2_LEVEL
XCHAL_INT2_EXTNUM
XCHAL_INT3_LEVEL
XCHAL_INT3_EXTNUM
XCHAL_INT4_LEVEL
XCHAL_INT4_EXTNUM
XCHAL_INT5_LEVEL
XCHAL_INT5_EXTNUM
XCHAL_INT6_LEVEL
XCHAL_INT7_LEVEL
XCHAL_INT8_LEVEL
XCHAL_INT8_EXTNUM
XCHAL_INT9_LEVEL
XCHAL_INT9_EXTNUM
XCHAL_INT10_LEVEL
XCHAL_INT10_EXTNUM
XCHAL_INT11_LEVEL
XCHAL_INT12_LEVEL
XCHAL_INT12_EXTNUM
XCHAL_INT13_LEVEL
XCHAL_INT13_EXTNUM
XCHAL_INT14_LEVEL
XCHAL_INT14_EXTNUM
XCHAL_INT15_LEVEL
XCHAL_INT16_LEVEL
XCHAL_INT17_LEVEL
XCHAL_INT17_EXTNUM
XCHAL_INT18_LEVEL
XCHAL_INT18_EXTNUM
XCHAL_INT19_LEVEL
XCHAL_INT19_EXTNUM
XCHAL_INT20_LEVEL
XCHAL_INT20_EXTNUM
XCHAL_INT21_LEVEL
XCHAL_INT21_EXTNUM
XCHAL_INT22_LEVEL
XCHAL_INT22_EXTNUM
XCHAL_INT23_LEVEL
XCHAL_INT23_EXTNUM
XCHAL_INT24_LEVEL
XCHAL_INT24_EXTNUM
XCHAL_INT25_LEVEL
XCHAL_INT25_EXTNUM
XCHAL_INT26_LEVEL
XCHAL_INT26_EXTNUM
XCHAL_INT27_LEVEL
XCHAL_INT27_EXTNUM
XCHAL_INT28_LEVEL
XCHAL_INT28_EXTNUM
XCHAL_INT29_LEVEL
XCHAL_INT30_LEVEL
XCHAL_INT30_EXTNUM
XCHAL_INT31_LEVEL
XCHAL_INT31_EXTNUM
XCHAL_INTCLEARABLE_MASK
XCHAL_INTLEVEL0_MASK
XCHAL_INTLEVEL0_ANDBELOW_MASK
XCHAL_INTLEVEL1_MASK
XCHAL_INTLEVEL1_ANDBELOW_MASK
XCHAL_INTLEVEL2_MASK
XCHAL_INTLEVEL2_ANDBELOW_MASK
XCHAL_INTLEVEL2_VECOFS
XCHAL_INTLEVEL2_VECTOR_VADDR
XCHAL_INTLEVEL2_VECTOR_PADDR
XCHAL_INTLEVEL3_MASK
XCHAL_INTLEVEL3_ANDBELOW_MASK
XCHAL_INTLEVEL3_VECOFS
XCHAL_INTLEVEL3_VECTOR_VADDR
XCHAL_INTLEVEL3_VECTOR_PADDR
XCHAL_INTLEVEL4_MASK
XCHAL_INTLEVEL4_ANDBELOW_MASK
XCHAL_INTLEVEL4_VECOFS
XCHAL_INTLEVEL4_VECTOR_VADDR
XCHAL_INTLEVEL4_VECTOR_PADDR
XCHAL_INTLEVEL5_MASK
XCHAL_INTLEVEL5_ANDBELOW_MASK
XCHAL_INTLEVEL5_VECOFS
XCHAL_INTLEVEL5_VECTOR_VADDR
XCHAL_INTLEVEL5_VECTOR_PADDR
XCHAL_INTLEVEL6_MASK
XCHAL_INTLEVEL6_ANDBELOW_MASK
XCHAL_INTLEVEL6_VECOFS
XCHAL_INTLEVEL6_VECTOR_VADDR
XCHAL_INTLEVEL6_VECTOR_PADDR
XCHAL_INTLEVEL7_MASK
XCHAL_INTLEVEL7_ANDBELOW_MASK
XCHAL_INTLEVEL7_NUM
XCHAL_INTLEVEL7_VECOFS
XCHAL_INTLEVEL7_VECTOR_VADDR
XCHAL_INTLEVEL7_VECTOR_PADDR
XCHAL_INTLEVEL8_MASK
XCHAL_INTLEVEL8_ANDBELOW_MASK
XCHAL_INTLEVEL9_MASK
XCHAL_INTLEVEL9_ANDBELOW_MASK
XCHAL_INTLEVEL10_MASK
XCHAL_INTLEVEL10_ANDBELOW_MASK
XCHAL_INTLEVEL11_MASK
XCHAL_INTLEVEL11_ANDBELOW_MASK
XCHAL_INTLEVEL12_MASK
XCHAL_INTLEVEL12_ANDBELOW_MASK
XCHAL_INTLEVEL13_MASK
XCHAL_INTLEVEL13_ANDBELOW_MASK
XCHAL_INTLEVEL14_MASK
XCHAL_INTLEVEL14_ANDBELOW_MASK
XCHAL_INTLEVEL15_MASK
XCHAL_INTLEVEL15_ANDBELOW_MASK
XCHAL_INTSETTABLE_MASK
XCHAL_INTTYPE_MASK_EXTERN_EDGE
XCHAL_INTTYPE_MASK_EXTERN_LEVEL
XCHAL_INTTYPE_MASK_NMI
XCHAL_INTTYPE_MASK_PROFILING
XCHAL_INTTYPE_MASK_SOFTWARE
XCHAL_INTTYPE_MASK_TIMER
XCHAL_INTTYPE_MASK_UNCONFIGURED
XCHAL_INTTYPE_MASK_WRITE_ERROR
XCHAL_INVALID_ADDRESS
XCHAL_IRAM0_SIZE
XCHAL_IRAM0_VADDR
XCHAL_IRAM0_PADDR
XCHAL_IRAM1_VADDR
XCHAL_IRAM1_PADDR
XCHAL_IRAM1_SIZE
XCHAL_IROM0_SIZE
XCHAL_IROM0_VADDR
XCHAL_IROM0_PADDR
XCHAL_ITLB_ARF_SETS
XCHAL_ITLB_ARF_WAYS
XCHAL_ITLB_MINWIRED_SETS
XCHAL_ITLB_SET0_WAY
XCHAL_ITLB_SET0_ARF
XCHAL_ITLB_SET0_WAYS
XCHAL_ITLB_SET0_ENTRIES
XCHAL_ITLB_SET0_CA_RESET
XCHAL_ITLB_SET0_PAGESIZES
XCHAL_ITLB_SET0_VPN_RESET
XCHAL_ITLB_SET0_PPN_RESET
XCHAL_ITLB_SET0_ASID_RESET
XCHAL_ITLB_SET0_PAGESZ_BITS
XCHAL_ITLB_SET0_CA_CONSTMASK
XCHAL_ITLB_SET0_VPN_CONSTMASK
XCHAL_ITLB_SET0_PPN_CONSTMASK
XCHAL_ITLB_SET0_ASID_CONSTMASK
XCHAL_ITLB_SET0_E0_CA_RESET
XCHAL_ITLB_SET0_E0_VPN_CONST
XCHAL_ITLB_SET0_E0_PPN_CONST
XCHAL_ITLB_SET0_E1_VPN_CONST
XCHAL_ITLB_SET0_E1_PPN_CONST
XCHAL_ITLB_SET0_E1_CA_RESET
XCHAL_ITLB_SET0_E2_VPN_CONST
XCHAL_ITLB_SET0_E2_PPN_CONST
XCHAL_ITLB_SET0_E2_CA_RESET
XCHAL_ITLB_SET0_E3_VPN_CONST
XCHAL_ITLB_SET0_E3_PPN_CONST
XCHAL_ITLB_SET0_E3_CA_RESET
XCHAL_ITLB_SET0_E4_VPN_CONST
XCHAL_ITLB_SET0_E4_PPN_CONST
XCHAL_ITLB_SET0_E4_CA_RESET
XCHAL_ITLB_SET0_E5_VPN_CONST
XCHAL_ITLB_SET0_E5_PPN_CONST
XCHAL_ITLB_SET0_E5_CA_RESET
XCHAL_ITLB_SET0_E6_VPN_CONST
XCHAL_ITLB_SET0_E6_PPN_CONST
XCHAL_ITLB_SET0_E6_CA_RESET
XCHAL_ITLB_SET0_E7_VPN_CONST
XCHAL_ITLB_SET0_E7_PPN_CONST
XCHAL_ITLB_SET0_E7_CA_RESET
XCHAL_ITLB_SET0_ENTRIES_LOG2
XCHAL_ITLB_SET0_PAGESZ_LOG2_MIN
XCHAL_ITLB_SET0_PAGESZ_LOG2_MAX
XCHAL_ITLB_SET0_PAGESZ_LOG2_LIST
XCHAL_ITLB_SETS
XCHAL_ITLB_WAY0_SET
XCHAL_ITLB_WAYS
XCHAL_ITLB_WAY_BITS
XCHAL_KERNELEXC_VECTOR_PADDR
XCHAL_KERNELEXC_VECTOR_VADDR
XCHAL_KERNEL_VECOFS
XCHAL_KERNEL_VECTOR_PADDR
XCHAL_KERNEL_VECTOR_VADDR
XCHAL_LOOP_BUFFER_SIZE
XCHAL_LOWPRI_MASK
XCHAL_MAX_INSTRUCTION_SIZE
XCHAL_MEMORY_ORDER
XCHAL_MMU_ASID_BITS
XCHAL_MMU_ASID_INVALID
XCHAL_MMU_ASID_KERNEL
XCHAL_MMU_CA_BITS
XCHAL_MMU_MAX_PTE_PAGE_SIZE
XCHAL_MMU_MIN_PTE_PAGE_SIZE
XCHAL_MMU_RINGS
XCHAL_MMU_RING_BITS
XCHAL_MMU_SR_BITS
XCHAL_NCP_SA_ALIGN
XCHAL_NCP_SA_NUM
XCHAL_NCP_SA_SIZE
XCHAL_NMILEVEL
XCHAL_NMI_INTERRUPT
XCHAL_NMI_VECOFS
XCHAL_NMI_VECTOR_PADDR
XCHAL_NMI_VECTOR_VADDR
XCHAL_NO_PAGES_MAPPED
XCHAL_NUM_AREGS
XCHAL_NUM_AREGS_LOG2
XCHAL_NUM_CONTEXTS
XCHAL_NUM_DATARAM
XCHAL_NUM_DATAROM
XCHAL_NUM_DBREAK
XCHAL_NUM_DRAM
XCHAL_NUM_DROM
XCHAL_NUM_EXTINTERRUPTS
XCHAL_NUM_IBREAK
XCHAL_NUM_INSTRAM
XCHAL_NUM_INSTROM
XCHAL_NUM_INTERRUPTS
XCHAL_NUM_INTERRUPTS_LOG2
XCHAL_NUM_INTLEVELS
XCHAL_NUM_IRAM
XCHAL_NUM_IROM
XCHAL_NUM_LOADSTORE_UNITS
XCHAL_NUM_LOWPRI_LEVELS
XCHAL_NUM_MISC_REGS
XCHAL_NUM_PERF_COUNTERS
XCHAL_NUM_TIMERS
XCHAL_NUM_URAM
XCHAL_NUM_WRITEBUFFER_ENTRIES
XCHAL_NUM_XLMI
XCHAL_PREFETCH_BLOCK_ENTRIES
XCHAL_PREFETCH_CASTOUT_LINES
XCHAL_PREFETCH_ENTRIES
XCHAL_PROFILING_INTERRUPT
XCHAL_PROGRAMEXC_VECTOR_PADDR
XCHAL_PROGRAMEXC_VECTOR_VADDR
XCHAL_PS_CALLINC_BITS
XCHAL_PS_CALLINC_MASK
XCHAL_PS_CALLINC_NUM
XCHAL_PS_CALLINC_SHIFT
XCHAL_PS_EXCM_BITS
XCHAL_PS_EXCM_MASK
XCHAL_PS_EXCM_NUM
XCHAL_PS_EXCM_SHIFT
XCHAL_PS_INTLEVEL_BITS
XCHAL_PS_INTLEVEL_MASK
XCHAL_PS_INTLEVEL_NUM
XCHAL_PS_INTLEVEL_SHIFT
XCHAL_PS_OWB_BITS
XCHAL_PS_OWB_MASK
XCHAL_PS_OWB_NUM
XCHAL_PS_OWB_SHIFT
XCHAL_PS_RING_BITS
XCHAL_PS_RING_MASK
XCHAL_PS_RING_NUM
XCHAL_PS_RING_SHIFT
XCHAL_PS_UM_BITS
XCHAL_PS_UM_MASK
XCHAL_PS_UM_NUM
XCHAL_PS_UM_SHIFT
XCHAL_PS_VALIDMASK
XCHAL_PS_WOE_BITS
XCHAL_PS_WOE_MASK
XCHAL_PS_WOE_NUM
XCHAL_PS_WOE_SHIFT
XCHAL_RESET_VECBASE_OVERLAP
XCHAL_RESET_VECTOR0_VADDR
XCHAL_RESET_VECTOR0_PADDR
XCHAL_RESET_VECTOR1_VADDR
XCHAL_RESET_VECTOR1_PADDR
XCHAL_RESET_VECTOR_PADDR
XCHAL_RESET_VECTOR_VADDR
XCHAL_SNOOP_LB_MEMCTL_DEFAULT
XCHAL_SPANNING_WAY
XCHAL_STACKEDEXC_VECTOR_PADDR
XCHAL_STACKEDEXC_VECTOR_VADDR
XCHAL_SUCCESS
XCHAL_SW_VERSION
XCHAL_TIMER0_INTERRUPT
XCHAL_TIMER1_INTERRUPT
XCHAL_TIMER2_INTERRUPT
XCHAL_TOTAL_SA_ALIGN
XCHAL_TOTAL_SA_SIZE
XCHAL_TRAX_ATB_WIDTH
XCHAL_TRAX_MEM_SHAREABLE
XCHAL_TRAX_MEM_SIZE
XCHAL_TRAX_TIME_WIDTH
XCHAL_UNALIGNED_LOAD_EXCEPTION
XCHAL_UNALIGNED_LOAD_HW
XCHAL_UNALIGNED_STORE_EXCEPTION
XCHAL_UNALIGNED_STORE_HW
XCHAL_UNSUPPORTED_ON_THIS_ARCH
XCHAL_USEREXC_VECTOR_PADDR
XCHAL_USEREXC_VECTOR_VADDR
XCHAL_USER_VECOFS
XCHAL_USER_VECTOR_PADDR
XCHAL_USER_VECTOR_VADDR
XCHAL_VECBASE_RESET_PADDR
XCHAL_VECBASE_RESET_VADDR
XCHAL_WINDOW_OF4_VECOFS
XCHAL_WINDOW_OF8_VECOFS
XCHAL_WINDOW_OF12_VECOFS
XCHAL_WINDOW_UF4_VECOFS
XCHAL_WINDOW_UF8_VECOFS
XCHAL_WINDOW_UF12_VECOFS
XCHAL_WINDOW_VECTORS_PADDR
XCHAL_WINDOW_VECTORS_VADDR
XCHAL_XEA_VERSION
XCHAL_XLMI0_SIZE
XCHAL_XLMI0_VADDR
XCHAL_XLMI0_PADDR
XCHAL_XLMI0_ECC_PARITY
XSHAL_ALLVALID_CACHEATTR_BYPASS
XSHAL_ALLVALID_CACHEATTR_DEFAULT
XSHAL_ALLVALID_CACHEATTR_WRITEALLOC
XSHAL_ALLVALID_CACHEATTR_WRITEBACK
XSHAL_ALLVALID_CACHEATTR_WRITETHRU
XSHAL_DEBUG_VECTOR_ISROM
XSHAL_DEBUG_VECTOR_SIZE
XSHAL_DOUBLEEXC_VECTOR_ISROM
XSHAL_DOUBLEEXC_VECTOR_SIZE
XSHAL_FLOATING_POINT_ABI
XSHAL_HAVE_TEXT_SECTION_LITERALS
XSHAL_INTLEVEL2_VECTOR_SIZE
XSHAL_INTLEVEL2_VECTOR_ISROM
XSHAL_INTLEVEL3_VECTOR_SIZE
XSHAL_INTLEVEL3_VECTOR_ISROM
XSHAL_INTLEVEL4_VECTOR_SIZE
XSHAL_INTLEVEL4_VECTOR_ISROM
XSHAL_INTLEVEL5_VECTOR_SIZE
XSHAL_INTLEVEL5_VECTOR_ISROM
XSHAL_INTLEVEL6_VECTOR_SIZE
XSHAL_INTLEVEL6_VECTOR_ISROM
XSHAL_INTLEVEL7_VECTOR_SIZE
XSHAL_IOBLOCK_BYPASS_PADDR
XSHAL_IOBLOCK_BYPASS_SIZE
XSHAL_IOBLOCK_BYPASS_VADDR
XSHAL_IOBLOCK_CACHED_PADDR
XSHAL_IOBLOCK_CACHED_SIZE
XSHAL_IOBLOCK_CACHED_VADDR
XSHAL_ISS_CACHEATTR_BYPASS
XSHAL_ISS_CACHEATTR_DEFAULT
XSHAL_ISS_CACHEATTR_WRITEALLOC
XSHAL_ISS_CACHEATTR_WRITEBACK
XSHAL_ISS_CACHEATTR_WRITETHRU
XSHAL_ISS_PIPE_REGIONS
XSHAL_ISS_SDRAM_REGIONS
XSHAL_KERNELEXC_VECTOR_SIZE
XSHAL_KERNEL_VECTOR_ISROM
XSHAL_KERNEL_VECTOR_SIZE
XSHAL_MAGIC_EXIT
XSHAL_NMI_VECTOR_ISROM
XSHAL_NMI_VECTOR_SIZE
XSHAL_PROGRAMEXC_VECTOR_SIZE
XSHAL_RAM_AVAIL_VADDR
XSHAL_RAM_AVAIL_VSIZE
XSHAL_RAM_BYPASS_PADDR
XSHAL_RAM_BYPASS_PSIZE
XSHAL_RAM_BYPASS_VADDR
XSHAL_RAM_PADDR
XSHAL_RAM_PSIZE
XSHAL_RAM_SIZE
XSHAL_RAM_VADDR
XSHAL_RAM_VSIZE
XSHAL_RESET_VECTOR_ISROM
XSHAL_RESET_VECTOR_PADDR
XSHAL_RESET_VECTOR_SIZE
XSHAL_RESET_VECTOR_VADDR
XSHAL_ROM_AVAIL_VADDR
XSHAL_ROM_AVAIL_VSIZE
XSHAL_ROM_PADDR
XSHAL_ROM_SIZE
XSHAL_ROM_VADDR
XSHAL_SIMIO_BYPASS_VADDR
XSHAL_SIMIO_CACHED_VADDR
XSHAL_SIMIO_PADDR
XSHAL_SIMIO_SIZE
XSHAL_STACKEDEXC_VECTOR_SIZE
XSHAL_STATIC_VECTOR_SELECT
XSHAL_STRICT_CACHEATTR_BYPASS
XSHAL_STRICT_CACHEATTR_DEFAULT
XSHAL_STRICT_CACHEATTR_WRITEALLOC
XSHAL_STRICT_CACHEATTR_WRITEBACK
XSHAL_STRICT_CACHEATTR_WRITETHRU
XSHAL_TRAPNULL_CACHEATTR_BYPASS
XSHAL_TRAPNULL_CACHEATTR_DEFAULT
XSHAL_TRAPNULL_CACHEATTR_WRITEALLOC
XSHAL_TRAPNULL_CACHEATTR_WRITEBACK
XSHAL_TRAPNULL_CACHEATTR_WRITETHRU
XSHAL_USEREXC_VECTOR_SIZE
XSHAL_USER_VECTOR_ISROM
XSHAL_USER_VECTOR_SIZE
XSHAL_USE_ABSOLUTE_LITERALS
XSHAL_USE_FLOATING_POINT
XSHAL_VECTORS_PACKED
XSHAL_WINDOW_VECTORS_ISROM
XSHAL_WINDOW_VECTORS_SIZE
XSHAL_XT2000_CACHEATTR_WRITEBACK
XSHAL_XT2000_CACHEATTR_WRITEALLOC
XSHAL_XT2000_CACHEATTR_WRITETHRU
XSHAL_XT2000_CACHEATTR_BYPASS
XSHAL_XT2000_CACHEATTR_DEFAULT
XSHAL_XT2000_PIPE_REGIONS
XSHAL_XT2000_SDRAM_REGIONS
XTENSA_HWCIDSCHEME_RA_2004_1
XTENSA_HWCIDSCHEME_RA_2005_1
XTENSA_HWCIDSCHEME_RA_2005_2
XTENSA_HWCIDSCHEME_RA_2005_3
XTENSA_HWCIDSCHEME_RA_2006_4
XTENSA_HWCIDSCHEME_RA_2006_5
XTENSA_HWCIDSCHEME_RA_2006_6
XTENSA_HWCIDSCHEME_RA_2007_7
XTENSA_HWCIDSCHEME_RA_2008_8
XTENSA_HWCIDSCHEME_RB_2006_0
XTENSA_HWCIDSCHEME_RB_2007_1
XTENSA_HWCIDSCHEME_RB_2007_2
XTENSA_HWCIDSCHEME_RB_2007_2_MP
XTENSA_HWCIDSCHEME_RB_2008_3
XTENSA_HWCIDSCHEME_RB_2008_4
XTENSA_HWCIDSCHEME_RB_2009_5
XTENSA_HWCIDSCHEME_RC_2009_0
XTENSA_HWCIDSCHEME_RC_2010_1
XTENSA_HWCIDSCHEME_RC_2010_2
XTENSA_HWCIDSCHEME_RC_2011_3
XTENSA_HWCIDSCHEME_RD_2010_0
XTENSA_HWCIDSCHEME_RD_2011_1
XTENSA_HWCIDSCHEME_RD_2011_2
XTENSA_HWCIDSCHEME_RD_2011_3
XTENSA_HWCIDSCHEME_RD_2012_4
XTENSA_HWCIDSCHEME_RD_2012_5
XTENSA_HWCIDSCHEME_RE_2012_0
XTENSA_HWCIDSCHEME_RE_2012_1
XTENSA_HWCIDSCHEME_RE_2013_2
XTENSA_HWCIDSCHEME_RE_2013_3
XTENSA_HWCIDSCHEME_RE_2013_4
XTENSA_HWCIDSCHEME_RE_2014_5
XTENSA_HWCIDSCHEME_RE_2015_6
XTENSA_HWCIDSCHEME_RF_2014_0
XTENSA_HWCIDSCHEME_RF_2014_1
XTENSA_HWCIDSCHEME_RF_2015_2
XTENSA_HWCIDSCHEME_RF_2015_3
XTENSA_HWCIDSCHEME_RF_2016_4
XTENSA_HWCIDSCHEME_RG_2015_0
XTENSA_HWCIDSCHEME_RG_2015_1
XTENSA_HWCIDSCHEME_RG_2015_2
XTENSA_HWCIDSCHEME_RG_2016_3
XTENSA_HWCIDSCHEME_RG_2016_4
XTENSA_HWCIDSCHEME_RG_2017_5
XTENSA_HWCIDSCHEME_RG_2017_6
XTENSA_HWCIDSCHEME_RG_2017_7
XTENSA_HWCIDSCHEME_RG_2017_8
XTENSA_HWCIDSCHEME_RG_2018_9
XTENSA_HWCIDSCHEME_RH_2016_0
XTENSA_HWCIDSCHEME_T1020_0
XTENSA_HWCIDSCHEME_T1020_1
XTENSA_HWCIDSCHEME_T1020_2
XTENSA_HWCIDSCHEME_T1020_2B
XTENSA_HWCIDSCHEME_T1020_3
XTENSA_HWCIDSCHEME_T1020_4
XTENSA_HWCIDSCHEME_T1030_0
XTENSA_HWCIDSCHEME_T1030_1
XTENSA_HWCIDSCHEME_T1030_2
XTENSA_HWCIDSCHEME_T1030_3
XTENSA_HWCIDSCHEME_T1040_0
XTENSA_HWCIDSCHEME_T1040_1
XTENSA_HWCIDSCHEME_T1040_1P
XTENSA_HWCIDSCHEME_T1040_2
XTENSA_HWCIDSCHEME_T1040_3
XTENSA_HWCIDSCHEME_T1050_0
XTENSA_HWCIDSCHEME_T1050_1
XTENSA_HWCIDSCHEME_T1050_2
XTENSA_HWCIDSCHEME_T1050_3
XTENSA_HWCIDSCHEME_T1050_4
XTENSA_HWCIDSCHEME_T1050_5
XTENSA_HWCIDVERS_RA_2004_1
XTENSA_HWCIDVERS_RA_2005_1
XTENSA_HWCIDVERS_RA_2005_2
XTENSA_HWCIDVERS_RA_2005_3
XTENSA_HWCIDVERS_RA_2006_4
XTENSA_HWCIDVERS_RA_2006_5
XTENSA_HWCIDVERS_RA_2006_6
XTENSA_HWCIDVERS_RA_2007_7
XTENSA_HWCIDVERS_RA_2008_8
XTENSA_HWCIDVERS_RB_2006_0
XTENSA_HWCIDVERS_RB_2007_1
XTENSA_HWCIDVERS_RB_2007_2
XTENSA_HWCIDVERS_RB_2007_2_MP
XTENSA_HWCIDVERS_RB_2008_3
XTENSA_HWCIDVERS_RB_2008_4
XTENSA_HWCIDVERS_RB_2009_5
XTENSA_HWCIDVERS_RC_2009_0
XTENSA_HWCIDVERS_RC_2010_1
XTENSA_HWCIDVERS_RC_2010_2
XTENSA_HWCIDVERS_RC_2011_3
XTENSA_HWCIDVERS_RD_2010_0
XTENSA_HWCIDVERS_RD_2011_1
XTENSA_HWCIDVERS_RD_2011_2
XTENSA_HWCIDVERS_RD_2011_3
XTENSA_HWCIDVERS_RD_2012_4
XTENSA_HWCIDVERS_RD_2012_5
XTENSA_HWCIDVERS_RE_2012_0
XTENSA_HWCIDVERS_RE_2012_1
XTENSA_HWCIDVERS_RE_2013_2
XTENSA_HWCIDVERS_RE_2013_3
XTENSA_HWCIDVERS_RE_2013_4
XTENSA_HWCIDVERS_RE_2014_5
XTENSA_HWCIDVERS_RE_2015_6
XTENSA_HWCIDVERS_RF_2014_0
XTENSA_HWCIDVERS_RF_2014_1
XTENSA_HWCIDVERS_RF_2015_2
XTENSA_HWCIDVERS_RF_2015_3
XTENSA_HWCIDVERS_RF_2016_4
XTENSA_HWCIDVERS_RG_2015_0
XTENSA_HWCIDVERS_RG_2015_1
XTENSA_HWCIDVERS_RG_2015_2
XTENSA_HWCIDVERS_RG_2016_3
XTENSA_HWCIDVERS_RG_2016_4
XTENSA_HWCIDVERS_RG_2017_5
XTENSA_HWCIDVERS_RG_2017_6
XTENSA_HWCIDVERS_RG_2017_7
XTENSA_HWCIDVERS_RG_2017_8
XTENSA_HWCIDVERS_RG_2018_9
XTENSA_HWCIDVERS_RH_2016_0
XTENSA_HWCIDVERS_T1020_0
XTENSA_HWCIDVERS_T1020_1
XTENSA_HWCIDVERS_T1020_2
XTENSA_HWCIDVERS_T1020_2B
XTENSA_HWCIDVERS_T1020_3
XTENSA_HWCIDVERS_T1020_4
XTENSA_HWCIDVERS_T1030_0
XTENSA_HWCIDVERS_T1030_1
XTENSA_HWCIDVERS_T1030_2
XTENSA_HWCIDVERS_T1030_3
XTENSA_HWCIDVERS_T1040_0
XTENSA_HWCIDVERS_T1040_1
XTENSA_HWCIDVERS_T1040_1P
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___int_least64_t_defined
__bool_true_false_are_defined
__error_t_defined
__have_long32
__have_longlong64
__int8_t_defined
__int16_t_defined
__int20
__int32_t_defined
__int64_t_defined
__int_fast8_t_defined
__int_fast16_t_defined
__int_fast32_t_defined
__int_fast64_t_defined
__int_least8_t_defined
__int_least16_t_defined
__int_least32_t_defined
__int_least64_t_defined
configAPPLICATION_ALLOCATED_HEAP
configASSERT_2
configASSERT_DEFINED
configBENCHMARK
configCHECK_FOR_STACK_OVERFLOW
configCHECK_MUTEX_GIVEN_BY_OWNER
configENABLE_BACKWARD_COMPATIBILITY
configENABLE_TASK_SNAPSHOT
configESP32_PER_TASK_DATA
configEXPECTED_IDLE_TIME_BEFORE_SLEEP
configGENERATE_RUN_TIME_STATS
configIDLE_SHOULD_YIELD
configIDLE_TASK_STACK_SIZE
configINCLUDE_APPLICATION_DEFINED_PRIVILEGED_FUNCTIONS
configISR_STACK_SIZE
configKERNEL_INTERRUPT_PRIORITY
configMAX_CO_ROUTINE_PRIORITIES
configMAX_PRIORITIES
configMAX_SYSCALL_INTERRUPT_PRIORITY
configMAX_TASK_NAME_LEN
configMINIMAL_STACK_SIZE
configNUM_THREAD_LOCAL_STORAGE_POINTERS
configQUEUE_REGISTRY_SIZE
configSUPPORT_DYNAMIC_ALLOCATION
configTASKLIST_INCLUDE_COREID
configTHREAD_LOCAL_STORAGE_DELETE_CALLBACKS
configTICK_RATE_HZ
configUSE_16_BIT_TICKS
configUSE_ALTERNATIVE_API
configUSE_APPLICATION_TASK_TAG
configUSE_COUNTING_SEMAPHORES
configUSE_CO_ROUTINES
configUSE_IDLE_HOOK
configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES
configUSE_MALLOC_FAILED_HOOK
configUSE_MUTEX
configUSE_MUTEXES
configUSE_NEWLIB_REENTRANT
configUSE_PORT_OPTIMISED_TASK_SELECTION
configUSE_PREEMPTION
configUSE_QUEUE_SETS
configUSE_RECURSIVE_MUTEXES
configUSE_STATS_FORMATTING_FUNCTIONS
configUSE_TASK_NOTIFICATIONS
configUSE_TICK_HOOK
configUSE_TIMERS
configUSE_TIME_SLICING
configUSE_TRACE_FACILITY
configUSE_TRACE_FACILITY_2
configXT_BOARD
configXT_SIMULATOR
errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY
errQUEUE_BLOCKED
errQUEUE_YIELD
false_
pdINTEGRITY_CHECK_VALUE
portBYTE_ALIGNMENT
portBYTE_ALIGNMENT_MASK
portCRITICAL_NESTING_IN_TCB
portMUX_FREE_VAL
portMUX_NO_TIMEOUT
portMUX_TRY_LOCK
portNUM_CONFIGURABLE_REGIONS
portNUM_PROCESSORS
portSTACK_GROWTH
portStackMemoryCaps
portTICK_TYPE_IS_ATOMIC
portTcbMemoryCaps
portUSING_MPU_WRAPPERS
true_
tskKERNEL_VERSION_BUILD
tskKERNEL_VERSION_MAJOR
tskKERNEL_VERSION_MINOR
tskKERNEL_VERSION_NUMBER

Statics

GPIO
GPIO_HOLD_MASK
GPIO_PIN_MUX_REG
I2S0
I2S1
IP_EVENT
RTCCNTL
RTCIO
SC_EVENT
SENS
WIFI_EVENT
Xthal_all_extra_align
Xthal_all_extra_size
Xthal_build_unique_id
Xthal_cp_id_FPU
Xthal_cp_id_XCHAL_CP1_IDENT
Xthal_cp_id_XCHAL_CP2_IDENT
Xthal_cp_id_XCHAL_CP3_IDENT
Xthal_cp_id_XCHAL_CP4_IDENT
Xthal_cp_id_XCHAL_CP5_IDENT
Xthal_cp_id_XCHAL_CP6_IDENT
Xthal_cp_id_XCHAL_CP7_IDENT
Xthal_cp_mask
Xthal_cp_mask_FPU
Xthal_cp_mask_XCHAL_CP1_IDENT
Xthal_cp_mask_XCHAL_CP2_IDENT
Xthal_cp_mask_XCHAL_CP3_IDENT
Xthal_cp_mask_XCHAL_CP4_IDENT
Xthal_cp_mask_XCHAL_CP5_IDENT
Xthal_cp_mask_XCHAL_CP6_IDENT
Xthal_cp_mask_XCHAL_CP7_IDENT
Xthal_cp_max
Xthal_cp_names
Xthal_cp_num
Xthal_cpregs_align
Xthal_cpregs_restore_fn
Xthal_cpregs_restore_nw_fn
Xthal_cpregs_save_fn
Xthal_cpregs_save_nw_fn
Xthal_cpregs_size
Xthal_dataram_paddr
Xthal_dataram_size
Xthal_dataram_vaddr
Xthal_datarom_paddr
Xthal_datarom_size
Xthal_datarom_vaddr
Xthal_dcache_is_writeback
Xthal_dcache_line_lockable
Xthal_dcache_linesize
Xthal_dcache_linewidth
Xthal_dcache_setwidth
Xthal_dcache_size
Xthal_dcache_ways
Xthal_debug_configured
Xthal_dtlb_arf_ways
Xthal_dtlb_way_bits
Xthal_dtlb_ways
Xthal_excm_level
Xthal_extra_align
Xthal_extra_size
Xthal_have_booleans
Xthal_have_cacheattr
Xthal_have_ccount
Xthal_have_clamps
Xthal_have_density
Xthal_have_exceptions
Xthal_have_fp
Xthal_have_highlevel_interrupts
Xthal_have_identity_map
Xthal_have_interrupts
Xthal_have_loops
Xthal_have_mac16
Xthal_have_mimic_cacheattr
Xthal_have_minmax
Xthal_have_mul16
Xthal_have_nmi
Xthal_have_nsa
Xthal_have_pif
Xthal_have_prid
Xthal_have_sext
Xthal_have_spanning_way
Xthal_have_speculation
Xthal_have_threadptr
Xthal_have_tlbs
Xthal_have_windowed
Xthal_have_xlt_cacheattr
Xthal_hw_configid0
Xthal_hw_configid1
Xthal_hw_release_internal
Xthal_hw_release_major
Xthal_hw_release_minor
Xthal_hw_release_name
Xthal_icache_line_lockable
Xthal_icache_linesize
Xthal_icache_linewidth
Xthal_icache_setwidth
Xthal_icache_size
Xthal_icache_ways
Xthal_instram_paddr
Xthal_instram_size
Xthal_instram_vaddr
Xthal_instrom_paddr
Xthal_instrom_size
Xthal_instrom_vaddr
Xthal_intlevel
Xthal_intlevel_andbelow_mask
Xthal_intlevel_mask
Xthal_inttype
Xthal_inttype_mask
Xthal_itlb_arf_ways
Xthal_itlb_way_bits
Xthal_itlb_ways
Xthal_memory_order
Xthal_mmu_asid_bits
Xthal_mmu_asid_kernel
Xthal_mmu_ca_bits
Xthal_mmu_max_pte_page_size
Xthal_mmu_min_pte_page_size
Xthal_mmu_ring_bits
Xthal_mmu_rings
Xthal_mmu_sr_bits
Xthal_mpu_bgmap
Xthal_num_aregs
Xthal_num_aregs_log2
Xthal_num_ccompare
Xthal_num_coprocessors
Xthal_num_dataram
Xthal_num_datarom
Xthal_num_dbreak
Xthal_num_ibreak
Xthal_num_instram
Xthal_num_instrom
Xthal_num_interrupts
Xthal_num_intlevels
Xthal_num_writebuffer_entries
Xthal_num_xlmi
Xthal_release_internal
Xthal_release_major
Xthal_release_minor
Xthal_release_name
Xthal_rev_no
Xthal_timer_interrupt
Xthal_tram_enabled
Xthal_tram_pending
Xthal_tram_sync
Xthal_xea_version
Xthal_xlmi_paddr
Xthal_xlmi_size
Xthal_xlmi_vaddr
__sf_fake_stderr
__sf_fake_stdin
__sf_fake_stdout
_ctype_
_daylight
_g_esp_netif_inherent_ap_config
_g_esp_netif_inherent_eth_config
_g_esp_netif_inherent_ppp_config
_g_esp_netif_inherent_sta_config
_g_esp_netif_netstack_default_eth
_g_esp_netif_netstack_default_ppp
_g_esp_netif_netstack_default_wifi_ap
_g_esp_netif_netstack_default_wifi_sta
_g_esp_netif_soft_ap_ip
_global_impure_ptr
_sys_errlist
_sys_nerr
_timezone
_tzname
environ
esp_flash_default_chip
exc_cause_table
g_flash_guard_default_ops
g_flash_guard_no_os_ops
g_wifi_default_wpa_crypto_funcs
g_wifi_feature_caps
g_wifi_osi_funcs
h_errno
i2s_periph_signal
in6addr_any
ip6_addr_any
ip_addr_any
ip_addr_any_type
ip_addr_broadcast
memp_pools
netif_default
netif_list
optarg
opterr
optind
optopt
optreset
rtc_io_desc
rtc_io_num_map
soc_memory_region_count
soc_memory_regions
soc_memory_type_count
soc_memory_types
suboptarg

Functions

_Exit
__assert
__assert_func
__eprintf
__errno
__getdelim
__getline
__getreent
__gettzinfo
__itoa
__locale_ctype_ptr
__locale_ctype_ptr_l
__locale_mb_cur_max
__sinit
__srget_r
__swbuf_r
__utoa
_asiprintf_r
_asniprintf_r
_asnprintf_r
_asprintf_r
_atoi_r
_atol_r
_atoll_r
_calloc_r
_diprintf_r
_dprintf_r
_drand48_r
_dtoa_r
_erand48_r
_esp_error_check_failed

@cond

_esp_error_check_failed_without_abort

@cond

_exit
_fclose_r
_fcloseall_r
_fdopen_r
_fflush_r
_fgetc_r
_fgetc_unlocked_r
_fgetpos_r
_fgets_r
_fgets_unlocked_r
_findenv
_findenv_r
_fiprintf_r
_fiscanf_r
_fmemopen_r
_fopen_r
_fprintf_r
_fpurge_r
_fputc_r
_fputc_unlocked_r
_fputs_r
_fputs_unlocked_r
_fread_r
_fread_unlocked_r
_free_r
_freopen_r
_frxt_setup_switch
_fscanf_r
_fseek_r
_fseeko_r
_fsetpos_r
_ftell_r
_ftello_r
_funopen_r
_fwrite_r
_fwrite_unlocked_r
_getc_r
_getc_unlocked_r
_getchar_r
_getchar_unlocked_r
_getenv_r
_gets_r
_iprintf_r
_iscanf_r
_jrand48_r
_l64a_r
_lcong48_r
_lock_acquire
_lock_acquire_recursive
_lock_close
_lock_close_recursive
_lock_init
_lock_init_recursive
_lock_release
_lock_release_recursive
_lock_try_acquire
_lock_try_acquire_recursive
_lrand48_r
_malloc_r
_mblen_r
_mbstowcs_r
_mbtowc_r
_mkdtemp_r
_mkostemp_r
_mkostemps_r
_mkstemp_r
_mkstemps_r
_mktemp_r
_mrand48_r
_mstats_r
_nrand48_r
_open_memstream_r
_perror_r
_printf_r
_putc_r
_putc_unlocked_r
_putchar_r
_putchar_unlocked_r
_putenv_r
_puts_r
_raise_r
_realloc_r
_reallocf_r
_reclaim_reent
_remove_r
_rename_r
_rewind_r
_scanf_r
_seed48_r
_setenv_r
_signal_r
_siprintf_r
_siscanf_r
_sniprintf_r
_snprintf_r
_sprintf_r
_srand48_r
_sscanf_r
_strdup_r
_strerror_r
_strndup_r
_strtod_r
_strtoimax_r
_strtol_r
_strtold_r
_strtoll_r
_strtoul_r
_strtoull_r
_strtoumax_r
_system_r
_tempnam_r
_tmpfile_r
_tmpnam_r
_tzset_r
_ungetc_r
_unsetenv_r
_vasiprintf_r
_vasniprintf_r
_vasnprintf_r
_vasprintf_r
_vdiprintf_r
_vdprintf_r
_vfiprintf_r
_vfiscanf_r
_vfprintf_r
_vfscanf_r
_viprintf_r
_viscanf_r
_vprintf_r
_vscanf_r
_vsiprintf_r
_vsiscanf_r
_vsniprintf_r
_vsnprintf_r
_vsprintf_r
_vsscanf_r
_wcstoimax_r
_wcstombs_r
_wcstoumax_r
_wctomb_r
_xt_coproc_release
_xtos_clear_ints
_xtos_core_restore
_xtos_core_save
_xtos_core_shutoff
_xtos_dispatch_level1_interrupts
_xtos_dispatch_level2_interrupts
_xtos_dispatch_level3_interrupts
_xtos_dispatch_level4_interrupts
_xtos_dispatch_level5_interrupts
_xtos_dispatch_level6_interrupts
_xtos_ints_off
_xtos_ints_on
_xtos_memep_enable
_xtos_memep_initrams
_xtos_read_ints
_xtos_restore_intlevel
_xtos_restore_just_intlevel
_xtos_set_exception_handler
_xtos_set_interrupt_handler
_xtos_set_interrupt_handler_arg
_xtos_set_intlevel
_xtos_set_min_intlevel
_xtos_timer_0_delta
_xtos_timer_1_delta
_xtos_timer_2_delta
a64l
abort
abs
access
adc1_pad_get_io_num

@brief Get the GPIO number of a specific ADC1 channel.

adc1_config_channel_atten

@brief Set the attenuation of a particular channel on ADC1, and configure its associated GPIO pin mux.

adc1_config_width

@brief Configure ADC1 capture width, meanwhile enable output invert for ADC1. The configuration is for all channels of ADC1 @param width_bit Bit capture width for ADC1

adc1_get_raw

@brief Take an ADC1 reading from a single channel. @note ESP32: When the power switch of SARADC1, SARADC2, HALL sensor and AMP sensor is turned on, the input of GPIO36 and GPIO39 will be pulled down for about 80ns. When enabling power for any of these peripherals, ignore input from GPIO36 and GPIO39. Please refer to section 3.11 of 'ECO_and_Workarounds_for_Bugs_in_ESP32' for the description of this issue.

adc1_ulp_enable

@brief Configure ADC1 to be usable by the ULP

adc2_pad_get_io_num

@brief Get the GPIO number of a specific ADC2 channel.

adc2_config_channel_atten

@brief Configure the ADC2 channel, including setting attenuation.

adc2_get_raw

@brief Take an ADC2 reading on a single channel

adc2_vref_to_gpio

@brief Output ADC2 reference voltage to GPIO 25 or 26 or 27

adc_gpio_init

@brief Initialize ADC pad @param adc_unit ADC unit index @param channel ADC channel index @return - ESP_OK success - ESP_ERR_INVALID_ARG Parameter error

adc_i2s_mode_init

@brief Initialize I2S ADC mode @param adc_unit ADC unit index @param channel ADC channel index @return - ESP_OK success - ESP_ERR_INVALID_ARG Parameter error

adc_power_off

@brief Power off SAR ADC This function will force power down for ADC

adc_power_on

@brief Enable ADC power

adc_set_clk_div

@brief Set ADC source clock @param clk_div ADC clock divider, ADC clock is divided from APB clock @return - ESP_OK success

adc_set_data_inv

@brief Set ADC data invert @param adc_unit ADC unit index @param inv_en whether enable data invert @return - ESP_OK success - ESP_ERR_INVALID_ARG Parameter error

adc_set_data_width

@brief Configure ADC capture width.

adc_set_i2s_data_source

@brief Set I2S data source @param src I2S DMA data source, I2S DMA can get data from digital signals or from ADC. @return - ESP_OK success

adjtime
alarm
aligned_alloc
arc4random
arc4random_uniform
arc4random_buf
asctime
asctime_r
asiprintf
asniprintf
asnprintf
at_quick_exit
atexit
atof
atoff
atoi
atol
atoll
bcmp
bcopy
bootloader_load_image

@brief Verify and load an app image (available only in space of bootloader).

bootloader_load_image_no_verify

@brief Load an app image without verification (available only in space of bootloader).

bsearch
bzero
calloc
cfree
chdir
chmod
chown
chroot
clearerr
clearerr_unlocked
clock
clock_getres
clock_gettime
clock_nanosleep
clock_settime
close
compare_and_set_extram
confstr
cpu_hal_clear_breakpoint

Clear and disable breakpoint.

cpu_hal_clear_watchpoint

Clear and disable watchpoint.

cpu_hal_set_breakpoint

Set and enable breakpoint at an instruction address.

cpu_hal_set_vecbase

Set exception vector table base address.

cpu_hal_set_watchpoint

Set and enable a watchpoint, specifying the memory range and trigger operation.

creat
ctermid
ctime
ctime_r
daemon
dhcp_ip_addr_erase
dhcp_ip_addr_restore
dhcp_ip_addr_store
difftime
diprintf
div
dprintf
drand48
dup
dup2
eTaskConfirmSleepModeStatus
eTaskGetState

Obtain the state of any task.

endusershell
erand48
err_to_errno
esp_base_mac_addr_get

@brief Return base MAC address which is set using esp_base_mac_addr_set.

esp_base_mac_addr_set

@brief Set base MAC address with the MAC address which is stored in BLK3 of EFUSE or external storage e.g. flash and EEPROM.

esp_chip_info

@brief Fill an esp_chip_info_t structure with information about the chip @param[out] out_info structure to be filled

esp_cpu_in_ocd_debug_mode

@brief Returns true if a JTAG debugger is attached to CPU OCD (on chip debug) port.

esp_cpu_reset

@brief Reset CPU using RTC controller @param cpu_id ID of the CPU to reset (0 = PRO, 1 = APP)

esp_cpu_stall

@brief Stall CPU using RTC controller @param cpu_id ID of the CPU to stall (0 = PRO, 1 = APP)

esp_cpu_unstall

@brief Un-stall CPU using RTC controller @param cpu_id ID of the CPU to un-stall (0 = PRO, 1 = APP)

esp_crosscore_int_init

Initialize the crosscore interrupt system for this CPU. This needs to be called once on every CPU that is used by FreeRTOS.

esp_crosscore_int_send_freq_switch

Send an interrupt to a CPU indicating it should update its CCOMPARE1 value due to a frequency switch.

esp_crosscore_int_send_print_backtrace

Send an interrupt to a CPU indicating it should print its current backtrace

esp_crosscore_int_send_yield

Send an interrupt to a CPU indicating it should yield its currently running task in favour of a higher-priority task that presumably just woke up.

esp_deep_sleep

@brief Enter deep-sleep mode

esp_deep_sleep_disable_rom_logging

@brief Disable logging from the ROM code after deep sleep.

esp_deep_sleep_start

@brief Enter deep sleep with the configured wakeup options

esp_default_wake_deep_sleep

@brief The default esp-idf-provided esp_wake_deep_sleep() stub.

esp_deregister_freertos_idle_hook

@brief Unregister an idle callback. If the idle callback is registered to the idle hooks of both cores, the idle hook will be unregistered from both cores

esp_deregister_freertos_idle_hook_for_cpu

@brief Unregister an idle callback from the idle hook of the specified core

esp_deregister_freertos_tick_hook

@brief Unregister a tick callback. If the tick callback is registered to the tick hooks of both cores, the tick hook will be unregistered from both cores

esp_deregister_freertos_tick_hook_for_cpu

@brief Unregister a tick callback from the tick hook of the specified core

esp_derive_local_mac

@brief Derive local MAC address from universal MAC address.

esp_efuse_mac_get_custom

@brief Return base MAC address which was previously written to BLK3 of EFUSE.

esp_efuse_mac_get_default

@brief Return base MAC address which is factory-programmed by Espressif in BLK0 of EFUSE.

esp_err_to_name

@brief Returns string for esp_err_t error codes

esp_err_to_name_r

@brief Returns string for esp_err_t and system error codes

esp_esptouch_set_timeout

@brief Set timeout of SmartConfig process.

esp_event_dump

@brief Dumps statistics of all event loops.

esp_event_handler_instance_register

@brief Register an instance of event handler to the default loop.

esp_event_handler_instance_register_with

@brief Register an instance of event handler to a specific loop.

esp_event_handler_instance_unregister

@brief Unregister a handler from the system event loop.

esp_event_handler_instance_unregister_with

@brief Unregister a handler instance from a specific event loop.

esp_event_handler_register

@brief Register an event handler to the system event loop (legacy).

esp_event_handler_register_with

@brief Register an event handler to a specific loop (legacy).

esp_event_handler_unregister

@brief Unregister a handler with the system event loop (legacy).

esp_event_handler_unregister_with

@brief Unregister a handler from a specific event loop (legacy).

esp_event_loop_create

@brief Create a new event loop.

esp_event_loop_create_default

@brief Create default event loop

esp_event_loop_delete

@brief Delete an existing event loop.

esp_event_loop_delete_default

@brief Delete the default event loop

esp_event_loop_init

@brief Initialize event loop

esp_event_loop_run

@brief Dispatch events posted to an event loop.

esp_event_loop_set_cb

@brief Set application specified event callback function

esp_event_post

@brief Posts an event to the system default event loop. The event loop library keeps a copy of event_data and manages the copy's lifetime automatically (allocation + deletion); this ensures that the data the handler recieves is always valid.

esp_event_post_to

@brief Posts an event to the specified event loop. The event loop library keeps a copy of event_data and manages the copy's lifetime automatically (allocation + deletion); this ensures that the data the handler recieves is always valid.

esp_event_process_default

@brief Default event handler for system events

esp_event_send

@brief Send a event to event task

esp_event_send_internal

@brief Send a event to event task

esp_event_set_default_eth_handlers

@brief Install default event handlers for Ethernet interface

esp_event_set_default_wifi_handlers

@brief Install default event handlers for Wi-Fi interfaces (station and AP)

esp_fill_random

@brief Fill a buffer with random bytes from hardware RNG

esp_flash_chip_driver_initialized

Check if appropriate chip driver is set.

esp_flash_erase_chip

@brief Erase flash chip contents

esp_flash_erase_region

@brief Erase a region of the flash chip

esp_flash_get_chip_write_protect

@brief Read if the entire chip is write protected

esp_flash_get_protectable_regions

@brief Read the list of individually protectable regions of this SPI flash chip.

esp_flash_get_protected_region

@brief Detect if a region of the SPI flash chip is protected

esp_flash_get_size

@brief Detect flash size based on flash ID.

esp_flash_init

@brief Initialise SPI flash chip interface.

esp_flash_read

@brief Read data from the SPI flash chip

esp_flash_read_encrypted

@brief Read and decrypt data from the SPI flash chip using on-chip hardware flash encryption

esp_flash_read_id

@brief Read flash ID via the common "RDID" SPI flash command.

esp_flash_set_chip_write_protect

@brief Set write protection for the SPI flash chip

esp_flash_set_protected_region

@brief Update the protected status for a region of the SPI flash chip

esp_flash_write

@brief Write data to the SPI flash chip

esp_flash_write_encrypted

@brief Encrypted and write data to the SPI flash chip using on-chip hardware flash encryption

esp_get_deep_sleep_wake_stub

@brief Get current wake from deep sleep stub @return Return current wake from deep sleep stub, or NULL if no stub is installed.

esp_get_free_heap_size

@brief Get the size of available heap.

esp_get_idf_version

Return full IDF version string, same as 'git describe' output.

esp_get_minimum_free_heap_size

@brief Get the minimum heap that has ever been available

esp_image_verify

@brief Verify an app image.

esp_image_verify_bootloader

@brief Verify the bootloader image.

esp_image_verify_bootloader_data

@brief Verify the bootloader image.

esp_intr_alloc

@brief Allocate an interrupt with the given parameters.

esp_intr_alloc_intrstatus

@brief Allocate an interrupt with the given parameters.

esp_intr_disable

@brief Disable the interrupt associated with the handle

esp_intr_enable

@brief Enable the interrupt associated with the handle

esp_intr_free

@brief Disable and free an interrupt.

esp_intr_get_cpu

@brief Get CPU number an interrupt is tied to

esp_intr_get_intno

@brief Get the allocated interrupt for a certain handle

esp_intr_mark_shared

@brief Mark an interrupt as a shared interrupt

esp_intr_noniram_disable

@brief Disable interrupts that aren't specifically marked as running from IRAM

esp_intr_noniram_enable

@brief Re-enable interrupts disabled by esp_intr_noniram_disable

esp_intr_reserve

@brief Reserve an interrupt to be used outside of this framework

esp_intr_set_in_iram

@brief Set the "in IRAM" status of the handler.

esp_ip4addr_ntoa

@brief Converts numeric IP address into decimal dotted ASCII representation.

esp_ip4addr_aton

@brief Ascii internet address interpretation routine The value returned is in network order.

esp_light_sleep_start

@brief Enter light sleep with the configured wakeup options

esp_netif_action_connected

@brief Default building block for network interface action upon IO driver connected event

esp_netif_action_disconnected

@brief Default building block for network interface action upon IO driver disconnected event

esp_netif_action_got_ip

@brief Default building block for network interface action upon network got IP event

esp_netif_action_start

@brief Default building block for network interface action upon IO driver start event Creates network interface, if AUTOUP enabled turns the interface on, if DHCPS enabled starts dhcp server

esp_netif_action_stop

@brief Default building block for network interface action upon IO driver stop event

esp_netif_attach

@brief Attaches esp_netif instance to the io driver handle

esp_netif_attach_wifi_ap

@brief Attaches wifi soft AP interface to supplied netif

esp_netif_attach_wifi_station

@brief Attaches wifi station interface to supplied netif

esp_netif_create_default_wifi_ap

@brief Creates default WIFI AP. In case of any init error this API aborts.

esp_netif_create_default_wifi_mesh_netifs

@brief Creates default STA and AP network interfaces for esp-mesh.

esp_netif_create_default_wifi_sta

@brief Creates default WIFI STA. In case of any init error this API aborts.

esp_netif_create_ip6_linklocal

@brief Create interface link-local IPv6 address

esp_netif_create_wifi

@brief Creates esp_netif WiFi object based on the custom configuration.

esp_netif_deinit

@brief Deinitialize the esp-netif component (and the underlying TCP/IP stack)

esp_netif_destroy

@brief Destroys the esp_netif object

esp_netif_dhcpc_get_status

@brief Get DHCP client status

esp_netif_dhcpc_option

@brief Set or Get DHCP client option

esp_netif_dhcpc_start

@brief Start DHCP client (only if enabled in interface object)

esp_netif_dhcpc_stop

@brief Stop DHCP client (only if enabled in interface object)

esp_netif_dhcps_get_status

@brief Get DHCP Server status

esp_netif_dhcps_option

@brief Set or Get DHCP server option

esp_netif_dhcps_start

@brief Start DHCP server (only if enabled in interface object)

esp_netif_dhcps_stop

@brief Stop DHCP server (only if enabled in interface object)

esp_netif_get_all_ip6

@brief Get all IPv6 addresses of the specified interface

esp_netif_get_desc

@brief Returns configured interface type for this esp-netif instance

esp_netif_get_dns_info

@brief Get DNS Server information

esp_netif_get_event_id

@brief Returns configured event for this esp-netif instance and supplied event type

esp_netif_get_flags

@brief Returns configured flags for this interface

esp_netif_get_handle_from_ifkey

@brief Searches over a list of created objects to find an instance with supplied if key

esp_netif_get_hostname

@brief Get interface hostname.

esp_netif_get_ifkey

@brief Returns configured interface key for this esp-netif instance

esp_netif_get_io_driver

@brief Gets media driver handle for this esp-netif instance

esp_netif_get_ip6_linklocal

@brief Get interface link-local IPv6 address

esp_netif_get_ip6_global

@brief Get interface global IPv6 address

esp_netif_get_ip_info

@brief Get interface's IP address information

esp_netif_get_mac

@brief Get the mac address for the interface instance

esp_netif_get_netif_impl_index

@brief Get net interface index from network stack implementation

esp_netif_get_netif_impl_name

@brief Get net interface name from network stack implementation

esp_netif_get_nr_of_ifs

@brief Returns number of registered esp_netif objects

esp_netif_get_old_ip_info

@brief Get interface's old IP information

esp_netif_get_route_prio

@brief Returns configured routing priority number

esp_netif_init

@brief Initialize the underlying TCP/IP stack

esp_netif_ip6_get_addr_type

@brief Get the IPv6 address type

esp_netif_is_netif_up

@brief Test if supplied interface is up or down

esp_netif_new

@brief Creates an instance of new esp-netif object based on provided config

esp_netif_next

@brief Iterates over list of interfaces. Returns first netif if NULL given as parameter

esp_netif_receive

@brief Passes the raw packets from communication media to the appropriate TCP/IP stack

esp_netif_set_dns_info

@brief Set DNS Server information

esp_netif_set_driver_config

@brief Configures driver related options of esp_netif object

esp_netif_set_hostname

@brief Set the hostname of an interface

esp_netif_set_ip4_addr

@brief Sets IPv4 address to the specified octets

esp_netif_set_ip_info

@brief Set interface's IP address information

esp_netif_set_mac

@brief Set the mac address for the interface instance

esp_netif_set_old_ip_info

@brief Set interface old IP information

esp_now_add_peer

@brief Add a peer to peer list

esp_now_deinit

@brief De-initialize ESPNOW function

esp_now_del_peer

@brief Delete a peer from peer list

esp_now_fetch_peer

@brief Fetch a peer from peer list

esp_now_get_peer

@brief Get a peer whose MAC address matches peer_addr from peer list

esp_now_get_peer_num

@brief Get the number of peers

esp_now_get_version

@brief Get the version of ESPNOW

esp_now_init

@brief Initialize ESPNOW function

esp_now_is_peer_exist

@brief Peer exists or not

esp_now_mod_peer

@brief Modify a peer

esp_now_register_recv_cb

@brief Register callback function of receiving ESPNOW data

esp_now_register_send_cb

@brief Register callback function of sending ESPNOW data

esp_now_send

@brief Send ESPNOW data

esp_now_set_pmk

@brief Set the primary master key

esp_now_unregister_recv_cb

@brief Unregister callback function of receiving ESPNOW data

esp_now_unregister_send_cb

@brief Unregister callback function of sending ESPNOW data

esp_ota_begin

@brief Commence an OTA update writing to the specified partition.

esp_ota_check_rollback_is_possible

@brief Checks applications on the slots which can be booted in case of rollback.

esp_ota_end

@brief Finish OTA update and validate newly written app image.

esp_ota_erase_last_boot_app_partition

@brief Erase previous boot app partition and corresponding otadata select for this partition.

esp_ota_get_app_description

@brief Return esp_app_desc structure. This structure includes app version.

esp_ota_get_app_elf_sha256

@brief Fill the provided buffer with SHA256 of the ELF file, formatted as hexadecimal, null-terminated. If the buffer size is not sufficient to fit the entire SHA256 in hex plus a null terminator, the largest possible number of bytes will be written followed by a null. @param dst Destination buffer @param size Size of the buffer @return Number of bytes written to dst (including null terminator)

esp_ota_get_boot_partition

@brief Get partition info of currently configured boot app

esp_ota_get_last_invalid_partition

@brief Returns last partition with invalid state (ESP_OTA_IMG_INVALID or ESP_OTA_IMG_ABORTED).

esp_ota_get_next_update_partition

@brief Return the next OTA app partition which should be written with a new firmware.

esp_ota_get_partition_description

@brief Returns esp_app_desc structure for app partition. This structure includes app version.

esp_ota_get_running_partition

@brief Get partition info of currently running app

esp_ota_get_state_partition

@brief Returns state for given partition.

esp_ota_mark_app_invalid_rollback_and_reboot

@brief This function is called to roll back to the previously workable app with reboot.

esp_ota_mark_app_valid_cancel_rollback

@brief This function is called to indicate that the running app is working well.

esp_ota_set_boot_partition

@brief Configure OTA data for a new boot partition

esp_ota_write

@brief Write OTA update data to partition

esp_ota_write_with_offset

@brief Write OTA update data to partition

esp_partition_check_identity

@brief Check for the identity of two partitions by SHA-256 digest.

esp_partition_deregister_external

@brief Deregister the partition previously registered using esp_partition_register_external @param partition pointer to the partition structure obtained from esp_partition_register_external, @return - ESP_OK on success - ESP_ERR_NOT_FOUND if the partition pointer is not found - ESP_ERR_INVALID_ARG if the partition comes from the partition table - ESP_ERR_INVALID_ARG if the partition was not registered using esp_partition_register_external function.

esp_partition_erase_range

@brief Erase part of the partition

esp_partition_find

@brief Find partition based on one or more parameters

esp_partition_find_first

@brief Find first partition based on one or more parameters

esp_partition_get

@brief Get esp_partition_t structure for given partition

esp_partition_get_sha256

@brief Get SHA-256 digest for required partition.

esp_partition_iterator_release

@brief Release partition iterator

esp_partition_main_flash_region_safe

Check whether the region on the main flash is safe to write.

esp_partition_mmap

@brief Configure MMU to map partition into data memory

esp_partition_next

@brief Move partition iterator to the next partition found

esp_partition_read

@brief Read data from the partition

esp_partition_register_external

@brief Register a partition on an external flash chip

esp_partition_table_verify
esp_partition_verify

@brief Verify partition data

esp_partition_write

@brief Write data to the partition

esp_random

@brief Get one random 32-bit word from hardware RNG

esp_read_mac

@brief Read base MAC address and set MAC address of the interface.

esp_register_freertos_idle_hook

@brief Register a callback to the idle hook of the core that calls this function. The callback should return true if it should be called by the idle hook once per interrupt (or FreeRTOS tick), and return false if it should be called repeatedly as fast as possible by the idle hook.

esp_register_freertos_idle_hook_for_cpu

@brief Register a callback to be called from the specified core's idle hook. The callback should return true if it should be called by the idle hook once per interrupt (or FreeRTOS tick), and return false if it should be called repeatedly as fast as possible by the idle hook.

esp_register_freertos_tick_hook

@brief Register a callback to be called from the calling core's tick hook.

esp_register_freertos_tick_hook_for_cpu

@brief Register a callback to be called from the specified core's tick hook.

esp_register_shutdown_handler

@brief Register shutdown handler

esp_reset_reason

@brief Get reason of last reset @return See description of esp_reset_reason_t for explanation of each value.

esp_restart

@brief Restart PRO and APP CPUs.

esp_set_deep_sleep_wake_stub

@brief Install a new stub at runtime to run on wake from deep sleep

esp_sleep_disable_wakeup_source

@brief Disable wakeup source

esp_sleep_enable_ext0_wakeup

@brief Enable wakeup using a pin

esp_sleep_enable_ext1_wakeup

@brief Enable wakeup using multiple pins

esp_sleep_enable_gpio_wakeup

@brief Enable wakeup from light sleep using GPIOs

esp_sleep_enable_timer_wakeup

@brief Enable wakeup by timer @param time_in_us time before wakeup, in microseconds @return - ESP_OK on success - ESP_ERR_INVALID_ARG if value is out of range (TBD)

esp_sleep_enable_touchpad_wakeup

@brief Enable wakeup by touch sensor

esp_sleep_enable_uart_wakeup

@brief Enable wakeup from light sleep using UART

esp_sleep_enable_ulp_wakeup

@brief Enable wakeup by ULP coprocessor @note ULP wakeup source cannot be used when RTC_PERIPH power domain is forced to be powered on (ESP_PD_OPTION_ON) or when ext0 wakeup source is used. @return - ESP_OK on success - ESP_ERR_NOT_SUPPORTED if additional current by touch (CONFIG_ESP32_RTC_EXT_CRYST_ADDIT_CURRENT) is enabled. - ESP_ERR_INVALID_STATE if ULP co-processor is not enabled or if wakeup triggers conflict

esp_sleep_get_ext1_wakeup_status

@brief Get the bit mask of GPIOs which caused wakeup (ext1)

esp_sleep_get_touchpad_wakeup_status

@brief Get the touch pad which caused wakeup

esp_sleep_get_wakeup_cause

@brief Get the wakeup source which caused wakeup from sleep

esp_sleep_pd_config

@brief Set power down mode for an RTC power domain in sleep mode

esp_smartconfig_fast_mode

@brief Set mode of SmartConfig. default normal mode.

esp_smartconfig_get_version

@brief Get the version of SmartConfig.

esp_smartconfig_set_type

@brief Set protocol type of SmartConfig.

esp_smartconfig_start

@brief Start SmartConfig, config ESP device to connect AP. You need to broadcast information by phone APP. Device sniffer special packets from the air that containing SSID and password of target AP.

esp_smartconfig_stop

@brief Stop SmartConfig, free the buffer taken by esp_smartconfig_start.

esp_system_abort

@brief Trigger a software abort

esp_timer_create

@brief Create an esp_timer instance

esp_timer_deinit

@brief De-initialize esp_timer library

esp_timer_delete

@brief Delete an esp_timer instance

esp_timer_dump

@brief Dump the list of timers to a stream

esp_timer_get_next_alarm

@brief Get the timestamp when the next timeout is expected to occur @return Timestamp of the nearest timer event, in microseconds. The timebase is the same as for the values returned by esp_timer_get_time.

esp_timer_get_time

@brief Get time in microseconds since boot @return number of microseconds since esp_timer_init was called (this normally happens early during application startup).

esp_timer_init

@brief Initialize esp_timer library

esp_timer_start_once

@brief Start one-shot timer

esp_timer_start_periodic

@brief Start a periodic timer

esp_timer_stop

@brief Stop the timer

esp_unregister_shutdown_handler

@brief Unregister shutdown handler

esp_vApplicationIdleHook
esp_vApplicationTickHook
esp_vfs_lwip_sockets_register
esp_wake_deep_sleep

@brief Default stub to run on wake from deep sleep.

esp_wifi_80211_tx

@brief Send raw ieee80211 data

esp_wifi_ap_get_sta_aid

@brief Get AID of STA connected with soft-AP

esp_wifi_ap_get_sta_list

@brief Get STAs associated with soft-AP

esp_wifi_clear_default_wifi_driver_and_handlers

@brief Clears default wifi event handlers for supplied network interface

esp_wifi_clear_fast_connect

@brief Currently this API is just an stub API

esp_wifi_connect

@brief Connect the ESP32 WiFi station to the AP.

esp_wifi_deauth_sta

@brief deauthenticate all stations or associated id equals to aid

esp_wifi_deinit

@brief Deinit WiFi Free all resource allocated in esp_wifi_init and stop WiFi task

esp_wifi_disconnect

@brief Disconnect the ESP32 WiFi station from the AP.

esp_wifi_get_ant

@brief Get current antenna configuration

esp_wifi_get_ant_gpio

@brief Get current antenna GPIO configuration

esp_wifi_get_bandwidth

@brief Get the bandwidth of ESP32 specified interface

esp_wifi_get_channel

@brief Get the primary/secondary channel of ESP32

esp_wifi_get_config

@brief Get configuration of specified interface

esp_wifi_get_country

@brief get the current country info

esp_wifi_get_event_mask

@brief Get mask of WiFi events

esp_wifi_get_mac

@brief Get mac of specified interface

esp_wifi_get_max_tx_power

@brief Get maximum transmiting power after WiFi start

esp_wifi_get_mode

@brief Get current operating mode of WiFi

esp_wifi_get_promiscuous

@brief Get the promiscuous mode.

esp_wifi_get_promiscuous_ctrl_filter

@brief Get the subtype filter of the control packet in promiscuous mode.

esp_wifi_get_promiscuous_filter

@brief Get the promiscuous filter.

esp_wifi_get_protocol

@brief Get the current protocol bitmap of the specified interface

esp_wifi_get_ps

@brief Get current WiFi power save type

esp_wifi_init

@brief Init WiFi Alloc resource for WiFi driver, such as WiFi control structure, RX/TX buffer, WiFi NVS structure etc, this WiFi also start WiFi task

esp_wifi_restore

@brief Restore WiFi stack persistent settings to default values

esp_wifi_scan_get_ap_num

@brief Get number of APs found in last scan

esp_wifi_scan_get_ap_records

@brief Get AP list found in last scan

esp_wifi_scan_start

@brief Scan all available APs.

esp_wifi_scan_stop

@brief Stop the scan in process

esp_wifi_set_ant

@brief Set antenna configuration

esp_wifi_set_ant_gpio

@brief Set antenna GPIO configuration

esp_wifi_set_bandwidth

@brief Set the bandwidth of ESP32 specified interface

esp_wifi_set_channel

@brief Set primary/secondary channel of ESP32

esp_wifi_set_config

@brief Set the configuration of the ESP32 STA or AP

esp_wifi_set_country

@brief configure country info

esp_wifi_set_csi

@brief Enable or disable CSI

esp_wifi_set_csi_config

@brief Set CSI data configuration

esp_wifi_set_csi_rx_cb

@brief Register the RX callback function of CSI data.

esp_wifi_set_default_wifi_ap_handlers

@brief Sets default wifi event handlers for STA interface

esp_wifi_set_default_wifi_sta_handlers

@brief Sets default wifi event handlers for STA interface

esp_wifi_set_event_mask

@brief Set mask to enable or disable some WiFi events

esp_wifi_set_mac

@brief Set MAC address of the ESP32 WiFi station or the soft-AP interface.

esp_wifi_set_max_tx_power

@brief Set maximum transmitting power after WiFi start.

esp_wifi_set_mode

@brief Set the WiFi operating mode

esp_wifi_set_promiscuous

@brief Enable the promiscuous mode.

esp_wifi_set_promiscuous_ctrl_filter

@brief Enable subtype filter of the control packet in promiscuous mode.

esp_wifi_set_promiscuous_filter

@brief Enable the promiscuous mode packet type filter.

esp_wifi_set_promiscuous_rx_cb

@brief Register the RX callback function in the promiscuous mode.

esp_wifi_set_protocol

@brief Set protocol type of specified interface The default protocol is (WIFI_PROTOCOL_11B|WIFI_PROTOCOL_11G|WIFI_PROTOCOL_11N)

esp_wifi_set_ps

@brief Set current WiFi power save type

esp_wifi_set_storage

@brief Set the WiFi API configuration storage type

esp_wifi_set_vendor_ie

@brief Set 802.11 Vendor-Specific Information Element

esp_wifi_set_vendor_ie_cb

@brief Register Vendor-Specific Information Element monitoring callback.

esp_wifi_sta_get_ap_info

@brief Get information of AP which the ESP32 station is associated with

esp_wifi_start

@brief Start WiFi according to current configuration If mode is WIFI_MODE_STA, it create station control block and start station If mode is WIFI_MODE_AP, it create soft-AP control block and start soft-AP If mode is WIFI_MODE_APSTA, it create soft-AP and station control block and start soft-AP and station

esp_wifi_stop

@brief Stop WiFi If mode is WIFI_MODE_STA, it stop station and free station control block If mode is WIFI_MODE_AP, it stop soft-AP and free soft-AP control block If mode is WIFI_MODE_APSTA, it stop station/soft-AP and free station/soft-AP control block

ets_delay_us

@brief CPU do while loop for some time. In FreeRTOS task, please call FreeRTOS apis.

ets_get_cpu_frequency

@brief Get the real CPU ticks per us to the ets. This function do not return real CPU ticks per us, just the record in ets. It can be used to check with the real CPU frequency.

ets_get_detected_xtal_freq

@brief Get xtal_freq value, If value not stored in RTC_STORE5, than store.

ets_get_xtal_scale

@brief Get xtal_freq/analog_8M*256 value calibrated in rtc module.

ets_install_putc1

@brief Ets_printf have two output functions: putc1 and putc2, both of which will be called if need ouput. To install putc1, which is defaulted installed as ets_write_char_uart in none silent boot mode, as NULL in silent mode.

ets_install_putc2

@brief Ets_printf have two output functions: putc1 and putc2, both of which will be called if need ouput. To install putc2, which is defaulted installed as NULL.

ets_install_uart_printf

@brief Install putc1 as ets_write_char_uart. In silent boot mode(to void interfere the UART attached MCU), we can call this function, after booting ok.

ets_intr_lock

@brief Lock the interrupt to level 2. This function direct set the CPU registers. In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_intr_unlock

@brief Unlock the interrupt to level 0. This function direct set the CPU registers. In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_isr_attach

@brief Attach a interrupt handler to a CPU interrupt number. This function equals to _xtos_set_interrupt_handler_arg(i, func, arg). In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_isr_mask

@brief Mask the interrupts which show in mask bits. This function equals to _xtos_ints_off(mask). In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_isr_unmask

@brief Unmask the interrupts which show in mask bits. This function equals to _xtos_ints_on(mask). In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_post

@brief Post an event to an Task.

ets_printf

@brief Printf the strings to uart or other devices, similar with printf, simple than printf. Can not print float point data format, or longlong data format. So we maybe only use this in ROM.

ets_run

@brief Start the Espressif Task Scheduler, which is an infinit loop. Please do not add code after it.

ets_set_appcpu_boot_addr

@brief Set App cpu Entry code, code can be called in PRO CPU. When APP booting is completed, APP CPU will call the Entry code if not NULL.

ets_set_idle_cb

@brief Set the Idle callback, when Tasks are processed, will call the callback before CPU goto sleep.

ets_set_startup_callback

@brief Set Pro cpu Startup code, code can be called when booting is not completed, or in Entry code. When Entry code completed, CPU will call the Startup code if not NULL, else call ets_run.

ets_set_user_start

@brief Set Pro cpu Entry code, code can be called in PRO CPU when booting is not completed. When Pro CPU booting is completed, Pro CPU will call the Entry code if not NULL.

ets_task

@brief Init a task with processer, priority, queue to receive Event, queue length.

ets_timer_arm

@brief Arm an ets timer, this timer range is 640 us to 429496 ms. In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_timer_arm_us

@brief Arm an ets timer, this timer range is 640 us to 429496 ms. In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_timer_deinit

@brief In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_timer_disarm

@brief Disarm an ets timer. In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_timer_done

@brief Unset timer callback and argument to NULL. In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_timer_init

@brief Init ets timer, this timer range is 640 us to 429496 ms In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_timer_setfn

@brief Set timer callback and argument. In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_unpack_flash_code

@brief unpack the image in flash to iram and dram, using cache, maybe decrypting.

ets_unpack_flash_code_legacy

@brief unpack the image in flash to iram and dram, no using cache.

ets_update_cpu_frequency

@brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate. Call this function when CPU frequency is changed.

ets_update_cpu_frequency_rom

@brief Set the real CPU ticks per us to the ets, so that ets_delay_us will be accurate.

ets_waiti0

@brief Unlock the interrupt to level 0, and CPU will go into power save mode(wait interrupt). This function direct set the CPU registers. In FreeRTOS, please call FreeRTOS apis, never call this api.

ets_write_char_uart

@brief Output a char to uart, which uart to output(which is in uart module in ROM) is not in scope of the function. Can not print float point data format, or longlong data format

execl
execle
execlp
execlpe
execv
execve
execvp
exit
explicit_bzero
faccessat
fchdir
fchmod
fchmodat
fchown
fchownat
fclose
fcntl
fdatasync
fdopen
feof
feof_unlocked
ferror
ferror_unlocked
fexecve
fflush
fflush_unlocked
ffs
ffsl
ffsll
fgetc
fgetc_unlocked
fgetpos
fgets
fileno
fileno_unlocked
fiprintf
fiscanf
flock
flockfile
fls
flsl
flsll
fmemopen
fopen
fork
fpathconf
fprintf
fpurge
fputc
fputc_unlocked
fputs
fread
fread_unlocked
free
freopen
fscanf
fseek
fseeko
fsetpos
fstat
fstatat
fsync
ftell
ftello
ftruncate
ftrylockfile
funlockfile
funopen
futimens
futimes
fwrite
fwrite_unlocked
getc
getc_unlocked
getchar
getchar_unlocked
getcwd
getdomainname
getdtablesize
getegid
getentropy
getenv
geteuid
getgid
getgroups
gethostid
gethostname
getitimer
getlogin
getopt
getpagesize
getpass
getpeereid
getpgid
getpgrp
getpid
getppid
gets
getsid
getsubopt
gettimeofday
getuid
getusershell
getw
getwd
gmtime
gmtime_r
gpio_config

@brief GPIO common configuration

gpio_deep_sleep_hold_dis

@brief Disable all digital gpio pad hold function during Deep-sleep.

gpio_deep_sleep_hold_en

@brief Enable all digital gpio pad hold function during Deep-sleep.

gpio_get_drive_capability

@brief Get GPIO pad drive capability

gpio_get_level

@brief GPIO get input level

gpio_hold_dis

@brief Disable gpio pad hold function.

gpio_hold_en

@brief Enable gpio pad hold function.

gpio_init

@brief Initialize GPIO. This includes reading the GPIO Configuration DataSet to initialize "output enables" and pin configurations for each gpio pin. Please do not call this function in SDK.

gpio_input_get

@brief Sample the value of GPIO input pins(0-31) and returns a bitmask.

gpio_input_get_high

@brief Sample the value of GPIO input pins(32-39) and returns a bitmask.

gpio_install_isr_service

@brief Install the driver's GPIO ISR handler service, which allows per-pin GPIO interrupt handlers.

gpio_intr_ack

@brief Ack gpio interrupts to process pending interrupts. Please do not call this function in SDK.

gpio_intr_ack_high

@brief Ack gpio interrupts to process pending interrupts. Please do not call this function in SDK.

gpio_intr_disable

@brief Disable GPIO module interrupt signal

gpio_intr_enable

@brief Enable GPIO module interrupt signal

gpio_intr_handler_register

@brief Register an application-specific interrupt handler for GPIO pin interrupts. Once the interrupt handler is called, it will not be called again until after a call to gpio_intr_ack. Please do not call this function in SDK.

gpio_intr_pending

@brief Get gpio interrupts which happens but not processed. Please do not call this function in SDK.

gpio_intr_pending_high

@brief Get gpio interrupts which happens but not processed. Please do not call this function in SDK.

gpio_iomux_in

@brief Set pad input to a peripheral signal through the IOMUX. @param gpio_num GPIO number of the pad. @param signal_idx Peripheral signal id to input. One of the *_IN_IDX signals in soc/gpio_sig_map.h.

gpio_iomux_out

@brief Set peripheral output to an GPIO pad through the IOMUX. @param gpio_num gpio_num GPIO number of the pad. @param func The function number of the peripheral pin to output pin. One of the FUNC_X_* of specified pin (X) in soc/io_mux_reg.h. @param oen_inv True if the output enable needs to be inverted, otherwise False.

gpio_isr_handler_add

@brief Add ISR handler for the corresponding GPIO pin.

gpio_isr_handler_remove

@brief Remove ISR handler for the corresponding GPIO pin.

gpio_isr_register

@brief Register GPIO interrupt handler, the handler is an ISR. The handler will be attached to the same CPU core that this function is running on.

gpio_matrix_in

@brief set gpio input to a signal, one gpio can input to several signals.

gpio_matrix_out

@brief set signal output to gpio, one signal can output to several gpios.

gpio_output_set

@brief Change GPIO(0-31) pin output by setting, clearing, or disabling pins, GPIO0<->BIT(0). There is no particular ordering guaranteed; so if the order of writes is significant, calling code should divide a single call into multiple calls.

gpio_output_set_high

@brief Change GPIO(32-39) pin output by setting, clearing, or disabling pins, GPIO32<->BIT(0). There is no particular ordering guaranteed; so if the order of writes is significant, calling code should divide a single call into multiple calls.

gpio_pad_hold

@brief Hold the pad from gpio number.

gpio_pad_pulldown

@brief Pull down the pad from gpio number.

gpio_pad_pullup

@brief Pull up the pad from gpio number.

gpio_pad_select_gpio

@brief Select pad as a gpio function from IOMUX.

gpio_pad_set_drv

@brief Set pad driver capability.

gpio_pad_unhold

@brief Unhold the pad from gpio number.

gpio_pin_wakeup_disable

@brief disable GPIOs to wakeup the ESP32. Please do not call this function in SDK.

gpio_pin_wakeup_enable

@brief Set GPIO to wakeup the ESP32. Please do not call this function in SDK.

gpio_pulldown_dis

@brief Disable pull-down on GPIO.

gpio_pulldown_en

@brief Enable pull-down on GPIO.

gpio_pullup_dis

@brief Disable pull-up on GPIO.

gpio_pullup_en

@brief Enable pull-up on GPIO.

gpio_reset_pin

@brief Reset an gpio to default state (select gpio function, enable pullup and disable input and output).

gpio_set_direction

@brief GPIO set direction

gpio_set_drive_capability

@brief Set GPIO pad drive capability

gpio_set_intr_type

@brief GPIO set interrupt trigger type

gpio_set_level

@brief GPIO set output level

gpio_set_pull_mode

@brief Configure GPIO pull-up/pull-down resistors

gpio_uninstall_isr_service

@brief Uninstall the driver's GPIO ISR service, freeing related resources.

gpio_wakeup_disable

@brief Disable GPIO wake-up function.

gpio_wakeup_enable

@brief Enable GPIO wake-up function.

hall_sensor_read

@brief Read Hall Sensor

heap_caps_aligned_alloc

@brief Allocate a aligned chunk of memory which has the given capabilities

heap_caps_aligned_calloc

@brief Allocate a aligned chunk of memory which has the given capabilities. The initialized value in the memory is set to zero.

heap_caps_aligned_free

@brief Used to deallocate memory previously allocated with heap_caps_aligned_alloc

heap_caps_calloc

@brief Allocate a chunk of memory which has the given capabilities. The initialized value in the memory is set to zero.

heap_caps_calloc_prefer

@brief Allocate a chunk of memory as preference in decreasing order.

heap_caps_check_integrity

@brief Check integrity of all heaps with the given capabilities.

heap_caps_check_integrity_addr

@brief Check integrity of heap memory around a given address.

heap_caps_check_integrity_all

@brief Check integrity of all heap memory in the system.

heap_caps_dump

@brief Dump the full structure of all heaps with matching capabilities.

heap_caps_dump_all

@brief Dump the full structure of all heaps.

heap_caps_free

@brief Free memory previously allocated via heap_caps_malloc() or heap_caps_realloc().

heap_caps_get_allocated_size

@brief Return the size that a particular pointer was allocated with.

heap_caps_get_free_size

@brief Get the total free size of all the regions that have the given capabilities

heap_caps_get_info

@brief Get heap info for all regions with the given capabilities.

heap_caps_get_largest_free_block

@brief Get the largest free block of memory able to be allocated with the given capabilities.

heap_caps_get_minimum_free_size

@brief Get the total minimum free memory of all regions with the given capabilities

heap_caps_get_total_size

@brief Get the total size of all the regions that have the given capabilities

heap_caps_malloc

@brief Allocate a chunk of memory which has the given capabilities

heap_caps_malloc_extmem_enable

@brief Enable malloc() in external memory and set limit below which malloc() attempts are placed in internal memory.

heap_caps_malloc_prefer

@brief Allocate a chunk of memory as preference in decreasing order.

heap_caps_print_heap_info

@brief Print a summary of all memory with the given capabilities.

heap_caps_realloc

@brief Reallocate memory previously allocated via heap_caps_malloc() or heap_caps_realloc().

heap_caps_realloc_prefer

@brief Allocate a chunk of memory as preference in decreasing order.

heap_caps_register_failed_alloc_callback

@brief registers a callback function to be invoked if a memory allocation operation fails @param callback caller defined callback to be invoked @return ESP_OK if callback was registered.

i2c_driver_install

@brief I2C driver install

i2c_driver_delete

@brief I2C driver delete

i2c_param_config

@brief I2C parameter initialization

i2c_reset_tx_fifo

@brief reset I2C tx hardware fifo

i2c_reset_rx_fifo

@brief reset I2C rx fifo

i2c_isr_register

@brief I2C isr handler register

i2c_isr_free

@brief to delete and free I2C isr.

i2c_set_pin

@brief Configure GPIO signal for I2C sck and sda

i2c_cmd_link_create

@brief Create and init I2C command link @note Before we build I2C command link, we need to call i2c_cmd_link_create() to create a command link. After we finish sending the commands, we need to call i2c_cmd_link_delete() to release and return the resources.

i2c_cmd_link_delete

@brief Free I2C command link @note Before we build I2C command link, we need to call i2c_cmd_link_create() to create a command link. After we finish sending the commands, we need to call i2c_cmd_link_delete() to release and return the resources.

i2c_master_start

@brief Queue command for I2C master to generate a start signal @note Only call this function in I2C master mode Call i2c_master_cmd_begin() to send all queued commands

i2c_master_write_byte

@brief Queue command for I2C master to write one byte to I2C bus @note Only call this function in I2C master mode Call i2c_master_cmd_begin() to send all queued commands

i2c_master_write

@brief Queue command for I2C master to write buffer to I2C bus @note Only call this function in I2C master mode Call i2c_master_cmd_begin() to send all queued commands

i2c_master_read_byte

@brief Queue command for I2C master to read one byte from I2C bus @note Only call this function in I2C master mode Call i2c_master_cmd_begin() to send all queued commands

i2c_master_read

@brief Queue command for I2C master to read data from I2C bus @note Only call this function in I2C master mode Call i2c_master_cmd_begin() to send all queued commands

i2c_master_stop

@brief Queue command for I2C master to generate a stop signal @note Only call this function in I2C master mode Call i2c_master_cmd_begin() to send all queued commands

i2c_master_cmd_begin

@brief I2C master send queued commands. This function will trigger sending all queued commands. The task will be blocked until all the commands have been sent out. The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks, you need to take care of the multi-thread issue. @note Only call this function in I2C master mode

i2c_slave_write_buffer

@brief I2C slave write data to internal ringbuffer, when tx fifo empty, isr will fill the hardware fifo from the internal ringbuffer @note Only call this function in I2C slave mode

i2c_slave_read_buffer

@brief I2C slave read data from internal buffer. When I2C slave receive data, isr will copy received data from hardware rx fifo to internal ringbuffer. Then users can read from internal ringbuffer. @note Only call this function in I2C slave mode

i2c_set_period

@brief set I2C master clock period

i2c_get_period

@brief get I2C master clock period

i2c_filter_enable

@brief enable hardware filter on I2C bus Sometimes the I2C bus is disturbed by high frequency noise(about 20ns), or the rising edge of the SCL clock is very slow, these may cause the master state machine broken. enable hardware filter can filter out high frequency interference and make the master more stable. @note Enable filter will slow the SCL clock.

i2c_filter_disable

@brief disable filter on I2C bus

i2c_set_start_timing

@brief set I2C master start signal timing

i2c_get_start_timing

@brief get I2C master start signal timing

i2c_set_stop_timing

@brief set I2C master stop signal timing

i2c_get_stop_timing

@brief get I2C master stop signal timing

i2c_set_data_timing

@brief set I2C data signal timing

i2c_get_data_timing

@brief get I2C data signal timing

i2c_set_timeout

@brief set I2C timeout value @param i2c_num I2C port number @param timeout timeout value for I2C bus (unit: APB 80Mhz clock cycle) @return - ESP_OK Success - ESP_ERR_INVALID_ARG Parameter error

i2c_get_timeout

@brief get I2C timeout value @param i2c_num I2C port number @param timeout pointer to get timeout value @return - ESP_OK Success - ESP_ERR_INVALID_ARG Parameter error

i2c_set_data_mode

@brief set I2C data transfer mode

i2c_get_data_mode

@brief get I2C data transfer mode

i2s_hal_reset_fifo

@brief Reset I2S fifo

i2s_hal_set_tx_mode

@brief Set I2S tx mode

i2s_hal_set_rx_mode

@brief Set I2S rx mode

i2s_hal_set_in_link

@brief Set I2S in link

i2s_hal_get_tx_pdm

@brief Get I2S tx pdm

i2s_hal_set_clk_div

@brief Set I2S clk div

i2s_hal_set_tx_bits_mod

@brief Set I2S tx bits mod

i2s_hal_set_rx_bits_mod

@brief Set I2S rx bits mod

i2s_hal_reset

@brief Reset I2S tx

i2s_hal_start_tx

@brief Start I2S tx

i2s_hal_start_rx

@brief Start I2S rx

i2s_hal_stop_tx

@brief Stop I2S tx

i2s_hal_stop_rx

@brief Stop I2S rx

i2s_hal_config_param

@brief Config I2S param

i2s_hal_enable_master_mode

@brief Enable I2S master mode

i2s_hal_enable_slave_mode

@brief Enable I2S slave mode

i2s_hal_init

@brief Init the I2S hal and set the I2S to the default configuration. This function should be called first before other hal layer function is called

i2s_set_pin

@brief Set I2S pin number

i2s_set_pdm_rx_down_sample

@brief Set PDM mode down-sample rate In PDM RX mode, there would be 2 rounds of downsample process in hardware. In the first downsample process, the sampling number can be 16 or 8. In the second downsample process, the sampling number is fixed as 8. So the clock frequency in PDM RX mode would be (fpcm * 64) or (fpcm * 128) accordingly. @param i2s_num I2S_NUM_0, I2S_NUM_1 @param dsr i2s RX down sample rate for PDM mode.

i2s_set_dac_mode

@brief Set I2S dac mode, I2S built-in DAC is disabled by default

i2s_driver_install

@brief Install and start I2S driver.

i2s_driver_uninstall

@brief Uninstall I2S driver.

i2s_write

@brief Write data to I2S DMA transmit buffer.

i2s_write_expand

@brief Write data to I2S DMA transmit buffer while expanding the number of bits per sample. For example, expanding 16-bit PCM to 32-bit PCM.

i2s_read

@brief Read data from I2S DMA receive buffer

i2s_set_sample_rates

@brief Set sample rate used for I2S RX and TX.

i2s_stop

@brief Stop I2S driver

i2s_start

@brief Start I2S driver

i2s_zero_dma_buffer

@brief Zero the contents of the TX DMA buffer.

i2s_set_clk

@brief Set clock & bit width used for I2S RX and TX.

i2s_get_clk

@brief get clock set on particular port number.

i2s_set_adc_mode

@brief Set built-in ADC mode for I2S DMA, this function will initialize ADC pad, and set ADC parameters. @param adc_unit SAR ADC unit index @param adc_channel ADC channel index @return - ESP_OK Success - ESP_ERR_INVALID_ARG Parameter error

i2s_adc_enable

@brief Start to use I2S built-in ADC mode @note This function would acquire the lock of ADC to prevent the data getting corrupted during the I2S peripheral is being used to do fully continuous ADC sampling.

i2s_adc_disable

@brief Stop to use I2S built-in ADC mode @param i2s_num i2s port index @note This function would release the lock of ADC so that other tasks can use ADC. @return - ESP_OK Success - ESP_ERR_INVALID_ARG Parameter error - ESP_ERR_INVALID_STATE Driver state error

imaxabs
imaxdiv
index
initstate
intr_matrix_set

@brief Attach an CPU interrupt to a hardware source. We have 4 steps to use an interrupt: 1.Attach hardware interrupt source to CPU. intr_matrix_set(0, ETS_WIFI_MAC_INTR_SOURCE, ETS_WMAC_INUM); 2.Set interrupt handler. xt_set_interrupt_handler(ETS_WMAC_INUM, func, NULL); 3.Enable interrupt for CPU. xt_ints_on(1 << ETS_WMAC_INUM); 4.Enable interrupt in the module.

ioctl
ip4_addr_netmask_valid
ip4addr_aton
ip4addr_ntoa

returns ptr to static buffer; not reentrant!

ip4addr_ntoa_r
ip6addr_aton
ip6addr_ntoa

returns ptr to static buffer; not reentrant!

ip6addr_ntoa_r
ip4_addr_isbroadcast_u32
ipaddr_addr
ipaddr_aton
ipaddr_ntoa
ipaddr_ntoa_r
iprintf
iruserok
isalnum
isalnum_l
isalpha
isalpha_l
isascii
isascii_l
isatty
isblank
isblank_l
iscanf
iscntrl
iscntrl_l
isdigit
isdigit_l
isgraph
isgraph_l
islower
islower_l
isprint
isprint_l
ispunct
ispunct_l
issetugid
isspace
isspace_l
isupper
isupper_l
isxdigit
isxdigit_l
itoa
jrand48
kill
killpg
l64a
labs
lchown
lcong48
ldiv
link
linkat
llabs
lldiv
localtime
localtime_r
lockf
lrand48
lseek
lutimes
lwip_accept
lwip_bind
lwip_close
lwip_connect
lwip_fcntl
lwip_freeaddrinfo
lwip_getaddrinfo
lwip_gethostbyname
lwip_gethostbyname_r
lwip_getpeername
lwip_getsockname
lwip_getsockopt
lwip_htonl
lwip_htons
lwip_inet_ntop
lwip_inet_pton
lwip_ioctl
lwip_itoa
lwip_listen
lwip_poll
lwip_read
lwip_readv
lwip_recv
lwip_recvfrom
lwip_recvmsg
lwip_select
lwip_send
lwip_sendmsg
lwip_sendto
lwip_setsockopt
lwip_shutdown
lwip_socket
lwip_socket_thread_cleanup
lwip_socket_thread_init
lwip_strerr
lwip_stricmp
lwip_strnicmp
lwip_strnstr
lwip_write
lwip_writev
malloc
mblen
mbstowcs
mbtowc
mem_calloc
mem_free
mem_init
mem_malloc
mem_trim
memccpy
memchr
memcmp
memcpy
memmove
memp_free
memp_free_pool
memp_init
memp_init_pool
memp_malloc
memp_malloc_pool
memset
mkdir
mkdirat
mkdtemp
mkfifo
mkfifoat
mknodat
mkstemp
mkstemps
mktemp
mktime
mrand48
multi_heap_aligned_alloc

@brief allocate a chunk of memory with specific alignment

multi_heap_aligned_free

@brief free() a buffer aligned in a given heap.

multi_heap_check

@brief Check heap integrity

multi_heap_dump

@brief Dump heap information to stdout

multi_heap_free

@brief free() a buffer in a given heap.

multi_heap_free_size

@brief Return free heap size

multi_heap_get_allocated_size

@brief Return the size that a particular pointer was allocated with.

multi_heap_get_info

@brief Return metadata about a given heap

multi_heap_malloc

@brief malloc() a buffer in a given heap

multi_heap_minimum_free_size

@brief Return the lifetime minimum free heap size

multi_heap_realloc

@brief realloc() a buffer in a given heap.

multi_heap_register

@brief Register a new heap for use

multi_heap_set_lock

@brief Associate a private lock pointer with a heap

nanosleep
netif_add
netif_add_ip6_address
netif_add_noaddr
netif_create_ip6_linklocal_address
netif_find
netif_get_by_index
netif_get_ip6_addr_match
netif_index_to_name
netif_init
netif_input
netif_ip6_addr_set
netif_ip6_addr_set_parts
netif_ip6_addr_set_state
netif_loop_output
netif_name_to_index
netif_poll
netif_remove
netif_set_addr
netif_set_default
netif_set_down
netif_set_gw
netif_set_ipaddr
netif_set_link_down
netif_set_link_up
netif_set_netmask
netif_set_up
nice
nrand48
nvs_close

@brief Close the storage handle and free any allocated resources

nvs_commit

@brief Write any pending changes to non-volatile storage

nvs_entry_find

@brief Create an iterator to enumerate NVS entries based on one or more parameters

nvs_entry_info

@brief Fills nvs_entry_info_t structure with information about entry pointed to by the iterator.

nvs_entry_next

@brief Returns next item matching the iterator criteria, NULL if no such item exists.

nvs_erase_all

@brief Erase all key-value pairs in a namespace

nvs_erase_key

@brief Erase key-value pair with given key name.

nvs_flash_deinit

@brief Deinitialize NVS storage for the default NVS partition

nvs_flash_deinit_partition

@brief Deinitialize NVS storage for the given NVS partition

nvs_flash_erase

@brief Erase the default NVS partition

nvs_flash_erase_partition

@brief Erase specified NVS partition

nvs_flash_generate_keys

@brief Generate and store NVS keys in the provided esp partition

nvs_flash_init

@brief Initialize the default NVS partition.

nvs_flash_init_partition

@brief Initialize NVS flash storage for the specified partition.

nvs_flash_read_security_cfg

@brief Read NVS security configuration from a partition.

nvs_flash_secure_init

@brief Initialize the default NVS partition.

nvs_flash_secure_init_partition

@brief Initialize NVS flash storage for the specified partition.

nvs_get_blob
nvs_get_i8

@{*/ @brief get value for given key

nvs_get_i16
nvs_get_i32
nvs_get_i64
nvs_get_stats

@brief Fill structure nvs_stats_t. It provides info about used memory the partition.

nvs_get_str

@brief get value for given key

nvs_get_u8
nvs_get_u16
nvs_get_u32
nvs_get_u64
nvs_get_used_entry_count

@brief Calculate all entries in a namespace.

nvs_open

@brief Open non-volatile storage with a given namespace from the default NVS partition

nvs_open_from_partition

@brief Open non-volatile storage with a given namespace from specified partition

nvs_release_iterator

@brief Release iterator

nvs_set_blob

@brief set variable length binary value for given key

nvs_set_i8

@{*/ @brief set value for given key

nvs_set_i16
nvs_set_i32
nvs_set_i64
nvs_set_str
nvs_set_u8
nvs_set_u16
nvs_set_u32
nvs_set_u64
on_exit
open
open_memstream
openat
pathconf
pause
pbuf_add_header
pbuf_add_header_force
pbuf_alloc
pbuf_alloc_reference
pbuf_alloced_custom
pbuf_cat
pbuf_chain
pbuf_clen
pbuf_clone
pbuf_coalesce
pbuf_copy
pbuf_copy_partial
pbuf_dechain
pbuf_free
pbuf_free_header
pbuf_get_at
pbuf_get_contiguous
pbuf_header
pbuf_header_force
pbuf_memcmp
pbuf_memfind
pbuf_put_at
pbuf_realloc
pbuf_ref
pbuf_remove_header
pbuf_skip
pbuf_strstr
pbuf_take
pbuf_take_at
pbuf_try_get_at
pcTaskGetTaskName

Get task name

pclose
periph_module_disable

@brief disable peripheral module

periph_module_enable

@brief enable peripheral module

periph_module_reset

@brief reset peripheral module

perror
pipe
poll
popen
posix_memalign
pread
printf
pselect
psignal
pthread_atfork
pthread_kill
pthread_sigmask
putc
putc_unlocked
putchar
putchar_unlocked
putenv
puts
putw
pvTaskGetThreadLocalStoragePointer

Get local storage pointer specific to the given task.

pvTaskIncrementMutexHeldCount
pwrite
pxPortInitialiseStack
pxTaskGetStackStart

Returns the start of the stack associated with xTask.

qsort
qsort_r
quick_exit
raise
rand
rand_r
random
read
readlink
readlinkat
realloc
reallocarray
reallocf
realpath
remove
rename
renameat
revoke
rewind
rindex
rmdir
rpmatch
rresvport
rtc_clk_8m_enable

@brief Enable or disable 8 MHz internal oscillator

rtc_clk_8m_enabled

@brief Get the state of 8 MHz internal oscillator @return true if the oscillator is enabled

rtc_clk_32k_enable

@brief Enable or disable 32 kHz XTAL oscillator @param en true to enable, false to disable

rtc_clk_32k_enable_external

@brief Configure 32 kHz XTAL oscillator to accept external clock signal

rtc_clk_32k_enabled

@brief Get the state of 32k XTAL oscillator @return true if 32k XTAL oscillator has been enabled

rtc_clk_32k_bootstrap

@brief Enable 32k oscillator, configuring it for fast startup time. Note: to achieve higher frequency stability, rtc_clk_32k_enable function must be called one the 32k XTAL oscillator has started up. This function will initially disable the 32k XTAL oscillator, so it should not be called when the system is using 32k XTAL as RTC_SLOW_CLK.

rtc_clk_8md256_enabled

@brief Get the state of /256 divider which is applied to 8MHz clock @return true if the divided output is enabled

rtc_clk_apb_freq_get

@brief Get the current stored APB frequency. @return The APB frequency value as last set via rtc_clk_apb_freq_update(), in Hz.

rtc_clk_apb_freq_update

@brief Store new APB frequency value into RTC_APB_FREQ_REG

rtc_clk_apll_enable

@brief Enable or disable APLL

rtc_clk_cal

@brief Measure RTC slow clock's period, based on main XTAL frequency

rtc_clk_cal_ratio

@brief Measure ratio between XTAL frequency and RTC slow clock frequency @param cal_clk slow clock to be measured @param slow_clk_cycles number of slow clock cycles to average @return average ratio between XTAL frequency and slow clock frequency, Q13.19 fixed point format, or 0 if calibration has timed out.

rtc_clk_cpu_freq_get_config

@brief Get the currently used CPU frequency configuration @param[out] out_config Output, CPU frequency configuration structure

rtc_clk_cpu_freq_mhz_to_config

@brief Get CPU frequency config for a given frequency @param freq_mhz Frequency in MHz @param[out] out_config Output, CPU frequency configuration structure @return true if frequency can be obtained, false otherwise

rtc_clk_cpu_freq_set_config

@brief Switch CPU frequency

rtc_clk_cpu_freq_set_config_fast

@brief Switch CPU frequency (optimized for speed)

rtc_clk_cpu_freq_set_xtal

@brief Switch CPU clock source to XTAL

rtc_clk_cpu_freq_to_config

@brief Get CPU frequency config corresponding to a rtc_cpu_freq_t value @param cpu_freq CPU frequency enumeration value @param[out] out_config Output, CPU frequency configuration structure

rtc_clk_fast_freq_get

@brief Get the RTC_FAST_CLK source @return currently selected clock source (one of rtc_fast_freq_t values)

rtc_clk_fast_freq_set

@brief Select source for RTC_FAST_CLK @param fast_freq clock source (one of rtc_fast_freq_t values)

rtc_clk_init

Initialize clocks and set CPU frequency

rtc_clk_slow_freq_get

@brief Get the RTC_SLOW_CLK source @return currently selected clock source (one of rtc_slow_freq_t values)

rtc_clk_slow_freq_get_hz

@brief Get the approximate frequency of RTC_SLOW_CLK, in Hz

rtc_clk_slow_freq_set

@brief Select source for RTC_SLOW_CLK @param slow_freq clock source (one of rtc_slow_freq_t values)

rtc_clk_wait_for_slow_cycle

@brief Busy loop until next RTC_SLOW_CLK cycle

rtc_clk_xtal_freq_get

@brief Get main XTAL frequency

rtc_clk_xtal_freq_update

@brief Update XTAL frequency

rtc_init

Initialize RTC clock and power control related functions @param cfg configuration options as rtc_config_t

rtc_sleep_init

@brief Prepare the chip to enter sleep mode

rtc_sleep_set_wakeup_time

@brief Set target value of RTC counter for RTC_TIMER_TRIG_EN wakeup source @param t value of RTC counter at which wakeup from sleep will happen; only the lower 48 bits are used

rtc_sleep_start

@brief Enter deep or light sleep mode

rtc_time_get

@brief Get current value of RTC counter

rtc_time_slowclk_to_us

@brief Convert time interval from RTC_SLOW_CLK to microseconds @param time_in_us Time interval in RTC_SLOW_CLK cycles @param slow_clk_period Period of slow clock in microseconds, Q13.19 fixed point format (as returned by rtc_slowck_cali). @return time interval in microseconds

rtc_time_us_to_slowclk

@brief Convert time interval from microseconds to RTC_SLOW_CLK cycles @param time_in_us Time interval in microseconds @param slow_clk_period Period of slow clock in microseconds, Q13.19 fixed point format (as returned by rtc_slowck_cali). @return number of slow clock cycles

rtc_vddsdio_get_config

Get current VDDSDIO configuration If VDDSDIO configuration is overridden by RTC, get values from RTC Otherwise, if VDDSDIO is configured by EFUSE, get values from EFUSE Otherwise, use default values and the level of MTDI bootstrapping pin. @return currently used VDDSDIO configuration

rtc_vddsdio_set_config

Set new VDDSDIO configuration using RTC registers. If config.force == 1, this overrides configuration done using bootstrapping pins and EFUSE.

ruserok
sbrk
scanf
sched_yield
seed48
select
setbuf
setbuffer
setdtablesize
setegid
setenv
seteuid
setgid
setgroups
sethostname
setitimer
setlinebuf
setpgid
setpgrp
setregid
setreuid
setsid
setstate
settimeofday
setuid
setusershell
setvbuf
sigaction
sigaddset
sigaltstack
sigdelset
sigemptyset
sigfillset
sigismember
signal
sigpause
sigpending
sigprocmask
sigqueue
sigsuspend
sigtimedwait
sigwait
sigwaitinfo
siprintf
siscanf
sleep
sniprintf
snprintf
sntp_get_sync_interval

@brief Get the sync interval of SNTP operation

sntp_get_sync_mode

@brief Get set sync mode

sntp_get_sync_status

@brief Get status of time sync

sntp_restart

@brief Restart SNTP

sntp_set_sync_interval

@brief Set the sync interval of SNTP operation

sntp_set_sync_mode

@brief Set the sync mode

sntp_set_sync_status

@brief Set status of time sync

sntp_set_time_sync_notification_cb

@brief Set a callback function for time synchronization notification

sntp_sync_time

@brief This function updates the system time.

soc_get_available_memory_region_max_count
soc_get_available_memory_regions
spi_flash_cache2phys

@brief Given a memory address where flash is mapped, return the corresponding physical flash offset.

spi_flash_cache_enabled

@brief Check at runtime if flash cache is enabled on both CPUs

spi_flash_enable_cache

@brief Re-enable cache for the core defined as cpuid parameter.

spi_flash_erase_range

@brief Erase a range of flash sectors

spi_flash_erase_sector

@brief Erase the Flash sector.

spi_flash_get_chip_size

@brief Get flash chip size, as set in binary image header

spi_flash_guard_get

@brief Get the guard functions used for flash access

spi_flash_guard_set

@brief Sets guard functions to access flash.

spi_flash_init

@brief Initialize SPI flash access driver

spi_flash_mmap

@brief Map region of flash memory into data or instruction address space

spi_flash_mmap_dump

@brief Display information about mapped regions

spi_flash_mmap_get_free_pages

@brief get free pages number which can be mmap

spi_flash_mmap_pages

@brief Map sequences of pages of flash memory into data or instruction address space

spi_flash_munmap

@brief Release region previously obtained using spi_flash_mmap

spi_flash_phys2cache

@brief Given a physical offset in flash, return the address where it is mapped in the memory space.

spi_flash_read

@brief Read data from Flash.

spi_flash_read_encrypted

@brief Read data from Encrypted Flash.

spi_flash_wrap_set

@brief set wrap mode of flash

spi_flash_write

@brief Write data to Flash.

spi_flash_write_encrypted

@brief Write data encrypted to Flash.

sprintf
srand
srand48
srandom
sscanf
stat
stpcpy
stpncpy
strcasecmp
strcasecmp_l
strcat
strchr
strcmp
strcoll
strcoll_l
strcpy
strcspn
strdup
strerror
strerror_l
strerror_r
strftime
strftime_l
strlcat
strlcpy
strlen
strlwr
strncasecmp
strncasecmp_l
strncat
strncmp
strncpy
strndup
strnlen
strnstr
strpbrk
strrchr
strsep
strsignal
strspn
strstr
strtod
strtof
strtoimax
strtoimax_l
strtok
strtok_r
strtol
strtold
strtoll
strtoul
strtoull
strtoumax
strtoumax_l
strupr
strxfrm
strxfrm_l
symlink
symlinkat
sync
sys_delay_ms
sys_thread_sem_deinit
sys_thread_sem_get
sys_thread_sem_init
sysconf
system
tcgetpgrp
tcsetpgrp
tempnam
time
timer_create
timer_delete
timer_getoverrun
timer_gettime
timer_settime
timingsafe_bcmp
timingsafe_memcmp
tmpfile
tmpnam
toascii
toascii_l
tolower
tolower_l
touch_pad_clear_group_mask

@brief Clear touch sensor group mask. Touch pad module has two sets of signals, Interrupt is triggered only if at least one of touch pad in this group is "touched". This function will clear the register bits according to the given bitmask. @param set1_mask bitmask touch sensor signal group1, it's a 10-bit value @param set2_mask bitmask touch sensor signal group2, it's a 10-bit value @param en_mask bitmask of touch sensor work enable, it's a 10-bit value @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_clear_status

@brief To clear the touch sensor channel active status.

touch_pad_config

@brief Configure touch pad interrupt threshold.

touch_pad_deinit

@brief Un-install touch pad driver. @note After this function is called, other touch functions are prohibited from being called. @return - ESP_OK Success - ESP_FAIL Touch pad driver not initialized

touch_pad_filter_delete

@brief delete touch pad filter driver and release the memory Need to call touch_pad_filter_start before all touch filter APIs @return - ESP_OK Success - ESP_ERR_INVALID_STATE driver state error

touch_pad_filter_start

@brief start touch pad filter function This API will start a filter to process the noise in order to prevent false triggering when detecting slight change of capacitance. Need to call touch_pad_filter_start before all touch filter APIs

touch_pad_filter_stop

@brief stop touch pad filter function Need to call touch_pad_filter_start before all touch filter APIs @return - ESP_OK Success - ESP_ERR_INVALID_STATE driver state error

touch_pad_get_cnt_mode

@brief Get touch sensor charge/discharge speed for each pad @param touch_num touch pad index @param slope pointer to accept touch pad charge/discharge slope @param opt pointer to accept the initial voltage @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_get_filter_period

@brief get touch pad filter calibration period, in ms Need to call touch_pad_filter_start before all touch filter APIs @param p_period_ms pointer to accept period @return - ESP_OK Success - ESP_ERR_INVALID_STATE driver state error - ESP_ERR_INVALID_ARG parameter error

touch_pad_get_fsm_mode

@brief Get touch sensor FSM mode @param mode pointer to accept FSM mode @return - ESP_OK on success

touch_pad_get_group_mask

@brief Get touch sensor group mask. @param set1_mask pointer to accept bitmask of touch sensor signal group1, it's a 10-bit value @param set2_mask pointer to accept bitmask of touch sensor signal group2, it's a 10-bit value @param en_mask pointer to accept bitmask of touch sensor work enable, it's a 10-bit value @return - ESP_OK on success

touch_pad_get_meas_time

@brief Get touch sensor measurement and sleep time @param sleep_cycle Pointer to accept sleep cycle number @param meas_cycle Pointer to accept measurement cycle count. @return - ESP_OK on success

touch_pad_get_status

@brief Get the touch sensor channel active status mask. The bit position represents the channel number. The 0/1 status of the bit represents the trigger status.

touch_pad_get_thresh

@brief Get touch sensor interrupt threshold @param touch_num touch pad index @param threshold pointer to accept threshold @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_get_trigger_mode

@brief Get touch sensor interrupt trigger mode @param mode pointer to accept touch sensor interrupt trigger mode @return - ESP_OK on success

touch_pad_get_trigger_source

@brief Get touch sensor interrupt trigger source @param src pointer to accept touch sensor interrupt trigger source @return - ESP_OK on success

touch_pad_get_voltage

@brief Get touch sensor reference voltage, @param refh pointer to accept DREFH value @param refl pointer to accept DREFL value @param atten pointer to accept the attenuation on DREFH @return - ESP_OK on success

touch_pad_get_wakeup_status

@brief Get the touch pad which caused wakeup from deep sleep. @param pad_num pointer to touch pad which caused wakeup @return - ESP_OK Success - ESP_ERR_INVALID_ARG parameter is NULL

touch_pad_init

@brief Initialize touch module. @note If default parameter don't match the usage scenario, it can be changed after this function. @return - ESP_OK Success - ESP_ERR_NO_MEM Touch pad init error

touch_pad_intr_clear

@brief To clear touch pad interrupt @return - ESP_OK on success

touch_pad_intr_disable

@brief To disable touch pad interrupt @return - ESP_OK on success

touch_pad_intr_enable

@brief To enable touch pad interrupt @return - ESP_OK on success

touch_pad_io_init

@brief Initialize touch pad GPIO @param touch_num touch pad index @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_isr_deregister

@brief Deregister the handler previously registered using touch_pad_isr_handler_register @param fn handler function to call (as passed to touch_pad_isr_handler_register) @param arg argument of the handler (as passed to touch_pad_isr_handler_register) @return - ESP_OK on success - ESP_ERR_INVALID_STATE if a handler matching both fn and arg isn't registered

touch_pad_isr_register

@brief Register touch-pad ISR. The handler will be attached to the same CPU core that this function is running on. @param fn Pointer to ISR handler @param arg Parameter for ISR @return - ESP_OK Success ; - ESP_ERR_INVALID_ARG GPIO error - ESP_ERR_NO_MEM No memory

touch_pad_meas_is_done

@brief Check touch sensor measurement status.

touch_pad_read

@brief get touch sensor counter value. Each touch sensor has a counter to count the number of charge/discharge cycles. When the pad is not 'touched', we can get a number of the counter. When the pad is 'touched', the value in counter will get smaller because of the larger equivalent capacitance.

touch_pad_read_filtered

@brief get filtered touch sensor counter value by IIR filter.

touch_pad_read_raw_data

@brief get raw data (touch sensor counter value) from IIR filter process. Need not request hardware measurements.

touch_pad_set_cnt_mode

@brief Set touch sensor charge/discharge speed for each pad. If the slope is 0, the counter would always be zero. If the slope is 1, the charging and discharging would be slow, accordingly. If the slope is set 7, which is the maximum value, the charging and discharging would be fast. @note The higher the charge and discharge current, the greater the immunity of the touch channel, but it will increase the system power consumption. @param touch_num touch pad index @param slope touch pad charge/discharge speed @param opt the initial voltage @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_set_filter_period

@brief set touch pad filter calibration period, in ms. Need to call touch_pad_filter_start before all touch filter APIs @param new_period_ms filter period, in ms @return - ESP_OK Success - ESP_ERR_INVALID_STATE driver state error - ESP_ERR_INVALID_ARG parameter error

touch_pad_set_filter_read_cb

@brief Register the callback function that is called after each IIR filter calculation. @note The 'read_cb' callback is called in timer task in each filtering cycle. @param read_cb Pointer to filtered callback function. If the argument passed in is NULL, the callback will stop. @return - ESP_OK Success - ESP_ERR_INVALID_ARG set error

touch_pad_set_fsm_mode

@brief Set touch sensor FSM mode, the test action can be triggered by the timer, as well as by the software. @param mode FSM mode @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_set_group_mask

@brief Set touch sensor group mask. Touch pad module has two sets of signals, 'Touched' signal is triggered only if at least one of touch pad in this group is "touched". This function will set the register bits according to the given bitmask. @param set1_mask bitmask of touch sensor signal group1, it's a 10-bit value @param set2_mask bitmask of touch sensor signal group2, it's a 10-bit value @param en_mask bitmask of touch sensor work enable, it's a 10-bit value @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_set_meas_time

@brief Set touch sensor measurement and sleep time. Excessive total time will slow down the touch response. Too small measurement time will not be sampled enough, resulting in inaccurate measurements.

touch_pad_set_thresh

@brief Set touch sensor interrupt threshold @param touch_num touch pad index @param threshold threshold of touchpad count, refer to touch_pad_set_trigger_mode to see how to set trigger mode. @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_set_trigger_mode

@brief Set touch sensor interrupt trigger mode. Interrupt can be triggered either when counter result is less than threshold or when counter result is more than threshold. @param mode touch sensor interrupt trigger mode @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_set_trigger_source

@brief Set touch sensor interrupt trigger source. There are two sets of touch signals. Set1 and set2 can be mapped to several touch signals. Either set will be triggered if at least one of its touch signal is 'touched'. The interrupt can be configured to be generated if set1 is triggered, or only if both sets are triggered. @param src touch sensor interrupt trigger source @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_set_voltage

@brief Set touch sensor high voltage threshold of chanrge. The touch sensor measures the channel capacitance value by charging and discharging the channel. So the high threshold should be less than the supply voltage. @param refh the value of DREFH @param refl the value of DREFL @param atten the attenuation on DREFH @return - ESP_OK on success - ESP_ERR_INVALID_ARG if argument is wrong

touch_pad_sw_start

@brief Trigger a touch sensor measurement, only support in SW mode of FSM @return - ESP_OK on success

toupper
toupper_l
truncate
ttyname
ttyname_r
tzset
ualarm
uart_clear_intr_status

@brief Clear UART interrupt status

uart_disable_intr_mask

@brief Clear UART interrupt enable bits

uart_disable_pattern_det_intr

@brief UART disable pattern detect function. Designed for applications like 'AT commands'. When the hardware detects a series of one same character, the interrupt will be triggered.

uart_disable_rx_intr

@brief Disable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)

uart_disable_tx_intr

@brief Disable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)

uart_driver_delete

@brief Uninstall UART driver.

uart_driver_install

@brief Install UART driver and set the UART to the default configuration.

uart_enable_intr_mask

@brief Set UART interrupt enable

uart_enable_pattern_det_baud_intr

@brief UART enable pattern detect function. Designed for applications like 'AT commands'. When the hardware detect a series of one same character, the interrupt will be triggered.

uart_enable_pattern_det_intr

@brief UART enable pattern detect function. Designed for applications like 'AT commands'. When the hardware detect a series of one same character, the interrupt will be triggered. @note This function only works for esp32. And this function is deprecated, please use uart_enable_pattern_det_baud_intr instead.

uart_enable_rx_intr

@brief Enable UART RX interrupt (RX_FULL & RX_TIMEOUT INTERRUPT)

uart_enable_tx_intr

@brief Enable UART TX interrupt (TX_FULL & TX_TIMEOUT INTERRUPT)

uart_flush

@brief Alias of uart_flush_input. UART ring buffer flush. This will discard all data in the UART RX buffer. @note Instead of waiting the data sent out, this function will clear UART rx buffer. In order to send all the data in tx FIFO, we can use uart_wait_tx_done function. @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).

uart_flush_input

@brief Clear input buffer, discard all the data is in the ring-buffer. @note In order to send all the data in tx FIFO, we can use uart_wait_tx_done function. @param uart_num UART port number, the max port number is (UART_NUM_MAX -1).

uart_get_baudrate

@brief Get the UART baud rate configuration.

uart_get_buffered_data_len

@brief UART get RX ring buffer cached data length

uart_get_collision_flag

@brief Returns collision detection flag for RS485 mode Function returns the collision detection flag into variable pointed by collision_flag. *collision_flag = true, if collision detected else it is equal to false. This function should be executed when actual transmission is completed (after uart_write_bytes()).

uart_get_hw_flow_ctrl

@brief Get the UART hardware flow control configuration.

uart_get_parity

@brief Get the UART parity mode configuration.

uart_get_stop_bits

@brief Get the UART stop bit configuration.

uart_get_wakeup_threshold

@brief Get the number of RX pin signal edges for light sleep wakeup.

uart_get_word_length

@brief Get the UART data bit configuration.

uart_intr_config

@brief Configure UART interrupts.

uart_is_driver_installed

@brief Checks whether the driver is installed or not

uart_isr_free

@brief Free UART interrupt handler registered by uart_isr_register. Must be called on the same core as uart_isr_register was called.

uart_isr_register

@brief Register UART interrupt handler (ISR).

uart_param_config

@brief Set UART configuration parameters.

uart_pattern_get_pos

@brief Return the nearest detected pattern position in buffer. The positions of the detected pattern are saved in a queue, This function do nothing to the queue. @note If the RX buffer is full and flow control is not enabled, the detected pattern may not be found in the rx buffer due to overflow.

uart_pattern_pop_pos

@brief Return the nearest detected pattern position in buffer. The positions of the detected pattern are saved in a queue, this function will dequeue the first pattern position and move the pointer to next pattern position. @note If the RX buffer is full and flow control is not enabled, the detected pattern may not be found in the rx buffer due to overflow.

uart_pattern_queue_reset

@brief Allocate a new memory with the given length to save record the detected pattern position in rx buffer.

uart_read_bytes

@brief UART read bytes from UART buffer

uart_set_always_rx_timeout

@brief Configure behavior of UART RX timeout interrupt.

uart_set_baudrate

@brief Set UART baud rate.

uart_set_dtr

@brief Manually set the UART DTR pin level.

uart_set_hw_flow_ctrl

@brief Set hardware flow control.

uart_set_line_inverse

@brief Set UART line inverse mode

uart_set_loop_back

@brief Configure TX signal loop back to RX module, just for the test usage.

uart_set_mode

@brief UART set communication mode

uart_set_parity

@brief Set UART parity mode.

uart_set_pin

@brief Set UART pin number

uart_set_rts

@brief Manually set the UART RTS pin level. @note UART must be configured with hardware flow control disabled.

uart_set_rx_full_threshold

@brief Set uart threshold value for RX fifo full @note If application is using higher baudrate and it is observed that bytes in hardware RX fifo are overwritten then this threshold can be reduced

uart_set_rx_timeout

@brief UART set threshold timeout for TOUT feature

uart_set_stop_bits

@brief Set UART stop bits.

uart_set_sw_flow_ctrl

@brief Set software flow control.

uart_set_tx_empty_threshold

@brief Set uart threshold values for TX fifo empty

uart_set_tx_idle_num

@brief Set UART idle interval after tx FIFO is empty

uart_set_wakeup_threshold

@brief Set the number of RX pin signal edges for light sleep wakeup

uart_set_word_length

@brief Set UART data bits.

uart_tx_chars

@brief Send data to the UART port from a given buffer and length.

uart_wait_tx_done

@brief Wait until UART TX FIFO is empty.

uart_wait_tx_idle_polling

@brief Wait until UART tx memory empty and the last char send ok (polling mode).

uart_write_bytes

@brief Send data to the UART port from a given buffer and length,

uart_write_bytes_with_break

@brief Send data to the UART port from a given buffer and length,

ucQueueGetQueueType
ulTaskNotifyTake

Simplified macro for receiving task notification.

umask
ungetc
unlink
unlinkat
unsetenv
usleep
utimensat
utimes
utoa
uxListRemove
uxQueueGetQueueNumber
uxQueueMessagesWaiting

Return the number of messages stored in a queue.

uxQueueMessagesWaitingFromISR
uxQueueSpacesAvailable

Return the number of free spaces available in a queue. This is equal to the number of items that can be sent to the queue before the queue becomes full if no items are removed.

uxTaskGetNumberOfTasks

Get current number of tasks

uxTaskGetSnapshotAll
uxTaskGetStackHighWaterMark

Returns the high water mark of the stack associated with xTask.

uxTaskGetSystemState

Get the state of tasks in the system.

uxTaskGetTaskNumber
uxTaskPriorityGet

Obtain the priority of any task.

uxTaskPriorityGetFromISR

A version of uxTaskPriorityGet() that can be used from an ISR.

uxTaskResetEventItemValue
vApplicationSleep
vListInitialise
vListInitialiseItem
vListInsert
vListInsertEnd
vPortAssertIfInISR
vPortEndScheduler
vPortEnterCritical
vPortExitCritical
vPortReleaseTaskMPUSettings
vPortSetStackWatchpoint
vPortStoreTaskMPUSettings
vPortYield
vPortYieldOtherCore
vQueueDelete

Delete a queue - freeing all the memory allocated for storing of items placed on the queue.

vQueueSetQueueNumber
vQueueWaitForMessageRestricted

@cond

vRingbufferDelete

@brief Delete a ring buffer

vRingbufferGetInfo

@brief Get information about ring buffer status

vRingbufferReturnItem

@brief Return a previously-retrieved item to the ring buffer

vRingbufferReturnItemFromISR

@brief Return a previously-retrieved item to the ring buffer from an ISR

vTaskAllocateMPURegions

Memory regions are assigned to a restricted task when the task is created by a call to xTaskCreateRestricted(). These regions can be redefined using vTaskAllocateMPURegions().

vTaskDelay

Delay a task for a given number of ticks.

vTaskDelayUntil

Delay a task until a specified time.

vTaskDelete

Remove a task from the RTOS real time kernel's management.

vTaskEndScheduler

Stops the real time kernel tick.

vTaskGetRunTimeStats

Get the state of running tasks as a string

vTaskList

List all the current tasks.

vTaskMissedYield
vTaskNotifyGiveFromISR

Simplified macro for sending task notification from ISR.

vTaskPlaceOnEventList
vTaskPlaceOnEventListRestricted
vTaskPlaceOnUnorderedEventList
vTaskPriorityInherit
vTaskPrioritySet

Set the priority of any task.

vTaskResume

Resumes a suspended task.

vTaskSetTaskNumber
vTaskSetThreadLocalStoragePointer

Set local storage pointer specific to the given task.

vTaskSetThreadLocalStoragePointerAndDelCallback

Set local storage pointer and deletion callback.

vTaskSetTimeOutState
vTaskStartScheduler

@cond */ Starts the real time kernel tick processing.

vTaskStepTick
vTaskSuspend

Suspend a task.

vTaskSuspendAll

Suspends the scheduler without disabling interrupts.

vTaskSwitchContext
vasiprintf
vasniprintf
vasnprintf
vdiprintf
vdprintf
vfiprintf
vfiscanf
vfork
vfprintf
vfscanf
vhangup
viprintf
viscanf
vprintf
vscanf
vsiprintf
vsiscanf
vsniprintf
vsnprintf
vsprintf
vsscanf
wcstoimax
wcstoimax_l
wcstombs
wcstoumax
wcstoumax_l
wctomb
write
xPortGetTickRateHz
xPortInIsrContext
xPortInterruptedFromISRContext
xPortStartScheduler
xQueueAddToSet

Adds a queue or semaphore to a queue set that was previously created by a call to xQueueCreateSet().

xQueueAltGenericReceive
xQueueAltGenericSend

@cond */ xQueueAltGenericSend() is an alternative version of xQueueGenericSend(). Likewise xQueueAltGenericReceive() is an alternative version of xQueueGenericReceive().

xQueueCRReceive
xQueueCRReceiveFromISR
xQueueCRSend
xQueueCRSendFromISR
xQueueCreateCountingSemaphore
xQueueCreateCountingSemaphoreStatic
xQueueCreateMutex
xQueueCreateMutexStatic
xQueueCreateSet

Queue sets provide a mechanism to allow a task to block (pend) on a read operation from multiple queues or semaphores simultaneously.

xQueueGenericCreate
xQueueGenericReceive

It is preferred that the macro xQueueReceive() be used rather than calling this function directly.

xQueueGenericReset
xQueueGenericSend

It is preferred that the macros xQueueSend(), xQueueSendToFront() and xQueueSendToBack() are used in place of calling this function directly.

xQueueGenericSendFromISR

@{*/ It is preferred that the macros xQueueSendFromISR(), xQueueSendToFrontFromISR() and xQueueSendToBackFromISR() be used in place of calling this function directly. xQueueGiveFromISR() is an equivalent for use by semaphores that don't actually copy any data.

xQueueGetMutexHolder
xQueueGiveFromISR
xQueueGiveMutexRecursive
xQueueIsQueueEmptyFromISR

@{*/ Utilities to query queues that are safe to use from an ISR. These utilities should be used only from witin an ISR, or within a critical section.

xQueueIsQueueFullFromISR
xQueuePeekFromISR

A version of xQueuePeek() that can be called from an interrupt service routine (ISR).

xQueueReceiveFromISR

Receive an item from a queue. It is safe to use this function from within an interrupt service routine.

xQueueRemoveFromSet

Removes a queue or semaphore from a queue set. A queue or semaphore can only be removed from a set if the queue or semaphore is empty.

xQueueSelectFromSet

xQueueSelectFromSet() selects from the members of a queue set a queue or semaphore that either contains data (in the case of a queue) or is available to take (in the case of a semaphore). xQueueSelectFromSet() effectively allows a task to block (pend) on a read operation on all the queues and semaphores in a queue set simultaneously.

xQueueSelectFromSetFromISR

A version of xQueueSelectFromSet() that can be used from an ISR.

xQueueTakeMutexRecursive
xRingbufferAddToQueueSetRead

@brief Add the ring buffer's read semaphore to a queue set.

xRingbufferCanRead

@brief Check if the selected queue set member is the ring buffer's read semaphore

xRingbufferCreate

@brief Create a ring buffer

xRingbufferCreateNoSplit

@brief Create a ring buffer of type RINGBUF_TYPE_NOSPLIT for a fixed item_size

xRingbufferGetCurFreeSize

@brief Get current free size available for an item/data in the buffer

xRingbufferGetMaxItemSize

@brief Get maximum size of an item that can be placed in the ring buffer

xRingbufferPrintInfo

@brief Debugging function to print the internal pointers in the ring buffer

xRingbufferReceive

@brief Retrieve an item from the ring buffer

xRingbufferReceiveFromISR

@brief Retrieve an item from the ring buffer in an ISR

xRingbufferReceiveSplit

@brief Retrieve a split item from an allow-split ring buffer

xRingbufferReceiveSplitFromISR

@brief Retrieve a split item from an allow-split ring buffer in an ISR

xRingbufferReceiveUpTo

@brief Retrieve bytes from a byte buffer, specifying the maximum amount of bytes to retrieve

xRingbufferReceiveUpToFromISR

@brief Retrieve bytes from a byte buffer, specifying the maximum amount of bytes to retrieve. Call this from an ISR.

xRingbufferRemoveFromQueueSetRead

@brief Remove the ring buffer's read semaphore from a queue set.

xRingbufferSend

@brief Insert an item into the ring buffer

xRingbufferSendAcquire

@brief Acquire memory from the ring buffer to be written to by an external source and to be sent later.

xRingbufferSendComplete

@brief Actually send an item into the ring buffer allocated before by xRingbufferSendAcquire.

xRingbufferSendFromISR

@brief Insert an item into the ring buffer in an ISR

xTaskCallApplicationTaskHook

Calls the hook function associated with xTask. Passing xTask as NULL has the effect of calling the Running tasks (the calling task) hook function.

xTaskCheckForTimeOut
xTaskCreatePinnedToCore
xTaskCreateRestricted
xTaskGetAffinity
xTaskGetCurrentTaskHandle
xTaskGetCurrentTaskHandleForCPU
xTaskGetIdleTaskHandle

Get the handle of idle task for the current CPU.

xTaskGetIdleTaskHandleForCPU

Get the handle of idle task for the given CPU.

xTaskGetSchedulerState
xTaskGetTickCount

Get tick count

xTaskGetTickCountFromISR

Get tick count from ISR

xTaskIncrementTick

@cond

xTaskNotify

Send task notification.

xTaskNotifyFromISR

Send task notification from an ISR.

xTaskNotifyWait

Wait for task notification

xTaskPriorityDisinherit
xTaskRemoveFromEventList
xTaskRemoveFromUnorderedEventList
xTaskResumeAll

Resumes scheduler activity after it was suspended by a call to vTaskSuspendAll().

xTaskResumeFromISR

An implementation of vTaskResume() that can be called from within an ISR.

xt_clock_freq

This function is defined to provide a deprecation warning whenever XT_CLOCK_FREQ macro is used. Update the code to use esp_clk_cpu_freq function instead. @return current CPU clock frequency, in Hz

xt_get_interrupt_handler_arg
xt_ints_off
xt_ints_on
xt_set_exception_handler
xt_set_interrupt_handler
xthal_bcopy
xthal_cache_coherence_off
xthal_cache_coherence_on
xthal_cache_coherence_optin
xthal_cache_coherence_optout
xthal_calc_cacheadrdis
xthal_check_map
xthal_clear_regcached_code
xthal_compare_and_set
xthal_dcache_all_invalidate
xthal_dcache_all_unlock
xthal_dcache_all_writeback
xthal_dcache_all_writeback_inv
xthal_dcache_disable
xthal_dcache_enable
xthal_dcache_get_ways
xthal_dcache_hugerange_invalidate
xthal_dcache_hugerange_unlock
xthal_dcache_hugerange_writeback
xthal_dcache_hugerange_writeback_inv
xthal_dcache_line_invalidate
xthal_dcache_line_lock
xthal_dcache_line_unlock
xthal_dcache_line_writeback
xthal_dcache_line_writeback_inv
xthal_dcache_region_invalidate
xthal_dcache_region_lock
xthal_dcache_region_unlock
xthal_dcache_region_writeback
xthal_dcache_region_writeback_inv
xthal_dcache_set_ways
xthal_dcache_sync
xthal_disassemble
xthal_disassemble_size
xthal_encode_memory_type
xthal_get_cache_prefetch
xthal_get_cacheattr
xthal_get_ccompare
xthal_get_ccount
xthal_get_cpenable
xthal_get_dcacheattr
xthal_get_entry_for_address
xthal_get_icacheattr
xthal_get_int_vpri
xthal_get_intenable
xthal_get_interrupt
xthal_get_prid
xthal_get_vpri
xthal_get_vpri_locklevel
xthal_icache_all_invalidate
xthal_icache_all_unlock
xthal_icache_disable
xthal_icache_enable
xthal_icache_get_ways
xthal_icache_hugerange_invalidate
xthal_icache_hugerange_unlock
xthal_icache_line_invalidate
xthal_icache_line_lock
xthal_icache_line_unlock
xthal_icache_region_invalidate
xthal_icache_region_lock
xthal_icache_region_unlock
xthal_icache_set_ways
xthal_icache_sync
xthal_init_mem_cp
xthal_init_mem_extra
xthal_int_disable
xthal_int_enable
xthal_intlevel_to_vpri
xthal_invalidate_cp
xthal_invalidate_region
xthal_is_cacheable
xthal_is_device
xthal_is_kernel_executable
xthal_is_kernel_readable
xthal_is_kernel_writeable
xthal_is_user_executable
xthal_is_user_readable
xthal_is_user_writeable
xthal_is_writeback
xthal_memcpy
xthal_memep_inject_error
xthal_mpu_set_region_attribute
xthal_read_background_map
xthal_read_map
xthal_remove_soft_break
xthal_restore_cp0
xthal_restore_cp1
xthal_restore_cp2
xthal_restore_cp3
xthal_restore_cp4
xthal_restore_cp5
xthal_restore_cp6
xthal_restore_cp7
xthal_restore_cpregs
xthal_restore_extra
xthal_save_cp0
xthal_save_cp1
xthal_save_cp2
xthal_save_cp3
xthal_save_cp4
xthal_save_cp5
xthal_save_cp6
xthal_save_cp7
xthal_save_cpregs
xthal_save_extra
xthal_set_cache_prefetch
xthal_set_cache_prefetch_long
xthal_set_cacheattr
xthal_set_ccompare
xthal_set_cpenable
xthal_set_dcacheattr
xthal_set_icacheattr
xthal_set_int_vpri
xthal_set_intclear
xthal_set_intenable
xthal_set_intset
xthal_set_region_attribute
xthal_set_region_translation
xthal_set_region_translation_raw
xthal_set_soft_break
xthal_set_tram_trigger_func
xthal_set_vpri
xthal_set_vpri_intlevel
xthal_set_vpri_lock
xthal_set_vpri_locklevel
xthal_static_p2v
xthal_static_v2p
xthal_tram_done
xthal_tram_pending_to_service
xthal_tram_set_sync
xthal_v2p
xthal_validate_cp
xthal_vpri_to_intlevel
xthal_window_spill
xthal_write_map

Type Definitions

BaseType_t
ETSEvent
ETSParam
ETSSignal
ETSTask
ETSTimer
ETSTimerFunc

@addtogroup ets_timer_apis @{

FILE
ListItem_t
List_t
MemoryRegion_t
MiniListItem_t
QueueHandle_t

Type by which queues are referenced. For example, a call to xQueueCreate() returns an QueueHandle_t variable that can then be used as a parameter to xQueueSend(), xQueueReceive(), etc.

QueueSetHandle_t

Type by which queue sets are referenced. For example, a call to xQueueCreateSet() returns an xQueueSet variable that can then be used as a parameter to xQueueSelectFromSet(), xQueueAddToSet(), etc.

QueueSetMemberHandle_t

Queue sets can contain both queues and semaphores, so the QueueSetMemberHandle_t is defined as a type to be used where a parameter or return value can be either an QueueHandle_t or an SemaphoreHandle_t.

RingbufHandle_t

Type by which ring buffers are referenced. For example, a call to xRingbufferCreate() returns a RingbufHandle_t variable that can then be used as a parameter to xRingbufferSend(), xRingbufferReceive(), etc.

SemaphoreHandle_t
StackType_t
StaticEventGroup_t
StaticListItem_t
StaticList_t
StaticMiniListItem_t
StaticQueue_t
StaticSemaphore_t
StaticTask_t
StaticTimer_t
TaskFunction_t
TaskHandle_t

task. h

TaskHookFunction_t

Defines the prototype to which the application task hook function must conform.

TaskParameters_t
TaskSnapshot_t
TaskStatus_t
TickType_t
TimeOut_t
TlsDeleteCallbackFunction_t

Prototype of local storage pointer deletion callback.

UBaseType_t
XtHalVoidFunc
_LOCK_RECURSIVE_T
_LOCK_T
__FILE
__ULong
__blkcnt_t
__blksize_t
__builtin_va_list
__clock_t
__clockid_t
__compar_fn_t
__dev_t
__fsblkcnt_t
__fsfilcnt_t
__gid_t
__gnuc_va_list
__id_t
__ino_t
__int8_t
__int16_t
__int32_t
__int64_t
__int_least8_t
__int_least16_t
__int_least32_t
__int_least64_t
__intmax_t
__intptr_t
__key_t
__loff_t
__mode_t
__nlink_t
__off_t
__pid_t
__sa_family_t
__sigset_t
__size_t
__socklen_t
__ssize_t
__suseconds_t
__time_t
__timer_t
__tzinfo_type
__tzrule_type
__uid_t
__uint8_t
__uint16_t
__uint32_t
__uint64_t
__uint_least8_t
__uint_least16_t
__uint_least32_t
__uint_least64_t
__uintmax_t
__uintptr_t
__useconds_t
__va_list
_flock_t
_fpos_t
_iconv_t
_lock_t
_off64_t
_off_t
_sig_func_ptr
_ssize_t
_xtos_handler
_xtos_handler_func
blkcnt_t
blksize_t
caddr_t
clock_t
clockid_t
daddr_t
dev_t
dhcp_event_fn
err_t
error_t
esp_aes_128_encrypt_t

@brief The AES callback function when do WPS connect.

esp_aes_128_decrypt_t

@brief The AES callback function when do WPS connect.

esp_aes_decrypt_deinit_t

@brief Deinitialize AES decryption

esp_aes_decrypt_init_t

@brief Initialize AES for decryption

esp_aes_decrypt_t

@brief Decrypt one AES block

esp_aes_encrypt_deinit_t

@brief Deinitialize AES encryption

esp_aes_encrypt_init_t

@brief Initialize AES for encryption

esp_aes_encrypt_t

@brief Encrypt one AES block

esp_aes_unwrap_t

@brief The AES callback function when do STA connect.

esp_aes_wrap_t

@brief The AES callback function when do STA connect.

esp_alloc_failed_hook_t

@brief callback called when a allocation operation fails, if registered @param size in bytes of failed allocation @param caps capabillites requested of failed allocation @param function_name function which generated the failure

esp_ccmp_decrypt_t

@brief Decrypt data using CCMP (Counter Mode CBC-MAC Protocol OR Counter Mode Cipher Block Chaining Message Authentication Code Protocol) which is used in IEEE 802.11i RSN standard. @tk: 128-bit Temporal Key for obtained during 4-way handshake @hdr: Pointer to IEEE802.11 frame headeri needed for AAD @data: Pointer to encrypted data buffer @data_len: Encrypted data length in bytes @decrypted_len: Length of decrypted data Returns: Pointer to decrypted data on success, NULL on failure

esp_ccmp_encrypt_t

@brief Encrypt data using CCMP (Counter Mode CBC-MAC Protocol OR Counter Mode Cipher Block Chaining Message Authentication Code Protocol) which is used in IEEE 802.11i RSN standard. @tk: 128-bit Temporal Key for obtained during 4-way handshake @frame: Pointer to IEEE802.11 frame including header @len: Length of the frame including header @hdrlen: Length of the header @pn: Packet Number counter @keyid: Key ID to be mentioned in CCMP Vector @encrypted_len: Length of the encrypted frame including header

esp_cpu_ccount_t
esp_crypto_cipher_t
esp_crypto_hash_t
esp_deep_sleep_wake_stub_fn_t

@brief Function type for stub to run on wake from sleep.

esp_err_t
esp_event_base_t
esp_event_handler_instance_t
esp_event_handler_t
esp_event_loop_handle_t
esp_freertos_idle_cb_t
esp_freertos_tick_cb_t
esp_hmac_md5_t

@brief HMAC-MD5 over data buffer (RFC 2104)'

esp_hmac_md5_vector_t

@brief HMAC-MD5 over data vector (RFC 2104)

esp_hmac_sha1_t

@brief HMAC-SHA1 over data buffer (RFC 2104)

esp_hmac_sha1_vector_t

@brief HMAC-SHA1 over data vector (RFC 2104)

esp_hmac_sha256_vector_t

@brief The SHA256 callback function when do WPS connect.

esp_ip4_addr_t
esp_ip6_addr_t
esp_ip_addr_t
esp_md5_vector_t

@brief MD5 hash for data vector

esp_netif_config_t
esp_netif_driver_base_t
esp_netif_driver_ifconfig_t
esp_netif_inherent_config_t
esp_netif_iodriver_handle

@brief IO driver handle type

esp_netif_netstack_config_t

@brief Specific L3 network stack configuration

esp_netif_receive_t

@brief ESP-NETIF Receive function type

esp_netif_t
esp_now_peer_info_t
esp_now_peer_num_t
esp_now_recv_cb_t

@brief Callback function of receiving ESPNOW data @param mac_addr peer MAC address @param data received data @param data_len length of received data

esp_now_send_cb_t

@brief Callback function of sending ESPNOW data @param mac_addr peer MAC address @param status status of sending ESPNOW data (succeed or fail)

esp_omac1_aes_128_t

@brief One-Key CBC MAC (OMAC1) hash with AES-128 for MIC computation

esp_ota_handle_t

@brief Opaque handle for an application OTA update

esp_partition_iterator_t

@brief Opaque partition iterator type

esp_pbkdf2_sha1_t

@brief SHA1-based key derivation function (PBKDF2) for IEEE 802.11i

esp_rc4_skip_t

@brief XOR RC4 stream to given data with skip-stream-start

esp_sha1_prf_t

@brief SHA1-based Pseudo-Random Function (PRF) (IEEE 802.11i, 8.5.1.1)

esp_sha1_vector_t

@brief SHA-1 hash for data vector

esp_sha256_prf_t

@brief The AES callback function when do STA connect.

esp_timer_cb_t

@brief Timer callback function type @param arg pointer to opaque user-specific data

esp_timer_handle_t

@brief Opaque type representing a single esp_timer

esp_vendor_ie_cb_t

@brief Function signature for received Vendor-Specific Information Element callback. @param ctx Context argument, as passed to esp_wifi_set_vendor_ie_cb() when registering callback. @param type Information element type, based on frame type received. @param sa Source 802.11 address. @param vnd_ie Pointer to the vendor specific element data received. @param rssi Received signal strength indication.

ets_idle_cb_t
ets_isr_t

@addtogroup ets_intr_apis @{

fd_mask
filter_cb_t

@brief Callback function that is called after each IIR filter calculation. @note This callback is called in timer task in each filtering cycle. @note This callback should not be blocked. @param raw_value The latest raw data(touch sensor counter value) that points to all channels(raw_value[0..TOUCH_PAD_MAX-1]). @param filtered_value The latest IIR filtered data(calculated from raw data) that points to all channels(filtered_value[0..TOUCH_PAD_MAX-1]).

fpos_t
fsblkcnt_t
fsfilcnt_t
gid_t
gpio_dev_t
gpio_intr_handler_fn_t
gpio_isr_handle_t
gpio_isr_t
i2c_port_t

@brief I2C port number, can be I2C_NUM_0 ~ (I2C_NUM_MAX-1).

i2c_cmd_handle_t
i2s_dev_t
i2s_isr_handle_t
id_t
in_addr_t
in_port_t
ino_t
int_fast8_t
int_fast16_t
int_fast32_t
int_fast64_t
int_least8_t
int_least16_t
int_least32_t
int_least64_t
intmax_t
intr_handle_t

Handle to an interrupt handler

intr_handler_t

Function prototype for interrupt handler function

ip4_addr_t

ip4_addr_t uses a struct for convenience only, so that the same defines can operate both on ip4_addr_t as well as on ip4_addr_p_t.

ip6_addr_t

IPv6 address

ip_addr_t
key_t
locale_t
mem_ptr_t
mem_size_t
mode_t
multi_heap_handle_t

@brief Opaque handle to a registered heap

netif_addr_idx_t
netif_ext_callback_fn

@ingroup netif Function used for extended netif status callbacks Note: When parsing reason argument, keep in mind that more reasons may be added in the future! @param netif netif that is affected by change @param reason change reason @param args depends on reason, see reason description

netif_igmp_mac_filter_fn

Function prototype for netif igmp_mac_filter functions

netif_init_fn

Function prototype for netif init functions. Set up flags and output/linkoutput callback functions in this function.

netif_input_fn

Function prototype for netif->input functions. This function is saved as 'input' callback function in the netif struct. Call it when a packet has been received.

netif_linkoutput_fn

Function prototype for netif->linkoutput functions. Only used for ethernet netifs. This function is called by ARP when a packet shall be sent.

netif_mld_mac_filter_fn

Function prototype for netif mld_mac_filter functions

netif_nsc_reason_t

@ingroup netif Extended netif status callback (NSC) reasons flags. May be extended in the future!

netif_output_fn

Function prototype for netif->output functions. Called by lwIP when a packet shall be sent. For ethernet netif, set this to 'etharp_output' and set 'linkoutput'.

netif_output_ip6_fn

Function prototype for netif->output_ip6 functions. Called by lwIP when a packet shall be sent. For ethernet netif, set this to 'ethip6_output' and set 'linkoutput'.

netif_status_callback_fn

Function prototype for netif status- or link-callback functions.

nfds_t
nlink_t
nvs_handle
nvs_handle_t

Opaque pointer type representing non-volatile storage handle

nvs_iterator_t

Opaque pointer type representing iterator to nvs entries

off_t
pbuf_free_custom_fn

Prototype for a function to free a custom pbuf

pid_t
pthread_cond_t
pthread_key_t
pthread_mutex_t
pthread_t
register_t
rtc_clk_config_t
rtc_cntl_dev_t
rtc_config_t
rtc_cpu_freq_config_t
rtc_io_dev_t
rtc_sleep_config_t
rtc_vddsdio_config_t
s8_t
s16_t
s32_t
s64_t
sa_family_t
sbintime_t
sens_dev_t
shutdown_handler_t

Shutdown handler type

sig_atomic_t
sig_t
sigset_t
size_t
sntp_sync_time_cb_t

@brief SNTP callback function for notifying about time sync event

socklen_t
spi_flash_guard_end_func_t

@brief SPI flash critical section exit function.

spi_flash_guard_start_func_t

@brief SPI flash critical section enter function.

spi_flash_is_safe_write_address_t

@brief Function to protect SPI flash critical regions corruption.

spi_flash_mmap_handle_t

@brief Opaque handle for memory region obtained from spi_flash_mmap.

spi_flash_op_lock_func_t

@brief SPI flash operation lock function.

spi_flash_op_unlock_func_t

@brief SPI flash operation unlock function.

ssize_t
stack_t
suseconds_t
sys_mbox_t
sys_mutex_t
sys_prot_t
sys_sem_t
sys_thread_t
system_event_ap_probe_req_rx_t

Argument structure of event

system_event_ap_staconnected_t

Argument structure of event

system_event_ap_stadisconnected_t

Argument structure of event

system_event_ap_staipassigned_t

Argument structure of event

system_event_cb_t

@brief Application specified event callback function

system_event_got_ip6_t

Argument structure of event

system_event_handler_t

Event handler function type

system_event_sta_authmode_change_t

Argument structure of SYSTEM_EVENT_STA_AUTHMODE_CHANGE event

system_event_sta_connected_t

Argument structure of SYSTEM_EVENT_STA_CONNECTED event

system_event_sta_disconnected_t

Argument structure of SYSTEM_EVENT_STA_DISCONNECTED event

system_event_sta_got_ip_t

Argument structure of event

system_event_sta_scan_done_t

Argument structure of SYSTEM_EVENT_SCAN_DONE event

system_event_sta_wps_er_pin_t

Argument structure of SYSTEM_EVENT_STA_WPS_ER_PIN event

time_t
timer_t
u8_t
u16_t
u32_t
u64_t
u_char
u_int
u_int8_t
u_int16_t
u_int32_t
u_int64_t
u_long
u_short
uart_isr_handle_t
uart_port_t

@brief UART port number, can be UART_NUM_0 ~ (UART_NUM_MAX -1).

uid_t
uint
uint_fast8_t
uint_fast16_t
uint_fast32_t
uint_fast64_t
uint_least8_t
uint_least16_t
uint_least32_t
uint_least64_t
uintmax_t
ulong
useconds_t
ushort
va_list
wchar_t
wifi_csi_cb_t

@brief The RX callback function of Channel State Information(CSI) data.

wifi_promiscuous_cb_t

@brief The RX callback function in the promiscuous mode. Each time a packet is received, the callback function will be called.

wint_t
xt_exc_handler
xt_handler

Unions

_ip_addr__bindgen_ty_1
_mbstate_t__bindgen_ty_1
gpio_dev_s__bindgen_ty_1
gpio_dev_s__bindgen_ty_2
gpio_dev_s__bindgen_ty_3
gpio_dev_s__bindgen_ty_4
gpio_dev_s__bindgen_ty_5
gpio_dev_s__bindgen_ty_6
gpio_dev_s__bindgen_ty_7
gpio_dev_s__bindgen_ty_8
gpio_dev_s__bindgen_ty_9
gpio_dev_s__bindgen_ty_10
gpio_dev_s__bindgen_ty_11
gpio_dev_s__bindgen_ty_12
gpio_dev_s__bindgen_ty_13
gpio_dev_s__bindgen_ty_14
gpio_dev_s__bindgen_ty_15
gpio_dev_s__bindgen_ty_16
gpio_dev_s__bindgen_ty_17
gpio_dev_s__bindgen_ty_18
gpio_dev_s__bindgen_ty_19
gpio_dev_s__bindgen_ty_20
gpio_dev_s__bindgen_ty_21
gpio_dev_s__bindgen_ty_22
i2c_config_t__bindgen_ty_1
i2s_dev_s__bindgen_ty_1
i2s_dev_s__bindgen_ty_2
i2s_dev_s__bindgen_ty_3
i2s_dev_s__bindgen_ty_4
i2s_dev_s__bindgen_ty_5
i2s_dev_s__bindgen_ty_6
i2s_dev_s__bindgen_ty_7
i2s_dev_s__bindgen_ty_8
i2s_dev_s__bindgen_ty_9
i2s_dev_s__bindgen_ty_10
i2s_dev_s__bindgen_ty_11
i2s_dev_s__bindgen_ty_12
i2s_dev_s__bindgen_ty_13
i2s_dev_s__bindgen_ty_14
i2s_dev_s__bindgen_ty_15
i2s_dev_s__bindgen_ty_16
i2s_dev_s__bindgen_ty_17
i2s_dev_s__bindgen_ty_18
i2s_dev_s__bindgen_ty_19
i2s_dev_s__bindgen_ty_20
i2s_dev_s__bindgen_ty_21
i2s_dev_s__bindgen_ty_22
i2s_dev_s__bindgen_ty_23
i2s_dev_s__bindgen_ty_24
i2s_dev_s__bindgen_ty_25
i2s_dev_s__bindgen_ty_26
i2s_dev_s__bindgen_ty_27
i2s_dev_s__bindgen_ty_28
i2s_dev_s__bindgen_ty_29
i2s_dev_s__bindgen_ty_30
i2s_dev_s__bindgen_ty_31
in6_addr__bindgen_ty_1
ip_addr__bindgen_ty_1
netif_ext_callback_args_t

@ingroup netif Argument supplied to netif_ext_callback_fn.

rtc_cntl_dev_s__bindgen_ty_1
rtc_cntl_dev_s__bindgen_ty_2
rtc_cntl_dev_s__bindgen_ty_3
rtc_cntl_dev_s__bindgen_ty_4
rtc_cntl_dev_s__bindgen_ty_5
rtc_cntl_dev_s__bindgen_ty_6
rtc_cntl_dev_s__bindgen_ty_7
rtc_cntl_dev_s__bindgen_ty_8
rtc_cntl_dev_s__bindgen_ty_9
rtc_cntl_dev_s__bindgen_ty_10
rtc_cntl_dev_s__bindgen_ty_11
rtc_cntl_dev_s__bindgen_ty_12
rtc_cntl_dev_s__bindgen_ty_13
rtc_cntl_dev_s__bindgen_ty_14
rtc_cntl_dev_s__bindgen_ty_15
rtc_cntl_dev_s__bindgen_ty_16
rtc_cntl_dev_s__bindgen_ty_17
rtc_cntl_dev_s__bindgen_ty_18
rtc_cntl_dev_s__bindgen_ty_19
rtc_cntl_dev_s__bindgen_ty_20
rtc_cntl_dev_s__bindgen_ty_21
rtc_cntl_dev_s__bindgen_ty_22
rtc_cntl_dev_s__bindgen_ty_23
rtc_cntl_dev_s__bindgen_ty_24
rtc_cntl_dev_s__bindgen_ty_25
rtc_cntl_dev_s__bindgen_ty_26
rtc_cntl_dev_s__bindgen_ty_27
rtc_cntl_dev_s__bindgen_ty_28
rtc_cntl_dev_s__bindgen_ty_29
rtc_cntl_dev_s__bindgen_ty_30
rtc_cntl_dev_s__bindgen_ty_31
rtc_cntl_dev_s__bindgen_ty_32
rtc_cntl_dev_s__bindgen_ty_33
rtc_cntl_dev_s__bindgen_ty_34
rtc_cntl_dev_s__bindgen_ty_35
rtc_cntl_dev_s__bindgen_ty_36
rtc_cntl_dev_s__bindgen_ty_37
rtc_cntl_dev_s__bindgen_ty_38
rtc_io_dev_s__bindgen_ty_1
rtc_io_dev_s__bindgen_ty_2
rtc_io_dev_s__bindgen_ty_3
rtc_io_dev_s__bindgen_ty_4
rtc_io_dev_s__bindgen_ty_5
rtc_io_dev_s__bindgen_ty_6
rtc_io_dev_s__bindgen_ty_7
rtc_io_dev_s__bindgen_ty_8
rtc_io_dev_s__bindgen_ty_9
rtc_io_dev_s__bindgen_ty_10
rtc_io_dev_s__bindgen_ty_11
rtc_io_dev_s__bindgen_ty_12
rtc_io_dev_s__bindgen_ty_13
rtc_io_dev_s__bindgen_ty_14
rtc_io_dev_s__bindgen_ty_15
rtc_io_dev_s__bindgen_ty_16
rtc_io_dev_s__bindgen_ty_17
rtc_io_dev_s__bindgen_ty_18
rtc_io_dev_s__bindgen_ty_19
rtc_io_dev_s__bindgen_ty_20
rtc_io_dev_s__bindgen_ty_21
rtc_io_dev_s__bindgen_ty_22
rtc_io_dev_s__bindgen_ty_23
sens_dev_s__bindgen_ty_1
sens_dev_s__bindgen_ty_2
sens_dev_s__bindgen_ty_3
sens_dev_s__bindgen_ty_4
sens_dev_s__bindgen_ty_5
sens_dev_s__bindgen_ty_6
sens_dev_s__bindgen_ty_7
sens_dev_s__bindgen_ty_8
sens_dev_s__bindgen_ty_9
sens_dev_s__bindgen_ty_10
sens_dev_s__bindgen_ty_11
sens_dev_s__bindgen_ty_12
sens_dev_s__bindgen_ty_13
sens_dev_s__bindgen_ty_14
sens_dev_s__bindgen_ty_15
sens_dev_s__bindgen_ty_16
sens_dev_s__bindgen_ty_17
sens_dev_s__bindgen_ty_18
sens_dev_s__bindgen_ty_19
sens_dev_s__bindgen_ty_20
sens_dev_s__bindgen_ty_21
sens_dev_s__bindgen_ty_22
sens_dev_s__bindgen_ty_23
sens_dev_s__bindgen_ty_24
sigval
system_event_info_t

Union of all possible system_event argument structures

uart_config_t__bindgen_ty_1
wifi_config_t

@brief Configuration data for ESP32 AP or STA.

xSTATIC_QUEUE__bindgen_ty_1